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authorRichard Zhao <rizhao@nvidia.com>2017-04-06 20:32:14 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-04-07 16:48:30 -0400
commit3429657f9308b27e4721d88b1c1c307b23bfb316 (patch)
tree3cdd5bb56fd0d415df1ab1a9bd73244b52957025 /include/linux/tegra_vgpu_t18x.h
parent14959cf6829f13180eb27015ca2db83a817c1add (diff)
gpu: nvgpu: vgpu: merge tegra_vgpu_t18x.h to tegra_vgpu.h
No need to keep two vgpu headers anymore. Jira VFND-3796 Change-Id: I400cbfa5b2c0e62963eff247adcd9483be975379 Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: http://git-master/r/1457480 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'include/linux/tegra_vgpu_t18x.h')
-rw-r--r--include/linux/tegra_vgpu_t18x.h42
1 files changed, 0 insertions, 42 deletions
diff --git a/include/linux/tegra_vgpu_t18x.h b/include/linux/tegra_vgpu_t18x.h
deleted file mode 100644
index 121f4103..00000000
--- a/include/linux/tegra_vgpu_t18x.h
+++ /dev/null
@@ -1,42 +0,0 @@
1/*
2 * Tegra GPU Virtualization Interfaces to Server
3 *
4 * Copyright (c) 2015, NVIDIA Corporation. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program. If not, see <http://www.gnu.org/licenses/>.
17 */
18
19#ifndef __TEGRA_VGPU_T18X_H
20#define __TEGRA_VGPU_T18X_H
21
22enum {
23 TEGRA_VGPU_GR_BIND_CTXSW_BUFFER_MAIN,
24 TEGRA_VGPU_GR_BIND_CTXSW_BUFFER_SPILL,
25 TEGRA_VGPU_GR_BIND_CTXSW_BUFFER_PAGEPOOL,
26 TEGRA_VGPU_GR_BIND_CTXSW_BUFFER_BETACB,
27 TEGRA_VGPU_GR_BIND_CTXSW_BUFFER_LAST
28};
29
30enum {
31 TEGRA_VGPU_GR_CTXSW_PREEMPTION_MODE_WFI,
32 TEGRA_VGPU_GR_CTXSW_PREEMPTION_MODE_GFX_GFXP,
33 TEGRA_VGPU_GR_CTXSW_PREEMPTION_MODE_COMPUTE_CTA,
34 TEGRA_VGPU_GR_CTXSW_PREEMPTION_MODE_COMPUTE_CILP,
35 TEGRA_VGPU_GR_CTXSW_PREEMPTION_MODE_LAST
36};
37
38enum {
39 TEGRA_VGPU_ATTRIB_PREEMPT_CTX_SIZE = 64
40};
41
42#endif