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author | Richard Zhao <rizhao@nvidia.com> | 2017-12-05 18:48:22 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-12-10 13:36:39 -0500 |
commit | fa1b18c171aba0f8bb674ccc8c60ae81213a16f6 (patch) | |
tree | 6c1204b817e052416da00400a713a66d0418cf1b /include/linux/tegra_vgpu.h | |
parent | 7f0aa103eaba5f1ad9c928066c8abe69ef734626 (diff) |
gpu: nvgpu: vgpu: add tsg release command
gv11b needs tsg release callback to release CE method buffer.
Bug 2022929
Change-Id: I32e27a5fa49eb61b9c2fc72ea32034191a9be48e
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1611631
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aparna Das <aparnad@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'include/linux/tegra_vgpu.h')
-rw-r--r-- | include/linux/tegra_vgpu.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/include/linux/tegra_vgpu.h b/include/linux/tegra_vgpu.h index bfa5862b..5c81e8c9 100644 --- a/include/linux/tegra_vgpu.h +++ b/include/linux/tegra_vgpu.h | |||
@@ -110,6 +110,7 @@ enum { | |||
110 | TEGRA_VGPU_CMD_PROF_MGT = 72, | 110 | TEGRA_VGPU_CMD_PROF_MGT = 72, |
111 | TEGRA_VGPU_CMD_PERFBUF_MGT = 73, | 111 | TEGRA_VGPU_CMD_PERFBUF_MGT = 73, |
112 | TEGRA_VGPU_CMD_GET_TIMESTAMPS_ZIPPER = 74, | 112 | TEGRA_VGPU_CMD_GET_TIMESTAMPS_ZIPPER = 74, |
113 | TEGRA_VGPU_CMD_TSG_RELEASE = 75, | ||
113 | }; | 114 | }; |
114 | 115 | ||
115 | struct tegra_vgpu_connect_params { | 116 | struct tegra_vgpu_connect_params { |
@@ -384,7 +385,7 @@ struct tegra_vgpu_tsg_timeslice_params { | |||
384 | u32 timeslice_us; | 385 | u32 timeslice_us; |
385 | }; | 386 | }; |
386 | 387 | ||
387 | struct tegra_vgpu_tsg_open_params { | 388 | struct tegra_vgpu_tsg_open_rel_params { |
388 | u32 tsg_id; | 389 | u32 tsg_id; |
389 | }; | 390 | }; |
390 | 391 | ||
@@ -562,7 +563,8 @@ struct tegra_vgpu_cmd_msg { | |||
562 | struct tegra_vgpu_channel_bind_gr_ctx_params ch_bind_gr_ctx; | 563 | struct tegra_vgpu_channel_bind_gr_ctx_params ch_bind_gr_ctx; |
563 | struct tegra_vgpu_tsg_bind_gr_ctx_params tsg_bind_gr_ctx; | 564 | struct tegra_vgpu_tsg_bind_gr_ctx_params tsg_bind_gr_ctx; |
564 | struct tegra_vgpu_tsg_bind_unbind_channel_params tsg_bind_unbind_channel; | 565 | struct tegra_vgpu_tsg_bind_unbind_channel_params tsg_bind_unbind_channel; |
565 | struct tegra_vgpu_tsg_open_params tsg_open; | 566 | struct tegra_vgpu_tsg_open_rel_params tsg_open; |
567 | struct tegra_vgpu_tsg_open_rel_params tsg_release; | ||
566 | struct tegra_vgpu_tsg_preempt_params tsg_preempt; | 568 | struct tegra_vgpu_tsg_preempt_params tsg_preempt; |
567 | struct tegra_vgpu_tsg_timeslice_params tsg_timeslice; | 569 | struct tegra_vgpu_tsg_timeslice_params tsg_timeslice; |
568 | struct tegra_vgpu_tsg_runlist_interleave_params tsg_interleave; | 570 | struct tegra_vgpu_tsg_runlist_interleave_params tsg_interleave; |