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authorPeter Daifuku <pdaifuku@nvidia.com>2016-08-31 20:04:56 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2016-09-08 19:04:09 -0400
commit9aa7de15c2a644e9c7e9c157e49087e66d4ac3d0 (patch)
treee5080886f09aa75c6a3cc83e5b27f8f7553678a4 /include/linux/tegra_vgpu.h
parent70cad5fbb593602a49f91e57c04d1da0334b3a49 (diff)
gpu: nvgpu: vgpu: cyclestat snapshot support
Add support for cyclestats snapshots in the virtual case Bug 1700143 JIRA EVLR-278 Change-Id: I376a8804d57324f43eb16452d857a3b7bb0ecc90 Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com> Reviewed-on: http://git-master/r/1211547 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'include/linux/tegra_vgpu.h')
-rw-r--r--include/linux/tegra_vgpu.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/include/linux/tegra_vgpu.h b/include/linux/tegra_vgpu.h
index fdab9b06..be8b9ad1 100644
--- a/include/linux/tegra_vgpu.h
+++ b/include/linux/tegra_vgpu.h
@@ -97,6 +97,7 @@ enum {
97 TEGRA_VGPU_CMD_SET_POWERGATE = 60, 97 TEGRA_VGPU_CMD_SET_POWERGATE = 60,
98 TEGRA_VGPU_CMD_SET_GPU_CLK_RATE = 61, 98 TEGRA_VGPU_CMD_SET_GPU_CLK_RATE = 61,
99 TEGRA_VGPU_CMD_GET_CONSTANTS = 62, 99 TEGRA_VGPU_CMD_GET_CONSTANTS = 62,
100 TEGRA_VGPU_CMD_CHANNEL_CYCLESTATS_SNAPSHOT = 63,
100}; 101};
101 102
102struct tegra_vgpu_connect_params { 103struct tegra_vgpu_connect_params {
@@ -437,6 +438,15 @@ struct tegra_vgpu_constants_params {
437 u16 gpc_tpc_mask[TEGRA_VGPU_MAX_GPC_COUNT]; 438 u16 gpc_tpc_mask[TEGRA_VGPU_MAX_GPC_COUNT];
438}; 439};
439 440
441struct tegra_vgpu_channel_cyclestats_snapshot_params {
442 u64 handle;
443 u32 perfmon_start;
444 u32 perfmon_count;
445 u32 buf_info; /* client->srvr: get ptr; srvr->client: num pending */
446 u8 subcmd;
447 u8 hw_overflow;
448};
449
440struct tegra_vgpu_cmd_msg { 450struct tegra_vgpu_cmd_msg {
441 u32 cmd; 451 u32 cmd;
442 int ret; 452 int ret;
@@ -481,6 +491,7 @@ struct tegra_vgpu_cmd_msg {
481 struct tegra_vgpu_set_powergate_params set_powergate; 491 struct tegra_vgpu_set_powergate_params set_powergate;
482 struct tegra_vgpu_gpu_clk_rate_params gpu_clk_rate; 492 struct tegra_vgpu_gpu_clk_rate_params gpu_clk_rate;
483 struct tegra_vgpu_constants_params constants; 493 struct tegra_vgpu_constants_params constants;
494 struct tegra_vgpu_channel_cyclestats_snapshot_params cyclestats_snapshot;
484 char padding[192]; 495 char padding[192];
485 } params; 496 } params;
486}; 497};