gpu: nvgpu: vgpu: add set mmu debug mode support

JIRA VFND-1005
Bug 1594604

Change-Id: Ic159a1aff9cee508194f1f5dff7a16eb0e47ad64
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/833498
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 7 insertions, 1 deletions

diff --git a/include/linux/tegra_vgpu.h b/include/linux/tegra_vgpu.h
index 7587d355..b7bcc905 100644
--- a/include/linux/tegra_vgpu.h
+++ b/include/linux/tegra_vgpu.h
@@ -70,7 +70,8 @@ enum {
         TEGRA_VGPU_CMD_ZBC_SET_TABLE,
         TEGRA_VGPU_CMD_ZBC_QUERY_TABLE,
         TEGRA_VGPU_CMD_AS_MAP_EX,
-        TEGRA_VGPU_CMD_CHANNEL_BIND_GR_CTXSW_BUFFERS
+        TEGRA_VGPU_CMD_CHANNEL_BIND_GR_CTXSW_BUFFERS,
+        TEGRA_VGPU_CMD_SET_MMU_DEBUG_MODE
 };
 
 struct tegra_vgpu_connect_params {
@@ -259,6 +260,10 @@ struct tegra_vgpu_gr_bind_ctxsw_buffers_params {
         u32 mode;
 };
 
+struct tegra_vgpu_mmu_debug_mode {
+        u32 enable;
+};
+
 struct tegra_vgpu_cmd_msg {
         u32 cmd;
         int ret;
@@ -283,6 +288,7 @@ struct tegra_vgpu_cmd_msg {
                 struct tegra_vgpu_zbc_set_table_params zbc_set_table;
                 struct tegra_vgpu_zbc_query_table_params zbc_query_table;
                 struct tegra_vgpu_gr_bind_ctxsw_buffers_params gr_bind_ctxsw_buffers;
+                struct tegra_vgpu_mmu_debug_mode mmu_debug_mode;
                 char padding[192];
         } params;
 };