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authorThomas Fleury <tfleury@nvidia.com>2017-01-25 19:59:31 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2017-03-09 13:44:55 -0500
commit6c35cebdcb2d14741385cfe051577882a806cdb8 (patch)
tree80c0e8f0519dc253839a1aa7c8fe6e7da7ad336a /include/linux/tegra_vgpu.h
parentbc47d822298b9f3b2f93a384a7780a3763fee495 (diff)
gpu: nvgpu: vgpu: suspend/resume contexts
Add ability to suspend/resume contexts for a debug session (NVGPU_DBG_GPU_IOCTL_SUSPEND_RESUME_CONTEXTS), in virtualized case: - added hal function to resume contexts. - added vgpu support for suspend contexts, i.e. build a list of channel ids, and send TEGRA_VGPU_CMD_SUSPEND_CONTEXTS - added vgpu support for resume contexts, i.e. build a list of channel ids, and send TEGRA_VGPU_CMD_RESUME_CONTEXTS Bug 1791111 Change-Id: Icc1c00d94a94dab6384ac263fb811c00fa4b07bf Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: http://git-master/r/1294761 (cherry picked from commit d17a38eda312ffa92ce92e5bafc30727a8b76c4e) Reviewed-on: http://git-master/r/1299059 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Cory Perry <cperry@nvidia.com> Tested-by: Cory Perry <cperry@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'include/linux/tegra_vgpu.h')
-rw-r--r--include/linux/tegra_vgpu.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/include/linux/tegra_vgpu.h b/include/linux/tegra_vgpu.h
index 4f1c7926..9ecc44a7 100644
--- a/include/linux/tegra_vgpu.h
+++ b/include/linux/tegra_vgpu.h
@@ -99,6 +99,8 @@ enum {
99 TEGRA_VGPU_CMD_CHANNEL_CYCLESTATS_SNAPSHOT = 63, 99 TEGRA_VGPU_CMD_CHANNEL_CYCLESTATS_SNAPSHOT = 63,
100 TEGRA_VGPU_CMD_TSG_OPEN = 64, 100 TEGRA_VGPU_CMD_TSG_OPEN = 64,
101 TEGRA_VGPU_CMD_GET_GPU_LOAD = 65, 101 TEGRA_VGPU_CMD_GET_GPU_LOAD = 65,
102 TEGRA_VGPU_CMD_SUSPEND_CONTEXTS = 66,
103 TEGRA_VGPU_CMD_RESUME_CONTEXTS = 67,
102}; 104};
103 105
104struct tegra_vgpu_connect_params { 106struct tegra_vgpu_connect_params {
@@ -454,6 +456,12 @@ struct tegra_vgpu_gpu_load_params {
454 u32 load; 456 u32 load;
455}; 457};
456 458
459struct tegra_vgpu_suspend_resume_contexts {
460 u32 num_channels;
461 u16 resident_chid;
462 u16 chids[];
463};
464
457struct tegra_vgpu_cmd_msg { 465struct tegra_vgpu_cmd_msg {
458 u32 cmd; 466 u32 cmd;
459 int ret; 467 int ret;
@@ -500,6 +508,8 @@ struct tegra_vgpu_cmd_msg {
500 struct tegra_vgpu_constants_params constants; 508 struct tegra_vgpu_constants_params constants;
501 struct tegra_vgpu_channel_cyclestats_snapshot_params cyclestats_snapshot; 509 struct tegra_vgpu_channel_cyclestats_snapshot_params cyclestats_snapshot;
502 struct tegra_vgpu_gpu_load_params gpu_load; 510 struct tegra_vgpu_gpu_load_params gpu_load;
511 struct tegra_vgpu_suspend_resume_contexts suspend_contexts;
512 struct tegra_vgpu_suspend_resume_contexts resume_contexts;
503 char padding[192]; 513 char padding[192];
504 } params; 514 } params;
505}; 515};