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author | Alex Frid <afrid@nvidia.com> | 2014-08-25 23:36:02 -0400 |
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committer | Dan Willemsen <dwillemsen@nvidia.com> | 2015-03-18 15:11:03 -0400 |
commit | 55438f4009accdc0e113d1b82ade1521fa8be0b4 (patch) | |
tree | 70521eb5ae9911a8f1125acd4855be3585208d96 /include/linux/tegra_vgpu.h | |
parent | 4b02dea47d672baf6a566d187cb42c91bf14bf8c (diff) |
gpu: nvgpu: Re-factor GM20b clk_lock_gpc_pll_under_bypass()
Passed pll structure to GM20b clk_lock_gpc_pll_under_bypass() function
instead of individual M/N/PL dividers values.
Change-Id: I4881f6fad0e4be63a0eefb7277894d6900e9bb13
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/488024
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Diffstat (limited to 'include/linux/tegra_vgpu.h')
0 files changed, 0 insertions, 0 deletions