gpu: nvgpu: vgpu: dbg_set_powergate support

Add support for dbg_set_powergate when virtualized

Jira VFND-1905

Change-Id: I0d81c8863b3eda4ae4fee42e5a95d2fc9d78b174
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: http://git-master/r/1162048
(cherry picked from commit 0dfc55f390a10e21ae13e14dd2f16e89a3bddfa7)
Reviewed-on: http://git-master/r/1167182
(cherry picked from commit 4e34a1844558d93da5ad208532ec28aeda228f95)
Reviewed-on: http://git-master/r/1174701
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>

1 files changed, 6 insertions, 0 deletions

diff --git a/include/linux/tegra_vgpu.h b/include/linux/tegra_vgpu.h
index 196b08ca..6e8f5d53 100644
--- a/include/linux/tegra_vgpu.h
+++ b/include/linux/tegra_vgpu.h
@@ -96,6 +96,7 @@ enum {
         TEGRA_VGPU_CMD_CHANNEL_FORCE_RESET = 57,
         TEGRA_VGPU_CMD_CHANNEL_ENABLE = 58,
         TEGRA_VGPU_CMD_READ_PTIMER = 59,
+        TEGRA_VGPU_CMD_SET_POWERGATE = 60,
 };
 
 struct tegra_vgpu_connect_params {
@@ -394,6 +395,10 @@ struct tegra_vgpu_read_ptimer_params {
         u64 time;
 };
 
+struct tegra_vgpu_set_powergate_params {
+        u32 mode;
+};
+
 struct tegra_vgpu_cmd_msg {
         u32 cmd;
         int ret;
@@ -435,6 +440,7 @@ struct tegra_vgpu_cmd_msg {
                 struct tegra_vgpu_tsg_timeslice_params tsg_timeslice;
                 struct tegra_vgpu_tsg_runlist_interleave_params tsg_interleave;
                 struct tegra_vgpu_read_ptimer_params read_ptimer;
+                struct tegra_vgpu_set_powergate_params set_powergate;
                 char padding[192];
         } params;
 };