diff options
author | Seema Khowala <seemaj@nvidia.com> | 2017-09-28 19:57:16 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-10-03 16:35:48 -0400 |
commit | f63f96866dd3cd696e37cf7e83d419cca4f965fa (patch) | |
tree | 7d457855a5018e41fc6d3d53df003c506abf5cb3 /drivers | |
parent | 058485d28538b033636180c11592a9088878c807 (diff) |
gpu: nvgpu: gv11b: init therm regs for pwr/clk
init *eng_delay*, *eng_idle_filt*, *fecs_idle_filter*
and *hubmmu_idle_filter* in therm regs.
Change-Id: I4ab5374084e993cd96ef28ace87b6013b996178d
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1570556
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/nvgpu/Makefile | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/hal_gv11b.c | 3 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/therm_gv11b.c | 75 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gv11b/therm_gv11b.h | 28 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_therm_gv11b.h | 24 |
5 files changed, 130 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/Makefile b/drivers/gpu/nvgpu/Makefile index d0a015bb..bbc1118d 100644 --- a/drivers/gpu/nvgpu/Makefile +++ b/drivers/gpu/nvgpu/Makefile | |||
@@ -18,6 +18,7 @@ nvgpu-y += \ | |||
18 | $(nvgpu-t19x)/gv11b/acr_gv11b.o \ | 18 | $(nvgpu-t19x)/gv11b/acr_gv11b.o \ |
19 | $(nvgpu-t19x)/gv11b/subctx_gv11b.o \ | 19 | $(nvgpu-t19x)/gv11b/subctx_gv11b.o \ |
20 | $(nvgpu-t19x)/gv11b/regops_gv11b.o \ | 20 | $(nvgpu-t19x)/gv11b/regops_gv11b.o \ |
21 | $(nvgpu-t19x)/gv11b/therm_gv11b.o \ | ||
21 | $(nvgpu-t19x)/gv100/mm_gv100.o \ | 22 | $(nvgpu-t19x)/gv100/mm_gv100.o \ |
22 | $(nvgpu-t19x)/gv100/gr_ctx_gv100.o \ | 23 | $(nvgpu-t19x)/gv100/gr_ctx_gv100.o \ |
23 | $(nvgpu-t19x)/gv100/fb_gv100.o \ | 24 | $(nvgpu-t19x)/gv100/fb_gv100.o \ |
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index 9baa3581..f2fb9972 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c | |||
@@ -81,6 +81,7 @@ | |||
81 | #include "gv11b_gating_reglist.h" | 81 | #include "gv11b_gating_reglist.h" |
82 | #include "regops_gv11b.h" | 82 | #include "regops_gv11b.h" |
83 | #include "subctx_gv11b.h" | 83 | #include "subctx_gv11b.h" |
84 | #include "therm_gv11b.h" | ||
84 | 85 | ||
85 | #include <nvgpu/bus.h> | 86 | #include <nvgpu/bus.h> |
86 | #include <nvgpu/debug.h> | 87 | #include <nvgpu/debug.h> |
@@ -553,7 +554,7 @@ static const struct gpu_ops gv11b_ops = { | |||
553 | }, | 554 | }, |
554 | .therm = { | 555 | .therm = { |
555 | .init_therm_setup_hw = gp10b_init_therm_setup_hw, | 556 | .init_therm_setup_hw = gp10b_init_therm_setup_hw, |
556 | .elcg_init_idle_filters = gp10b_elcg_init_idle_filters, | 557 | .elcg_init_idle_filters = gv11b_elcg_init_idle_filters, |
557 | }, | 558 | }, |
558 | .pmu = { | 559 | .pmu = { |
559 | .pmu_setup_elpg = gp10b_pmu_setup_elpg, | 560 | .pmu_setup_elpg = gp10b_pmu_setup_elpg, |
diff --git a/drivers/gpu/nvgpu/gv11b/therm_gv11b.c b/drivers/gpu/nvgpu/gv11b/therm_gv11b.c new file mode 100644 index 00000000..18987119 --- /dev/null +++ b/drivers/gpu/nvgpu/gv11b/therm_gv11b.c | |||
@@ -0,0 +1,75 @@ | |||
1 | /* | ||
2 | * GV11B Therm | ||
3 | * | ||
4 | * Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved. | ||
5 | * | ||
6 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
7 | * copy of this software and associated documentation files (the "Software"), | ||
8 | * to deal in the Software without restriction, including without limitation | ||
9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
10 | * and/or sell copies of the Software, and to permit persons to whom the | ||
11 | * Software is furnished to do so, subject to the following conditions: | ||
12 | * | ||
13 | * The above copyright notice and this permission notice shall be included in | ||
14 | * all copies or substantial portions of the Software. | ||
15 | * | ||
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | ||
21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
22 | * DEALINGS IN THE SOFTWARE. | ||
23 | */ | ||
24 | |||
25 | #include "gk20a/gk20a.h" | ||
26 | |||
27 | #include <nvgpu/soc.h> | ||
28 | |||
29 | #include <nvgpu/hw/gv11b/hw_therm_gv11b.h> | ||
30 | |||
31 | int gv11b_elcg_init_idle_filters(struct gk20a *g) | ||
32 | { | ||
33 | u32 gate_ctrl, idle_filter; | ||
34 | u32 engine_id; | ||
35 | u32 active_engine_id = 0; | ||
36 | struct fifo_gk20a *f = &g->fifo; | ||
37 | |||
38 | if (nvgpu_platform_is_simulation(g)) | ||
39 | return 0; | ||
40 | |||
41 | gk20a_dbg_info("init clock/power gate reg"); | ||
42 | |||
43 | for (engine_id = 0; engine_id < f->num_engines; engine_id++) { | ||
44 | active_engine_id = f->active_engines_list[engine_id]; | ||
45 | |||
46 | gate_ctrl = gk20a_readl(g, therm_gate_ctrl_r(active_engine_id)); | ||
47 | gate_ctrl = set_field(gate_ctrl, | ||
48 | therm_gate_ctrl_eng_idle_filt_exp_m(), | ||
49 | therm_gate_ctrl_eng_idle_filt_exp__prod_f()); | ||
50 | gate_ctrl = set_field(gate_ctrl, | ||
51 | therm_gate_ctrl_eng_idle_filt_mant_m(), | ||
52 | therm_gate_ctrl_eng_idle_filt_mant__prod_f()); | ||
53 | gate_ctrl = set_field(gate_ctrl, | ||
54 | therm_gate_ctrl_eng_delay_before_m(), | ||
55 | therm_gate_ctrl_eng_delay_before__prod_f()); | ||
56 | gate_ctrl = set_field(gate_ctrl, | ||
57 | therm_gate_ctrl_eng_delay_after_m(), | ||
58 | therm_gate_ctrl_eng_delay_after__prod_f()); | ||
59 | gk20a_writel(g, therm_gate_ctrl_r(active_engine_id), gate_ctrl); | ||
60 | } | ||
61 | |||
62 | idle_filter = gk20a_readl(g, therm_fecs_idle_filter_r()); | ||
63 | idle_filter = set_field(idle_filter, | ||
64 | therm_fecs_idle_filter_value_m(), | ||
65 | therm_fecs_idle_filter_value__prod_f()); | ||
66 | gk20a_writel(g, therm_fecs_idle_filter_r(), idle_filter); | ||
67 | |||
68 | idle_filter = gk20a_readl(g, therm_hubmmu_idle_filter_r()); | ||
69 | idle_filter = set_field(idle_filter, | ||
70 | therm_hubmmu_idle_filter_value_m(), | ||
71 | therm_hubmmu_idle_filter_value__prod_f()); | ||
72 | gk20a_writel(g, therm_hubmmu_idle_filter_r(), idle_filter); | ||
73 | |||
74 | return 0; | ||
75 | } | ||
diff --git a/drivers/gpu/nvgpu/gv11b/therm_gv11b.h b/drivers/gpu/nvgpu/gv11b/therm_gv11b.h new file mode 100644 index 00000000..1d89597b --- /dev/null +++ b/drivers/gpu/nvgpu/gv11b/therm_gv11b.h | |||
@@ -0,0 +1,28 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
5 | * copy of this software and associated documentation files (the "Software"), | ||
6 | * to deal in the Software without restriction, including without limitation | ||
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
9 | * Software is furnished to do so, subject to the following conditions: | ||
10 | * | ||
11 | * The above copyright notice and this permission notice shall be included in | ||
12 | * all copies or substantial portions of the Software. | ||
13 | * | ||
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
17 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
18 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | ||
19 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
20 | * DEALINGS IN THE SOFTWARE. | ||
21 | */ | ||
22 | #ifndef THERM_GV11B_H | ||
23 | #define THERM_GV11B_H | ||
24 | |||
25 | struct gk20a; | ||
26 | int gv11b_elcg_init_idle_filters(struct gk20a *g); | ||
27 | |||
28 | #endif /* THERM_GV11B_H */ | ||
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_therm_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_therm_gv11b.h index 64a7e292..b47e37f4 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_therm_gv11b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_therm_gv11b.h | |||
@@ -240,6 +240,10 @@ static inline u32 therm_gate_ctrl_eng_idle_filt_exp_m(void) | |||
240 | { | 240 | { |
241 | return 0x1f << 8; | 241 | return 0x1f << 8; |
242 | } | 242 | } |
243 | static inline u32 therm_gate_ctrl_eng_idle_filt_exp__prod_f(void) | ||
244 | { | ||
245 | return 0x200; | ||
246 | } | ||
243 | static inline u32 therm_gate_ctrl_eng_idle_filt_mant_f(u32 v) | 247 | static inline u32 therm_gate_ctrl_eng_idle_filt_mant_f(u32 v) |
244 | { | 248 | { |
245 | return (v & 0x7) << 13; | 249 | return (v & 0x7) << 13; |
@@ -248,6 +252,10 @@ static inline u32 therm_gate_ctrl_eng_idle_filt_mant_m(void) | |||
248 | { | 252 | { |
249 | return 0x7 << 13; | 253 | return 0x7 << 13; |
250 | } | 254 | } |
255 | static inline u32 therm_gate_ctrl_eng_idle_filt_mant__prod_f(void) | ||
256 | { | ||
257 | return 0x2000; | ||
258 | } | ||
251 | static inline u32 therm_gate_ctrl_eng_delay_before_f(u32 v) | 259 | static inline u32 therm_gate_ctrl_eng_delay_before_f(u32 v) |
252 | { | 260 | { |
253 | return (v & 0xf) << 16; | 261 | return (v & 0xf) << 16; |
@@ -256,6 +264,10 @@ static inline u32 therm_gate_ctrl_eng_delay_before_m(void) | |||
256 | { | 264 | { |
257 | return 0xf << 16; | 265 | return 0xf << 16; |
258 | } | 266 | } |
267 | static inline u32 therm_gate_ctrl_eng_delay_before__prod_f(void) | ||
268 | { | ||
269 | return 0x40000; | ||
270 | } | ||
259 | static inline u32 therm_gate_ctrl_eng_delay_after_f(u32 v) | 271 | static inline u32 therm_gate_ctrl_eng_delay_after_f(u32 v) |
260 | { | 272 | { |
261 | return (v & 0xf) << 20; | 273 | return (v & 0xf) << 20; |
@@ -264,6 +276,10 @@ static inline u32 therm_gate_ctrl_eng_delay_after_m(void) | |||
264 | { | 276 | { |
265 | return 0xf << 20; | 277 | return 0xf << 20; |
266 | } | 278 | } |
279 | static inline u32 therm_gate_ctrl_eng_delay_after__prod_f(void) | ||
280 | { | ||
281 | return 0x0; | ||
282 | } | ||
267 | static inline u32 therm_fecs_idle_filter_r(void) | 283 | static inline u32 therm_fecs_idle_filter_r(void) |
268 | { | 284 | { |
269 | return 0x00020288; | 285 | return 0x00020288; |
@@ -272,6 +288,10 @@ static inline u32 therm_fecs_idle_filter_value_m(void) | |||
272 | { | 288 | { |
273 | return 0xffffffff << 0; | 289 | return 0xffffffff << 0; |
274 | } | 290 | } |
291 | static inline u32 therm_fecs_idle_filter_value__prod_f(void) | ||
292 | { | ||
293 | return 0x0; | ||
294 | } | ||
275 | static inline u32 therm_hubmmu_idle_filter_r(void) | 295 | static inline u32 therm_hubmmu_idle_filter_r(void) |
276 | { | 296 | { |
277 | return 0x0002028c; | 297 | return 0x0002028c; |
@@ -280,6 +300,10 @@ static inline u32 therm_hubmmu_idle_filter_value_m(void) | |||
280 | { | 300 | { |
281 | return 0xffffffff << 0; | 301 | return 0xffffffff << 0; |
282 | } | 302 | } |
303 | static inline u32 therm_hubmmu_idle_filter_value__prod_f(void) | ||
304 | { | ||
305 | return 0x0; | ||
306 | } | ||
283 | static inline u32 therm_clk_slowdown_r(u32 i) | 307 | static inline u32 therm_clk_slowdown_r(u32 i) |
284 | { | 308 | { |
285 | return 0x00020160 + i*4; | 309 | return 0x00020160 + i*4; |