diff options
author | Kevin Huang <kevinh@nvidia.com> | 2014-04-02 21:36:42 -0400 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2015-03-18 15:08:59 -0400 |
commit | ea76deaa6a6da3167a3baf7fdcf10b9ebc92d296 (patch) | |
tree | 1547c38218f98c218fe87dfb5fb8821cc782027a /drivers | |
parent | bde3d332f94c452fbecf5bccc26a075c966d2471 (diff) |
video: tegra: host: fix the bundle corruption
Wait for FE idle between SW bundles.
Bug 1477234
Bug 1486347
Bug 1485069
Change-Id: I5181b1240fff73cfecd07aa3e54076cde800ea00
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/391591
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 31 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h | 8 |
2 files changed, 38 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 0f93940b..ced1f62f 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -322,6 +322,34 @@ static int gr_gk20a_wait_idle(struct gk20a *g, unsigned long end_jiffies, | |||
322 | return -EAGAIN; | 322 | return -EAGAIN; |
323 | } | 323 | } |
324 | 324 | ||
325 | static int gr_gk20a_wait_fe_idle(struct gk20a *g, unsigned long end_jiffies, | ||
326 | u32 expect_delay) | ||
327 | { | ||
328 | u32 val; | ||
329 | u32 delay = expect_delay; | ||
330 | |||
331 | gk20a_dbg_fn(""); | ||
332 | |||
333 | do { | ||
334 | val = gk20a_readl(g, gr_status_r()); | ||
335 | |||
336 | if (!gr_status_fe_method_upper_v(val) && | ||
337 | !gr_status_fe_method_lower_v(val) && | ||
338 | !gr_status_fe_method_fe_gi_v(val)) { | ||
339 | gk20a_dbg_fn("done"); | ||
340 | return 0; | ||
341 | } | ||
342 | |||
343 | usleep_range(delay, delay * 2); | ||
344 | delay = min_t(u32, delay << 1, GR_IDLE_CHECK_MAX); | ||
345 | } while (time_before(jiffies, end_jiffies) | ||
346 | || !tegra_platform_is_silicon()); | ||
347 | |||
348 | gk20a_err(dev_from_gk20a(g), | ||
349 | "timeout, fe busy : %x", val); | ||
350 | |||
351 | return -EAGAIN; | ||
352 | } | ||
325 | static int gr_gk20a_ctx_reset(struct gk20a *g, u32 rst_mask) | 353 | static int gr_gk20a_ctx_reset(struct gk20a *g, u32 rst_mask) |
326 | { | 354 | { |
327 | u32 delay = GR_IDLE_CHECK_DEFAULT; | 355 | u32 delay = GR_IDLE_CHECK_DEFAULT; |
@@ -1475,7 +1503,8 @@ static u32 gk20a_init_sw_bundle(struct gk20a *g) | |||
1475 | 1503 | ||
1476 | /* load bundle init */ | 1504 | /* load bundle init */ |
1477 | for (i = 0; i < sw_bundle_init->count; i++) { | 1505 | for (i = 0; i < sw_bundle_init->count; i++) { |
1478 | 1506 | err |= gr_gk20a_wait_fe_idle(g, end_jiffies, | |
1507 | GR_IDLE_CHECK_DEFAULT); | ||
1479 | if (i == 0 || last_bundle_data != sw_bundle_init->l[i].value) { | 1508 | if (i == 0 || last_bundle_data != sw_bundle_init->l[i].value) { |
1480 | gk20a_writel(g, gr_pipe_bundle_data_r(), | 1509 | gk20a_writel(g, gr_pipe_bundle_data_r(), |
1481 | sw_bundle_init->l[i].value); | 1510 | sw_bundle_init->l[i].value); |
diff --git a/drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h index ece7602d..4e7ada14 100644 --- a/drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h | |||
@@ -234,6 +234,10 @@ static inline u32 gr_status_r(void) | |||
234 | { | 234 | { |
235 | return 0x00400700; | 235 | return 0x00400700; |
236 | } | 236 | } |
237 | static inline u32 gr_status_fe_method_upper_v(u32 r) | ||
238 | { | ||
239 | return (r >> 1) & 0x1; | ||
240 | } | ||
237 | static inline u32 gr_status_fe_method_lower_v(u32 r) | 241 | static inline u32 gr_status_fe_method_lower_v(u32 r) |
238 | { | 242 | { |
239 | return (r >> 2) & 0x1; | 243 | return (r >> 2) & 0x1; |
@@ -242,6 +246,10 @@ static inline u32 gr_status_fe_method_lower_idle_v(void) | |||
242 | { | 246 | { |
243 | return 0x00000000; | 247 | return 0x00000000; |
244 | } | 248 | } |
249 | static inline u32 gr_status_fe_method_fe_gi_v(u32 r) | ||
250 | { | ||
251 | return (r >> 21) & 0x1; | ||
252 | } | ||
245 | static inline u32 gr_status_mask_r(void) | 253 | static inline u32 gr_status_mask_r(void) |
246 | { | 254 | { |
247 | return 0x00400610; | 255 | return 0x00400610; |