gpu: nvgpu: API to push fecs sideband methods

Add new API gr_gk20a_submit_fecs_sideband_method_op()
to support pushing fecs sideband methods

Bug 200156699

Change-Id: Ibacd7d03e05b3b67416aa2148a741ffc6e2215c9
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/927135
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

2 files changed, 28 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index 152d3f5e..55262a8f 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -535,6 +535,32 @@ int gr_gk20a_submit_fecs_method_op(struct gk20a *g,
         return ret;
 }
 
+/* Sideband mailbox writes are done a bit differently */
+int gr_gk20a_submit_fecs_sideband_method_op(struct gk20a *g,
+                struct fecs_method_op_gk20a op)
+{
+        struct gr_gk20a *gr = &g->gr;
+        int ret;
+
+        mutex_lock(&gr->fecs_mutex);
+
+        gk20a_writel(g, gr_fecs_ctxsw_mailbox_clear_r(op.mailbox.id),
+                gr_fecs_ctxsw_mailbox_clear_value_f(op.mailbox.clr));
+
+        gk20a_writel(g, gr_fecs_method_data_r(), op.method.data);
+        gk20a_writel(g, gr_fecs_method_push_r(),
+                gr_fecs_method_push_adr_f(op.method.addr));
+
+        ret = gr_gk20a_ctx_wait_ucode(g, op.mailbox.id, op.mailbox.ret,
+                                      op.cond.ok, op.mailbox.ok,
+                                      op.cond.fail, op.mailbox.fail,
+                                      false);
+
+        mutex_unlock(&gr->fecs_mutex);
+
+        return ret;
+}
+
 static int gr_gk20a_ctrl_ctxsw(struct gk20a *g, u32 fecs_method, u32 *ret)
 {
         return gr_gk20a_submit_fecs_method_op(g,
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
index 42e9fa5c..94d7c811 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
@@ -519,6 +519,8 @@ int gr_gk20a_init_ctx_state(struct gk20a *g);
 int gr_gk20a_submit_fecs_method_op(struct gk20a *g,
                                    struct fecs_method_op_gk20a op,
                                    bool sleepduringwait);
+int gr_gk20a_submit_fecs_sideband_method_op(struct gk20a *g,
+                struct fecs_method_op_gk20a op);
 int gr_gk20a_alloc_gr_ctx(struct gk20a *g,
                           struct gr_ctx_desc **__gr_ctx, struct vm_gk20a *vm,
                           u32 class, u32 padding);