gpu: nvgpu: Fix off-by-one error in PDE calculations

The number of entries in the next level PDE data structure was one
half of what was needed since the bit shift was 1 bit too small.

Change-Id: Id4981f230dd206ae94336cddab117312e143e6a1
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/740727
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 1 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
index 30bfd5a2..7d359ff4 100644
--- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
@@ -2134,7 +2134,7 @@ static int update_gmmu_level_locked(struct vm_gk20a *vm,
                                 int num_entries =
                                         1 <<
                                          (l->hi_bit[pgsz_idx]
-                                          - l->lo_bit[pgsz_idx]);
+                                          - l->lo_bit[pgsz_idx] + 1);
                                 pte->entries =
                                         kzalloc(sizeof(struct gk20a_mm_entry) *
                                                 num_entries, GFP_KERNEL);