gpu: nvgpu: gm20b: add fuse clock for GPU

Bug: 200233943

Change-Id: I8eb2f3cf45b23d7d4e30bf4d5dfc2d6f09c8481e
Signed-off-by: Shreshtha SAHU <ssahu@nvidia.com>
Reviewed-on: http://git-master/r/1250979
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Joseph Lo <josephl@nvidia.com>

2 files changed, 16 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/platform_gk20a.h b/drivers/gpu/nvgpu/gk20a/platform_gk20a.h
index c0b847e5..94b8d157 100644
--- a/drivers/gpu/nvgpu/gk20a/platform_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/platform_gk20a.h
@@ -19,6 +19,8 @@
 #include <linux/device.h>
 #include <linux/dma-attrs.h>
 
+#define GK20A_CLKS_MAX          4
+
 struct gk20a;
 struct channel_gk20a;
 struct gr_ctx_buffer_desc;
@@ -65,7 +67,7 @@ struct gk20a_platform {
 
         /* Clock configuration is stored here. Platform probe is responsible
          * for filling this data. */
-        struct clk *clk[3];
+        struct clk *clk[GK20A_CLKS_MAX];
         int num_clks;
 
 #ifdef CONFIG_RESET_CONTROLLER
diff --git a/drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c b/drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c
index 933fe2d8..40e7cead 100644
--- a/drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c
+++ b/drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c
@@ -492,6 +492,8 @@ static int gm20b_tegra_railgate(struct device *dev)
         clk_disable_unprepare(platform->clk_reset);
         clk_disable_unprepare(platform->clk[0]);
         clk_disable_unprepare(platform->clk[1]);
+        if (platform->clk[3])
+                clk_disable_unprepare(platform->clk[3]);
 
         udelay(10);
 
@@ -569,6 +571,14 @@ static int gm20b_tegra_unrailgate(struct device *dev)
                         gk20a_err(dev, "could not turn on pwr clock");
                         goto err_clk_on;
                 }
+
+                if (platform->clk[3]) {
+                        ret = clk_prepare_enable(platform->clk[3]);
+                        if (ret) {
+                                gk20a_err(dev, "could not turn on fuse clock");
+                                goto err_clk_on;
+                        }
+                }
         }
 
         udelay(10);
@@ -617,6 +627,7 @@ static struct {
         {"gpu_ref", UINT_MAX},
         {"pll_p_out5", 204000000},
         {"emc", UINT_MAX},
+        {"fuse", UINT_MAX},
 #endif
 };
 
@@ -636,6 +647,8 @@ static int gk20a_tegra_get_clocks(struct device *dev)
         int i;
         int ret = 0;
 
+        BUG_ON(GK20A_CLKS_MAX < ARRAY_SIZE(tegra_gk20a_clocks));
+
         snprintf(devname, sizeof(devname), "tegra_%s", dev_name(dev));
 
         platform->num_clks = 0;