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authorArto Merilainen <amerilainen@nvidia.com>2014-07-03 05:07:30 -0400
committerDan Willemsen <dwillemsen@nvidia.com>2015-03-18 15:10:24 -0400
commitd608aa53ee338922cbd47ec144cd6efb36fd0295 (patch)
treeb713238e0541dec4f85d45ee68276b5e643b8421 /drivers
parentf554ab30463438e5ce76ecf897a527ba5881fdbf (diff)
Revert "gpu: nvgpu: Dump offending push buffer fragment"
Channel and gpfifo allocations are entirely separated from each other, however, the code here assumes that active channel means that the channel also has a gpfifo. This reverts commit a24602f094380539788696d1b1567a4f4d914b17 which added gpfifo dump. Changing debug dumping to be safe requires refactoring the channel release code to use proper locking. Bug 1530226 Change-Id: I2fb02542a17dd56a0a9ce732b327e34b85ade8b9 Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/434038 Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-by: Shridhar Rasal <srasal@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/nvgpu/gk20a/channel_gk20a.c15
-rw-r--r--drivers/gpu/nvgpu/gk20a/channel_gk20a.h2
-rw-r--r--drivers/gpu/nvgpu/gk20a/debug_gk20a.c132
-rw-r--r--drivers/gpu/nvgpu/gk20a/fifo_gk20a.c6
4 files changed, 23 insertions, 132 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
index b4d9c785..78e52c62 100644
--- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
@@ -933,21 +933,6 @@ static void channel_gk20a_free_priv_cmdbuf(struct channel_gk20a *c)
933 memset(q, 0, sizeof(struct priv_cmd_queue)); 933 memset(q, 0, sizeof(struct priv_cmd_queue));
934} 934}
935 935
936int gk20a_find_from_priv_cmdbuf(struct channel_gk20a *c,
937 u64 gpu_va, u32 **cpu_va)
938{
939 struct priv_cmd_queue *q = &c->priv_cmd_q;
940 int ret;
941
942 if (gpu_va >= q->base_gpuva && gpu_va < (q->base_gpuva + q->size)) {
943 *cpu_va = gpu_va - q->base_gpuva + q->mem.base_cpuva;
944 ret = 0;
945 } else
946 ret = -EINVAL;
947
948 return ret;
949}
950
951/* allocate a cmd buffer with given size. size is number of u32 entries */ 936/* allocate a cmd buffer with given size. size is number of u32 entries */
952int gk20a_channel_alloc_priv_cmdbuf(struct channel_gk20a *c, u32 orig_size, 937int gk20a_channel_alloc_priv_cmdbuf(struct channel_gk20a *c, u32 orig_size,
953 struct priv_cmd_entry **entry) 938 struct priv_cmd_entry **entry)
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.h b/drivers/gpu/nvgpu/gk20a/channel_gk20a.h
index 21949012..08bc06c2 100644
--- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.h
@@ -162,8 +162,6 @@ void gk20a_set_error_notifier(struct channel_gk20a *ch, __u32 error);
162void gk20a_channel_semaphore_wakeup(struct gk20a *g); 162void gk20a_channel_semaphore_wakeup(struct gk20a *g);
163int gk20a_channel_alloc_priv_cmdbuf(struct channel_gk20a *c, u32 size, 163int gk20a_channel_alloc_priv_cmdbuf(struct channel_gk20a *c, u32 size,
164 struct priv_cmd_entry **entry); 164 struct priv_cmd_entry **entry);
165int gk20a_find_from_priv_cmdbuf(struct channel_gk20a *c,
166 u64 addr, u32 **cpu_va);
167 165
168int gk20a_channel_suspend(struct gk20a *g); 166int gk20a_channel_suspend(struct gk20a *g);
169int gk20a_channel_resume(struct gk20a *g); 167int gk20a_channel_resume(struct gk20a *g);
diff --git a/drivers/gpu/nvgpu/gk20a/debug_gk20a.c b/drivers/gpu/nvgpu/gk20a/debug_gk20a.c
index c607b138..f5e0b73d 100644
--- a/drivers/gpu/nvgpu/gk20a/debug_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/debug_gk20a.c
@@ -19,7 +19,6 @@
19#include <linux/seq_file.h> 19#include <linux/seq_file.h>
20 20
21#include <linux/io.h> 21#include <linux/io.h>
22#include <linux/dma-buf.h>
23 22
24#include "gk20a.h" 23#include "gk20a.h"
25#include "debug_gk20a.h" 24#include "debug_gk20a.h"
@@ -34,7 +33,6 @@ struct platform_device *gk20a_device;
34 33
35struct gk20a_debug_output { 34struct gk20a_debug_output {
36 void (*fn)(void *ctx, const char *str, size_t len); 35 void (*fn)(void *ctx, const char *str, size_t len);
37 void (*cont)(void *ctx, const char *str, size_t len);
38 void *ctx; 36 void *ctx;
39 char buf[256]; 37 char buf[256];
40}; 38};
@@ -82,12 +80,6 @@ static inline void gk20a_debug_write_printk(void *ctx, const char *str,
82 pr_info("%s", str); 80 pr_info("%s", str);
83} 81}
84 82
85static inline void gk20a_debug_cont_printk(void *ctx, const char *str,
86 size_t len)
87{
88 pr_cont("%s", str);
89}
90
91static inline void gk20a_debug_write_to_seqfile(void *ctx, const char *str, 83static inline void gk20a_debug_write_to_seqfile(void *ctx, const char *str,
92 size_t len) 84 size_t len)
93{ 85{
@@ -105,17 +97,6 @@ void gk20a_debug_output(struct gk20a_debug_output *o, const char *fmt, ...)
105 o->fn(o->ctx, o->buf, len); 97 o->fn(o->ctx, o->buf, len);
106} 98}
107 99
108void gk20a_debug_output_cont(struct gk20a_debug_output *o, const char *fmt, ...)
109{
110 va_list args;
111 int len;
112
113 va_start(args, fmt);
114 len = vsnprintf(o->buf, sizeof(o->buf), fmt, args);
115 va_end(args);
116 o->cont(o->ctx, o->buf, len);
117}
118
119static void gk20a_debug_show_channel(struct gk20a *g, 100static void gk20a_debug_show_channel(struct gk20a *g,
120 struct gk20a_debug_output *o, 101 struct gk20a_debug_output *o,
121 struct channel_gk20a *ch) 102 struct channel_gk20a *ch)
@@ -132,14 +113,14 @@ static void gk20a_debug_show_channel(struct gk20a *g,
132 syncpointa = gk20a_mem_rd32(inst_ptr, ram_fc_syncpointa_w()); 113 syncpointa = gk20a_mem_rd32(inst_ptr, ram_fc_syncpointa_w());
133 syncpointb = gk20a_mem_rd32(inst_ptr, ram_fc_syncpointb_w()); 114 syncpointb = gk20a_mem_rd32(inst_ptr, ram_fc_syncpointb_w());
134 115
135 gk20a_debug_output_cont(o, "%d-%s, pid %d: ", ch->hw_chid, 116 gk20a_debug_output(o, "%d-%s, pid %d: ", ch->hw_chid,
136 ch->g->dev->name, 117 ch->g->dev->name,
137 ch->pid); 118 ch->pid);
138 gk20a_debug_output_cont(o, "%s in use %s %s\n", 119 gk20a_debug_output(o, "%s in use %s %s\n",
139 ccsr_channel_enable_v(channel) ? "" : "not", 120 ccsr_channel_enable_v(channel) ? "" : "not",
140 ccsr_chan_status_str[status], 121 ccsr_chan_status_str[status],
141 ccsr_channel_busy_v(channel) ? "busy" : "not busy"); 122 ccsr_channel_busy_v(channel) ? "busy" : "not busy");
142 gk20a_debug_output_cont(o, "TOP: %016llx PUT: %016llx GET: %016llx " 123 gk20a_debug_output(o, "TOP: %016llx PUT: %016llx GET: %016llx "
143 "FETCH: %016llx\nHEADER: %08x COUNT: %08x\n" 124 "FETCH: %016llx\nHEADER: %08x COUNT: %08x\n"
144 "SYNCPOINT %08x %08x SEMAPHORE %08x %08x %08x %08x\n", 125 "SYNCPOINT %08x %08x SEMAPHORE %08x %08x %08x %08x\n",
145 (u64)gk20a_mem_rd32(inst_ptr, ram_fc_pb_top_level_get_w()) + 126 (u64)gk20a_mem_rd32(inst_ptr, ram_fc_pb_top_level_get_w()) +
@@ -163,81 +144,14 @@ static void gk20a_debug_show_channel(struct gk20a *g,
163 if ((pbdma_syncpointb_op_v(syncpointb) == pbdma_syncpointb_op_wait_v()) 144 if ((pbdma_syncpointb_op_v(syncpointb) == pbdma_syncpointb_op_wait_v())
164 && (pbdma_syncpointb_wait_switch_v(syncpointb) == 145 && (pbdma_syncpointb_wait_switch_v(syncpointb) ==
165 pbdma_syncpointb_wait_switch_en_v())) 146 pbdma_syncpointb_wait_switch_en_v()))
166 gk20a_debug_output_cont(o, "%s on syncpt %u (%s) val %u\n", 147 gk20a_debug_output(o, "%s on syncpt %u (%s) val %u\n",
167 (status == 3 || status == 8) ? "Waiting" : "Waited", 148 (status == 3 || status == 8) ? "Waiting" : "Waited",
168 pbdma_syncpointb_syncpt_index_v(syncpointb), 149 pbdma_syncpointb_syncpt_index_v(syncpointb),
169 nvhost_syncpt_get_name(g->host1x_dev, 150 nvhost_syncpt_get_name(g->host1x_dev,
170 pbdma_syncpointb_syncpt_index_v(syncpointb)), 151 pbdma_syncpointb_syncpt_index_v(syncpointb)),
171 pbdma_syncpointa_payload_v(syncpointa)); 152 pbdma_syncpointa_payload_v(syncpointa));
172 153
173 gk20a_debug_output_cont(o, "\n"); 154 gk20a_debug_output(o, "\n");
174}
175
176static void gk20a_dump_gpfifo(struct channel_gk20a *ch,
177 struct gpfifo *g, struct gk20a_debug_output *o)
178{
179 struct dma_buf *pb = NULL;
180 u32 *pb_cpu_va = NULL;
181 u64 pb_offset = 0;
182 int i, err = 0;
183
184 u64 gpu_va = (u64)g->entry0
185 | (u64)pbdma_gp_entry1_get_hi_v(g->entry1) << 32ULL;
186 u32 length = pbdma_gp_entry1_length_v(g->entry1);
187
188 if (gk20a_find_from_priv_cmdbuf(ch, gpu_va, &pb_cpu_va)) {
189 gk20a_debug_output_cont(o, "U: ");
190 err = gk20a_vm_find_buffer(ch->vm, gpu_va, &pb, &pb_offset);
191 }
192 if (err) {
193 gk20a_debug_output_cont(o, "Couldn't find push buffer\n");
194 return;
195 }
196
197 if (pb)
198 pb_cpu_va = dma_buf_vmap(pb);
199 for (i = 0; i < length; i++) {
200 if (i && i % 8 == 0)
201 gk20a_debug_output_cont(o, "\n");
202 gk20a_debug_output_cont(o, "%08x ", *(pb_cpu_va + (pb_offset/4) + i));
203 }
204
205 if (pb)
206 dma_buf_vunmap(pb, pb_cpu_va);
207
208 gk20a_debug_output_cont(o, "\n");
209}
210
211static void gk20a_dump_pb(struct gk20a *g,
212 u32 pbdma_id, struct gk20a_debug_output *o)
213{
214 u32 gp_get = gk20a_readl(g, pbdma_gp_get_r(pbdma_id));
215 u32 status = gk20a_readl(g, fifo_pbdma_status_r(pbdma_id));
216 u32 chan_status = fifo_pbdma_status_chan_status_v(status);
217 u32 hw_chid = fifo_pbdma_status_id_v(status);
218 struct channel_gk20a *ch = g->fifo.channel+ hw_chid;
219
220 gk20a_debug_output_cont(o, "%s pbdma %d: ", g->dev->name, pbdma_id);
221 gk20a_debug_output_cont(o,
222 "id: %d (%s), next_id: %d (%s) status: %s\n",
223 fifo_pbdma_status_id_v(status),
224 fifo_pbdma_status_id_type_v(status) ?
225 "tsg" : "channel",
226 fifo_pbdma_status_next_id_v(status),
227 fifo_pbdma_status_next_id_type_v(status) ?
228 "tsg" : "channel",
229 chan_status_str[chan_status]);
230 gk20a_debug_output_cont(o, "PUT: %08x GET: %08x "
231 "FETCH: %08x HEADER: %08x\n",
232 gk20a_readl(g, pbdma_gp_put_r(pbdma_id)),
233 gk20a_readl(g, pbdma_gp_get_r(pbdma_id)),
234 gk20a_readl(g, pbdma_gp_fetch_r(pbdma_id)),
235 gk20a_readl(g, pbdma_pb_header_r(pbdma_id)));
236
237 if (ch->in_use) {
238 gk20a_dump_gpfifo(ch, &ch->gpfifo.cpu_va[(gp_get-2) % ch->gpfifo.entry_num], o);
239 gk20a_dump_gpfifo(ch, &ch->gpfifo.cpu_va[(gp_get-1) % ch->gpfifo.entry_num], o);
240 }
241} 155}
242 156
243void gk20a_debug_show_dump(struct platform_device *pdev, 157void gk20a_debug_show_dump(struct platform_device *pdev,
@@ -250,13 +164,12 @@ void gk20a_debug_show_dump(struct platform_device *pdev,
250 int i; 164 int i;
251 165
252 gk20a_busy(g->dev); 166 gk20a_busy(g->dev);
253 gk20a_debug_output(o, "");
254 for (i = 0; i < fifo_pbdma_status__size_1_v(); i++) { 167 for (i = 0; i < fifo_pbdma_status__size_1_v(); i++) {
255 u32 status = gk20a_readl(g, fifo_pbdma_status_r(i)); 168 u32 status = gk20a_readl(g, fifo_pbdma_status_r(i));
256 u32 chan_status = fifo_pbdma_status_chan_status_v(status); 169 u32 chan_status = fifo_pbdma_status_chan_status_v(status);
257 170
258 gk20a_debug_output_cont(o, "%s pbdma %d: ", g->dev->name, i); 171 gk20a_debug_output(o, "%s pbdma %d: ", g->dev->name, i);
259 gk20a_debug_output_cont(o, 172 gk20a_debug_output(o,
260 "id: %d (%s), next_id: %d (%s) status: %s\n", 173 "id: %d (%s), next_id: %d (%s) status: %s\n",
261 fifo_pbdma_status_id_v(status), 174 fifo_pbdma_status_id_v(status),
262 fifo_pbdma_status_id_type_v(status) ? 175 fifo_pbdma_status_id_type_v(status) ?
@@ -265,23 +178,23 @@ void gk20a_debug_show_dump(struct platform_device *pdev,
265 fifo_pbdma_status_next_id_type_v(status) ? 178 fifo_pbdma_status_next_id_type_v(status) ?
266 "tsg" : "channel", 179 "tsg" : "channel",
267 chan_status_str[chan_status]); 180 chan_status_str[chan_status]);
268 gk20a_debug_output_cont(o, "PUT: %08x GET: %08x " 181 gk20a_debug_output(o, "PUT: %016llx GET: %016llx "
269 "FETCH: %08x HEADER: %08x\n", 182 "FETCH: %08x HEADER: %08x\n",
270 gk20a_readl(g, pbdma_gp_put_r(i)), 183 (u64)gk20a_readl(g, pbdma_put_r(i)) +
271 gk20a_readl(g, pbdma_gp_get_r(i)), 184 ((u64)gk20a_readl(g, pbdma_put_hi_r(i)) << 32ULL),
185 (u64)gk20a_readl(g, pbdma_get_r(i)) +
186 ((u64)gk20a_readl(g, pbdma_get_hi_r(i)) << 32ULL),
272 gk20a_readl(g, pbdma_gp_fetch_r(i)), 187 gk20a_readl(g, pbdma_gp_fetch_r(i)),
273 gk20a_readl(g, pbdma_pb_header_r(i))); 188 gk20a_readl(g, pbdma_pb_header_r(i)));
274
275 gk20a_dump_pb(g, i, o);
276 } 189 }
277 gk20a_debug_output_cont(o, "\n"); 190 gk20a_debug_output(o, "\n");
278 191
279 for (i = 0; i < fifo_engine_status__size_1_v(); i++) { 192 for (i = 0; i < fifo_engine_status__size_1_v(); i++) {
280 u32 status = gk20a_readl(g, fifo_engine_status_r(i)); 193 u32 status = gk20a_readl(g, fifo_engine_status_r(i));
281 u32 ctx_status = fifo_engine_status_ctx_status_v(status); 194 u32 ctx_status = fifo_engine_status_ctx_status_v(status);
282 195
283 gk20a_debug_output_cont(o, "%s eng %d: ", g->dev->name, i); 196 gk20a_debug_output(o, "%s eng %d: ", g->dev->name, i);
284 gk20a_debug_output_cont(o, 197 gk20a_debug_output(o,
285 "id: %d (%s), next_id: %d (%s), ctx: %s ", 198 "id: %d (%s), next_id: %d (%s), ctx: %s ",
286 fifo_engine_status_id_v(status), 199 fifo_engine_status_id_v(status),
287 fifo_engine_status_id_type_v(status) ? 200 fifo_engine_status_id_type_v(status) ?
@@ -292,12 +205,12 @@ void gk20a_debug_show_dump(struct platform_device *pdev,
292 ctx_status_str[ctx_status]); 205 ctx_status_str[ctx_status]);
293 206
294 if (fifo_engine_status_faulted_v(status)) 207 if (fifo_engine_status_faulted_v(status))
295 gk20a_debug_output_cont(o, "faulted "); 208 gk20a_debug_output(o, "faulted ");
296 if (fifo_engine_status_engine_v(status)) 209 if (fifo_engine_status_engine_v(status))
297 gk20a_debug_output_cont(o, "busy "); 210 gk20a_debug_output(o, "busy ");
298 gk20a_debug_output_cont(o, "\n"); 211 gk20a_debug_output(o, "\n");
299 } 212 }
300 gk20a_debug_output_cont(o, "\n"); 213 gk20a_debug_output(o, "\n");
301 214
302 for (chid = 0; chid < f->num_channels; chid++) { 215 for (chid = 0; chid < f->num_channels; chid++) {
303 if (f->channel[chid].in_use) { 216 if (f->channel[chid].in_use) {
@@ -312,8 +225,7 @@ void gk20a_debug_dump(struct platform_device *pdev)
312{ 225{
313 struct gk20a_platform *platform = gk20a_get_platform(pdev); 226 struct gk20a_platform *platform = gk20a_get_platform(pdev);
314 struct gk20a_debug_output o = { 227 struct gk20a_debug_output o = {
315 .fn = gk20a_debug_write_printk, 228 .fn = gk20a_debug_write_printk
316 .cont = gk20a_debug_cont_printk
317 }; 229 };
318 230
319 if (platform->dump_platform_dependencies) 231 if (platform->dump_platform_dependencies)
@@ -325,8 +237,7 @@ void gk20a_debug_dump(struct platform_device *pdev)
325void gk20a_debug_dump_device(struct platform_device *pdev) 237void gk20a_debug_dump_device(struct platform_device *pdev)
326{ 238{
327 struct gk20a_debug_output o = { 239 struct gk20a_debug_output o = {
328 .fn = gk20a_debug_write_printk, 240 .fn = gk20a_debug_write_printk
329 .cont = gk20a_debug_cont_printk
330 }; 241 };
331 242
332 /* Dump the first device if no info is provided */ 243 /* Dump the first device if no info is provided */
@@ -342,7 +253,6 @@ static int gk20a_debug_show(struct seq_file *s, void *unused)
342 struct platform_device *pdev = s->private; 253 struct platform_device *pdev = s->private;
343 struct gk20a_debug_output o = { 254 struct gk20a_debug_output o = {
344 .fn = gk20a_debug_write_to_seqfile, 255 .fn = gk20a_debug_write_to_seqfile,
345 .cont = gk20a_debug_write_to_seqfile,
346 .ctx = s, 256 .ctx = s,
347 }; 257 };
348 gk20a_debug_show_dump(pdev, &o); 258 gk20a_debug_show_dump(pdev, &o);
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
index daf40d9c..1f7b78f9 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
@@ -1191,15 +1191,13 @@ void gk20a_fifo_recover_ch(struct gk20a *g, u32 hw_chid, bool verbose)
1191 struct channel_gk20a *ch = 1191 struct channel_gk20a *ch =
1192 g->fifo.channel + hw_chid; 1192 g->fifo.channel + hw_chid;
1193 1193
1194 if (verbose)
1195 gk20a_debug_dump(g->dev);
1196
1197 gk20a_channel_abort(ch); 1194 gk20a_channel_abort(ch);
1198 for (i = 0; i < g->fifo.max_runlists; i++) 1195 for (i = 0; i < g->fifo.max_runlists; i++)
1199 gk20a_fifo_update_runlist(g, i, 1196 gk20a_fifo_update_runlist(g, i,
1200 hw_chid, false, false); 1197 hw_chid, false, false);
1201 1198
1202 gk20a_fifo_set_ctx_mmu_error(g, ch); 1199 if (gk20a_fifo_set_ctx_mmu_error(g, ch))
1200 gk20a_debug_dump(g->dev);
1203 } 1201 }
1204} 1202}
1205 1203