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authorMahantesh Kumbar <mkumbar@nvidia.com>2017-09-29 03:19:26 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-10-04 06:40:16 -0400
commitce12d5e0fe0fb9472c1862c6eaac436bb2f70669 (patch)
tree96fbc7b27c7912b69a4b81f4beed1081cc84c900 /drivers
parent14d99f1575ca34c5d200a85496eb60e9eeef1ed1 (diff)
gpu: nvgpu: falcon: Qualify unsigned HW constants
-Falcon HW header re-generate for gk20a, gm20b, gp10b & gp106. -Re-generate hardware headers so that all unsigned constants are qualified with postfix U. This removes the need for compiler to do implicit signed->unsigned conversions Change-Id: Ifdaac2c697ee7ba8be627e059bf18024a67bbd27 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1570775 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/hw/gk20a/hw_falcon_gk20a.h248
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_falcon_gm20b.h268
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_falcon_gp106.h270
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_falcon_gp10b.h270
4 files changed, 528 insertions, 528 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gk20a/hw_falcon_gk20a.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gk20a/hw_falcon_gk20a.h
index a948bf58..27fb5884 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/hw/gk20a/hw_falcon_gk20a.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gk20a/hw_falcon_gk20a.h
@@ -58,498 +58,498 @@
58 58
59static inline u32 falcon_falcon_irqsset_r(void) 59static inline u32 falcon_falcon_irqsset_r(void)
60{ 60{
61 return 0x00000000; 61 return 0x00000000U;
62} 62}
63static inline u32 falcon_falcon_irqsset_swgen0_set_f(void) 63static inline u32 falcon_falcon_irqsset_swgen0_set_f(void)
64{ 64{
65 return 0x40; 65 return 0x40U;
66} 66}
67static inline u32 falcon_falcon_irqsclr_r(void) 67static inline u32 falcon_falcon_irqsclr_r(void)
68{ 68{
69 return 0x00000004; 69 return 0x00000004U;
70} 70}
71static inline u32 falcon_falcon_irqstat_r(void) 71static inline u32 falcon_falcon_irqstat_r(void)
72{ 72{
73 return 0x00000008; 73 return 0x00000008U;
74} 74}
75static inline u32 falcon_falcon_irqstat_halt_true_f(void) 75static inline u32 falcon_falcon_irqstat_halt_true_f(void)
76{ 76{
77 return 0x10; 77 return 0x10U;
78} 78}
79static inline u32 falcon_falcon_irqstat_exterr_true_f(void) 79static inline u32 falcon_falcon_irqstat_exterr_true_f(void)
80{ 80{
81 return 0x20; 81 return 0x20U;
82} 82}
83static inline u32 falcon_falcon_irqstat_swgen0_true_f(void) 83static inline u32 falcon_falcon_irqstat_swgen0_true_f(void)
84{ 84{
85 return 0x40; 85 return 0x40U;
86} 86}
87static inline u32 falcon_falcon_irqmode_r(void) 87static inline u32 falcon_falcon_irqmode_r(void)
88{ 88{
89 return 0x0000000c; 89 return 0x0000000cU;
90} 90}
91static inline u32 falcon_falcon_irqmset_r(void) 91static inline u32 falcon_falcon_irqmset_r(void)
92{ 92{
93 return 0x00000010; 93 return 0x00000010U;
94} 94}
95static inline u32 falcon_falcon_irqmset_gptmr_f(u32 v) 95static inline u32 falcon_falcon_irqmset_gptmr_f(u32 v)
96{ 96{
97 return (v & 0x1) << 0; 97 return (v & 0x1U) << 0U;
98} 98}
99static inline u32 falcon_falcon_irqmset_wdtmr_f(u32 v) 99static inline u32 falcon_falcon_irqmset_wdtmr_f(u32 v)
100{ 100{
101 return (v & 0x1) << 1; 101 return (v & 0x1U) << 1U;
102} 102}
103static inline u32 falcon_falcon_irqmset_mthd_f(u32 v) 103static inline u32 falcon_falcon_irqmset_mthd_f(u32 v)
104{ 104{
105 return (v & 0x1) << 2; 105 return (v & 0x1U) << 2U;
106} 106}
107static inline u32 falcon_falcon_irqmset_ctxsw_f(u32 v) 107static inline u32 falcon_falcon_irqmset_ctxsw_f(u32 v)
108{ 108{
109 return (v & 0x1) << 3; 109 return (v & 0x1U) << 3U;
110} 110}
111static inline u32 falcon_falcon_irqmset_halt_f(u32 v) 111static inline u32 falcon_falcon_irqmset_halt_f(u32 v)
112{ 112{
113 return (v & 0x1) << 4; 113 return (v & 0x1U) << 4U;
114} 114}
115static inline u32 falcon_falcon_irqmset_exterr_f(u32 v) 115static inline u32 falcon_falcon_irqmset_exterr_f(u32 v)
116{ 116{
117 return (v & 0x1) << 5; 117 return (v & 0x1U) << 5U;
118} 118}
119static inline u32 falcon_falcon_irqmset_swgen0_f(u32 v) 119static inline u32 falcon_falcon_irqmset_swgen0_f(u32 v)
120{ 120{
121 return (v & 0x1) << 6; 121 return (v & 0x1U) << 6U;
122} 122}
123static inline u32 falcon_falcon_irqmset_swgen1_f(u32 v) 123static inline u32 falcon_falcon_irqmset_swgen1_f(u32 v)
124{ 124{
125 return (v & 0x1) << 7; 125 return (v & 0x1U) << 7U;
126} 126}
127static inline u32 falcon_falcon_irqmclr_r(void) 127static inline u32 falcon_falcon_irqmclr_r(void)
128{ 128{
129 return 0x00000014; 129 return 0x00000014U;
130} 130}
131static inline u32 falcon_falcon_irqmclr_gptmr_f(u32 v) 131static inline u32 falcon_falcon_irqmclr_gptmr_f(u32 v)
132{ 132{
133 return (v & 0x1) << 0; 133 return (v & 0x1U) << 0U;
134} 134}
135static inline u32 falcon_falcon_irqmclr_wdtmr_f(u32 v) 135static inline u32 falcon_falcon_irqmclr_wdtmr_f(u32 v)
136{ 136{
137 return (v & 0x1) << 1; 137 return (v & 0x1U) << 1U;
138} 138}
139static inline u32 falcon_falcon_irqmclr_mthd_f(u32 v) 139static inline u32 falcon_falcon_irqmclr_mthd_f(u32 v)
140{ 140{
141 return (v & 0x1) << 2; 141 return (v & 0x1U) << 2U;
142} 142}
143static inline u32 falcon_falcon_irqmclr_ctxsw_f(u32 v) 143static inline u32 falcon_falcon_irqmclr_ctxsw_f(u32 v)
144{ 144{
145 return (v & 0x1) << 3; 145 return (v & 0x1U) << 3U;
146} 146}
147static inline u32 falcon_falcon_irqmclr_halt_f(u32 v) 147static inline u32 falcon_falcon_irqmclr_halt_f(u32 v)
148{ 148{
149 return (v & 0x1) << 4; 149 return (v & 0x1U) << 4U;
150} 150}
151static inline u32 falcon_falcon_irqmclr_exterr_f(u32 v) 151static inline u32 falcon_falcon_irqmclr_exterr_f(u32 v)
152{ 152{
153 return (v & 0x1) << 5; 153 return (v & 0x1U) << 5U;
154} 154}
155static inline u32 falcon_falcon_irqmclr_swgen0_f(u32 v) 155static inline u32 falcon_falcon_irqmclr_swgen0_f(u32 v)
156{ 156{
157 return (v & 0x1) << 6; 157 return (v & 0x1U) << 6U;
158} 158}
159static inline u32 falcon_falcon_irqmclr_swgen1_f(u32 v) 159static inline u32 falcon_falcon_irqmclr_swgen1_f(u32 v)
160{ 160{
161 return (v & 0x1) << 7; 161 return (v & 0x1U) << 7U;
162} 162}
163static inline u32 falcon_falcon_irqmclr_ext_f(u32 v) 163static inline u32 falcon_falcon_irqmclr_ext_f(u32 v)
164{ 164{
165 return (v & 0xff) << 8; 165 return (v & 0xffU) << 8U;
166} 166}
167static inline u32 falcon_falcon_irqmask_r(void) 167static inline u32 falcon_falcon_irqmask_r(void)
168{ 168{
169 return 0x00000018; 169 return 0x00000018U;
170} 170}
171static inline u32 falcon_falcon_irqdest_r(void) 171static inline u32 falcon_falcon_irqdest_r(void)
172{ 172{
173 return 0x0000001c; 173 return 0x0000001cU;
174} 174}
175static inline u32 falcon_falcon_irqdest_host_gptmr_f(u32 v) 175static inline u32 falcon_falcon_irqdest_host_gptmr_f(u32 v)
176{ 176{
177 return (v & 0x1) << 0; 177 return (v & 0x1U) << 0U;
178} 178}
179static inline u32 falcon_falcon_irqdest_host_wdtmr_f(u32 v) 179static inline u32 falcon_falcon_irqdest_host_wdtmr_f(u32 v)
180{ 180{
181 return (v & 0x1) << 1; 181 return (v & 0x1U) << 1U;
182} 182}
183static inline u32 falcon_falcon_irqdest_host_mthd_f(u32 v) 183static inline u32 falcon_falcon_irqdest_host_mthd_f(u32 v)
184{ 184{
185 return (v & 0x1) << 2; 185 return (v & 0x1U) << 2U;
186} 186}
187static inline u32 falcon_falcon_irqdest_host_ctxsw_f(u32 v) 187static inline u32 falcon_falcon_irqdest_host_ctxsw_f(u32 v)
188{ 188{
189 return (v & 0x1) << 3; 189 return (v & 0x1U) << 3U;
190} 190}
191static inline u32 falcon_falcon_irqdest_host_halt_f(u32 v) 191static inline u32 falcon_falcon_irqdest_host_halt_f(u32 v)
192{ 192{
193 return (v & 0x1) << 4; 193 return (v & 0x1U) << 4U;
194} 194}
195static inline u32 falcon_falcon_irqdest_host_exterr_f(u32 v) 195static inline u32 falcon_falcon_irqdest_host_exterr_f(u32 v)
196{ 196{
197 return (v & 0x1) << 5; 197 return (v & 0x1U) << 5U;
198} 198}
199static inline u32 falcon_falcon_irqdest_host_swgen0_f(u32 v) 199static inline u32 falcon_falcon_irqdest_host_swgen0_f(u32 v)
200{ 200{
201 return (v & 0x1) << 6; 201 return (v & 0x1U) << 6U;
202} 202}
203static inline u32 falcon_falcon_irqdest_host_swgen1_f(u32 v) 203static inline u32 falcon_falcon_irqdest_host_swgen1_f(u32 v)
204{ 204{
205 return (v & 0x1) << 7; 205 return (v & 0x1U) << 7U;
206} 206}
207static inline u32 falcon_falcon_irqdest_host_ext_f(u32 v) 207static inline u32 falcon_falcon_irqdest_host_ext_f(u32 v)
208{ 208{
209 return (v & 0xff) << 8; 209 return (v & 0xffU) << 8U;
210} 210}
211static inline u32 falcon_falcon_irqdest_target_gptmr_f(u32 v) 211static inline u32 falcon_falcon_irqdest_target_gptmr_f(u32 v)
212{ 212{
213 return (v & 0x1) << 16; 213 return (v & 0x1U) << 16U;
214} 214}
215static inline u32 falcon_falcon_irqdest_target_wdtmr_f(u32 v) 215static inline u32 falcon_falcon_irqdest_target_wdtmr_f(u32 v)
216{ 216{
217 return (v & 0x1) << 17; 217 return (v & 0x1U) << 17U;
218} 218}
219static inline u32 falcon_falcon_irqdest_target_mthd_f(u32 v) 219static inline u32 falcon_falcon_irqdest_target_mthd_f(u32 v)
220{ 220{
221 return (v & 0x1) << 18; 221 return (v & 0x1U) << 18U;
222} 222}
223static inline u32 falcon_falcon_irqdest_target_ctxsw_f(u32 v) 223static inline u32 falcon_falcon_irqdest_target_ctxsw_f(u32 v)
224{ 224{
225 return (v & 0x1) << 19; 225 return (v & 0x1U) << 19U;
226} 226}
227static inline u32 falcon_falcon_irqdest_target_halt_f(u32 v) 227static inline u32 falcon_falcon_irqdest_target_halt_f(u32 v)
228{ 228{
229 return (v & 0x1) << 20; 229 return (v & 0x1U) << 20U;
230} 230}
231static inline u32 falcon_falcon_irqdest_target_exterr_f(u32 v) 231static inline u32 falcon_falcon_irqdest_target_exterr_f(u32 v)
232{ 232{
233 return (v & 0x1) << 21; 233 return (v & 0x1U) << 21U;
234} 234}
235static inline u32 falcon_falcon_irqdest_target_swgen0_f(u32 v) 235static inline u32 falcon_falcon_irqdest_target_swgen0_f(u32 v)
236{ 236{
237 return (v & 0x1) << 22; 237 return (v & 0x1U) << 22U;
238} 238}
239static inline u32 falcon_falcon_irqdest_target_swgen1_f(u32 v) 239static inline u32 falcon_falcon_irqdest_target_swgen1_f(u32 v)
240{ 240{
241 return (v & 0x1) << 23; 241 return (v & 0x1U) << 23U;
242} 242}
243static inline u32 falcon_falcon_irqdest_target_ext_f(u32 v) 243static inline u32 falcon_falcon_irqdest_target_ext_f(u32 v)
244{ 244{
245 return (v & 0xff) << 24; 245 return (v & 0xffU) << 24U;
246} 246}
247static inline u32 falcon_falcon_curctx_r(void) 247static inline u32 falcon_falcon_curctx_r(void)
248{ 248{
249 return 0x00000050; 249 return 0x00000050U;
250} 250}
251static inline u32 falcon_falcon_nxtctx_r(void) 251static inline u32 falcon_falcon_nxtctx_r(void)
252{ 252{
253 return 0x00000054; 253 return 0x00000054U;
254} 254}
255static inline u32 falcon_falcon_mailbox0_r(void) 255static inline u32 falcon_falcon_mailbox0_r(void)
256{ 256{
257 return 0x00000040; 257 return 0x00000040U;
258} 258}
259static inline u32 falcon_falcon_mailbox1_r(void) 259static inline u32 falcon_falcon_mailbox1_r(void)
260{ 260{
261 return 0x00000044; 261 return 0x00000044U;
262} 262}
263static inline u32 falcon_falcon_itfen_r(void) 263static inline u32 falcon_falcon_itfen_r(void)
264{ 264{
265 return 0x00000048; 265 return 0x00000048U;
266} 266}
267static inline u32 falcon_falcon_itfen_ctxen_enable_f(void) 267static inline u32 falcon_falcon_itfen_ctxen_enable_f(void)
268{ 268{
269 return 0x1; 269 return 0x1U;
270} 270}
271static inline u32 falcon_falcon_idlestate_r(void) 271static inline u32 falcon_falcon_idlestate_r(void)
272{ 272{
273 return 0x0000004c; 273 return 0x0000004cU;
274} 274}
275static inline u32 falcon_falcon_idlestate_falcon_busy_v(u32 r) 275static inline u32 falcon_falcon_idlestate_falcon_busy_v(u32 r)
276{ 276{
277 return (r >> 0) & 0x1; 277 return (r >> 0U) & 0x1U;
278} 278}
279static inline u32 falcon_falcon_idlestate_ext_busy_v(u32 r) 279static inline u32 falcon_falcon_idlestate_ext_busy_v(u32 r)
280{ 280{
281 return (r >> 1) & 0x7fff; 281 return (r >> 1U) & 0x7fffU;
282} 282}
283static inline u32 falcon_falcon_os_r(void) 283static inline u32 falcon_falcon_os_r(void)
284{ 284{
285 return 0x00000080; 285 return 0x00000080U;
286} 286}
287static inline u32 falcon_falcon_engctl_r(void) 287static inline u32 falcon_falcon_engctl_r(void)
288{ 288{
289 return 0x000000a4; 289 return 0x000000a4U;
290} 290}
291static inline u32 falcon_falcon_cpuctl_r(void) 291static inline u32 falcon_falcon_cpuctl_r(void)
292{ 292{
293 return 0x00000100; 293 return 0x00000100U;
294} 294}
295static inline u32 falcon_falcon_cpuctl_startcpu_f(u32 v) 295static inline u32 falcon_falcon_cpuctl_startcpu_f(u32 v)
296{ 296{
297 return (v & 0x1) << 1; 297 return (v & 0x1U) << 1U;
298} 298}
299static inline u32 falcon_falcon_cpuctl_sreset_f(u32 v) 299static inline u32 falcon_falcon_cpuctl_sreset_f(u32 v)
300{ 300{
301 return (v & 0x1) << 2; 301 return (v & 0x1U) << 2U;
302} 302}
303static inline u32 falcon_falcon_cpuctl_hreset_f(u32 v) 303static inline u32 falcon_falcon_cpuctl_hreset_f(u32 v)
304{ 304{
305 return (v & 0x1) << 3; 305 return (v & 0x1U) << 3U;
306} 306}
307static inline u32 falcon_falcon_cpuctl_halt_intr_f(u32 v) 307static inline u32 falcon_falcon_cpuctl_halt_intr_f(u32 v)
308{ 308{
309 return (v & 0x1) << 4; 309 return (v & 0x1U) << 4U;
310} 310}
311static inline u32 falcon_falcon_cpuctl_halt_intr_m(void) 311static inline u32 falcon_falcon_cpuctl_halt_intr_m(void)
312{ 312{
313 return 0x1 << 4; 313 return 0x1U << 4U;
314} 314}
315static inline u32 falcon_falcon_cpuctl_halt_intr_v(u32 r) 315static inline u32 falcon_falcon_cpuctl_halt_intr_v(u32 r)
316{ 316{
317 return (r >> 4) & 0x1; 317 return (r >> 4U) & 0x1U;
318} 318}
319static inline u32 falcon_falcon_cpuctl_stopped_m(void) 319static inline u32 falcon_falcon_cpuctl_stopped_m(void)
320{ 320{
321 return 0x1 << 5; 321 return 0x1U << 5U;
322} 322}
323static inline u32 falcon_falcon_imemc_r(u32 i) 323static inline u32 falcon_falcon_imemc_r(u32 i)
324{ 324{
325 return 0x00000180 + i*16; 325 return 0x00000180U + i*16U;
326} 326}
327static inline u32 falcon_falcon_imemc_offs_f(u32 v) 327static inline u32 falcon_falcon_imemc_offs_f(u32 v)
328{ 328{
329 return (v & 0x3f) << 2; 329 return (v & 0x3fU) << 2U;
330} 330}
331static inline u32 falcon_falcon_imemc_blk_f(u32 v) 331static inline u32 falcon_falcon_imemc_blk_f(u32 v)
332{ 332{
333 return (v & 0xff) << 8; 333 return (v & 0xffU) << 8U;
334} 334}
335static inline u32 falcon_falcon_imemc_aincw_f(u32 v) 335static inline u32 falcon_falcon_imemc_aincw_f(u32 v)
336{ 336{
337 return (v & 0x1) << 24; 337 return (v & 0x1U) << 24U;
338} 338}
339static inline u32 falcon_falcon_imemd_r(u32 i) 339static inline u32 falcon_falcon_imemd_r(u32 i)
340{ 340{
341 return 0x00000184 + i*16; 341 return 0x00000184U + i*16U;
342} 342}
343static inline u32 falcon_falcon_imemt_r(u32 i) 343static inline u32 falcon_falcon_imemt_r(u32 i)
344{ 344{
345 return 0x00000188 + i*16; 345 return 0x00000188U + i*16U;
346} 346}
347static inline u32 falcon_falcon_bootvec_r(void) 347static inline u32 falcon_falcon_bootvec_r(void)
348{ 348{
349 return 0x00000104; 349 return 0x00000104U;
350} 350}
351static inline u32 falcon_falcon_bootvec_vec_f(u32 v) 351static inline u32 falcon_falcon_bootvec_vec_f(u32 v)
352{ 352{
353 return (v & 0xffffffff) << 0; 353 return (v & 0xffffffffU) << 0U;
354} 354}
355static inline u32 falcon_falcon_dmactl_r(void) 355static inline u32 falcon_falcon_dmactl_r(void)
356{ 356{
357 return 0x0000010c; 357 return 0x0000010cU;
358} 358}
359static inline u32 falcon_falcon_dmactl_dmem_scrubbing_m(void) 359static inline u32 falcon_falcon_dmactl_dmem_scrubbing_m(void)
360{ 360{
361 return 0x1 << 1; 361 return 0x1U << 1U;
362} 362}
363static inline u32 falcon_falcon_dmactl_imem_scrubbing_m(void) 363static inline u32 falcon_falcon_dmactl_imem_scrubbing_m(void)
364{ 364{
365 return 0x1 << 2; 365 return 0x1U << 2U;
366} 366}
367static inline u32 falcon_falcon_dmactl_require_ctx_f(u32 v) 367static inline u32 falcon_falcon_dmactl_require_ctx_f(u32 v)
368{ 368{
369 return (v & 0x1) << 0; 369 return (v & 0x1U) << 0U;
370} 370}
371static inline u32 falcon_falcon_hwcfg_r(void) 371static inline u32 falcon_falcon_hwcfg_r(void)
372{ 372{
373 return 0x00000108; 373 return 0x00000108U;
374} 374}
375static inline u32 falcon_falcon_hwcfg_imem_size_v(u32 r) 375static inline u32 falcon_falcon_hwcfg_imem_size_v(u32 r)
376{ 376{
377 return (r >> 0) & 0x1ff; 377 return (r >> 0U) & 0x1ffU;
378} 378}
379static inline u32 falcon_falcon_hwcfg_dmem_size_v(u32 r) 379static inline u32 falcon_falcon_hwcfg_dmem_size_v(u32 r)
380{ 380{
381 return (r >> 9) & 0x1ff; 381 return (r >> 9U) & 0x1ffU;
382} 382}
383static inline u32 falcon_falcon_dmatrfbase_r(void) 383static inline u32 falcon_falcon_dmatrfbase_r(void)
384{ 384{
385 return 0x00000110; 385 return 0x00000110U;
386} 386}
387static inline u32 falcon_falcon_dmatrfmoffs_r(void) 387static inline u32 falcon_falcon_dmatrfmoffs_r(void)
388{ 388{
389 return 0x00000114; 389 return 0x00000114U;
390} 390}
391static inline u32 falcon_falcon_dmatrfcmd_r(void) 391static inline u32 falcon_falcon_dmatrfcmd_r(void)
392{ 392{
393 return 0x00000118; 393 return 0x00000118U;
394} 394}
395static inline u32 falcon_falcon_dmatrfcmd_imem_f(u32 v) 395static inline u32 falcon_falcon_dmatrfcmd_imem_f(u32 v)
396{ 396{
397 return (v & 0x1) << 4; 397 return (v & 0x1U) << 4U;
398} 398}
399static inline u32 falcon_falcon_dmatrfcmd_write_f(u32 v) 399static inline u32 falcon_falcon_dmatrfcmd_write_f(u32 v)
400{ 400{
401 return (v & 0x1) << 5; 401 return (v & 0x1U) << 5U;
402} 402}
403static inline u32 falcon_falcon_dmatrfcmd_size_f(u32 v) 403static inline u32 falcon_falcon_dmatrfcmd_size_f(u32 v)
404{ 404{
405 return (v & 0x7) << 8; 405 return (v & 0x7U) << 8U;
406} 406}
407static inline u32 falcon_falcon_dmatrfcmd_ctxdma_f(u32 v) 407static inline u32 falcon_falcon_dmatrfcmd_ctxdma_f(u32 v)
408{ 408{
409 return (v & 0x7) << 12; 409 return (v & 0x7U) << 12U;
410} 410}
411static inline u32 falcon_falcon_dmatrffboffs_r(void) 411static inline u32 falcon_falcon_dmatrffboffs_r(void)
412{ 412{
413 return 0x0000011c; 413 return 0x0000011cU;
414} 414}
415static inline u32 falcon_falcon_imstat_r(void) 415static inline u32 falcon_falcon_imstat_r(void)
416{ 416{
417 return 0x00000144; 417 return 0x00000144U;
418} 418}
419static inline u32 falcon_falcon_traceidx_r(void) 419static inline u32 falcon_falcon_traceidx_r(void)
420{ 420{
421 return 0x00000148; 421 return 0x00000148U;
422} 422}
423static inline u32 falcon_falcon_traceidx_maxidx_v(u32 r) 423static inline u32 falcon_falcon_traceidx_maxidx_v(u32 r)
424{ 424{
425 return (r >> 16) & 0xff; 425 return (r >> 16U) & 0xffU;
426} 426}
427static inline u32 falcon_falcon_traceidx_idx_v(u32 r) 427static inline u32 falcon_falcon_traceidx_idx_v(u32 r)
428{ 428{
429 return (r >> 0) & 0xff; 429 return (r >> 0U) & 0xffU;
430} 430}
431static inline u32 falcon_falcon_tracepc_r(void) 431static inline u32 falcon_falcon_tracepc_r(void)
432{ 432{
433 return 0x0000014c; 433 return 0x0000014cU;
434} 434}
435static inline u32 falcon_falcon_tracepc_pc_v(u32 r) 435static inline u32 falcon_falcon_tracepc_pc_v(u32 r)
436{ 436{
437 return (r >> 0) & 0xffffff; 437 return (r >> 0U) & 0xffffffU;
438} 438}
439static inline u32 falcon_falcon_exterraddr_r(void) 439static inline u32 falcon_falcon_exterraddr_r(void)
440{ 440{
441 return 0x00000168; 441 return 0x00000168U;
442} 442}
443static inline u32 falcon_falcon_exterrstat_r(void) 443static inline u32 falcon_falcon_exterrstat_r(void)
444{ 444{
445 return 0x0000016c; 445 return 0x0000016cU;
446} 446}
447static inline u32 falcon_falcon_exterrstat_valid_m(void) 447static inline u32 falcon_falcon_exterrstat_valid_m(void)
448{ 448{
449 return 0x1 << 31; 449 return 0x1U << 31U;
450} 450}
451static inline u32 falcon_falcon_exterrstat_valid_v(u32 r) 451static inline u32 falcon_falcon_exterrstat_valid_v(u32 r)
452{ 452{
453 return (r >> 31) & 0x1; 453 return (r >> 31U) & 0x1U;
454} 454}
455static inline u32 falcon_falcon_exterrstat_valid_true_v(void) 455static inline u32 falcon_falcon_exterrstat_valid_true_v(void)
456{ 456{
457 return 0x00000001; 457 return 0x00000001U;
458} 458}
459static inline u32 falcon_falcon_icd_cmd_r(void) 459static inline u32 falcon_falcon_icd_cmd_r(void)
460{ 460{
461 return 0x00000200; 461 return 0x00000200U;
462} 462}
463static inline u32 falcon_falcon_icd_cmd_opc_s(void) 463static inline u32 falcon_falcon_icd_cmd_opc_s(void)
464{ 464{
465 return 4; 465 return 4U;
466} 466}
467static inline u32 falcon_falcon_icd_cmd_opc_f(u32 v) 467static inline u32 falcon_falcon_icd_cmd_opc_f(u32 v)
468{ 468{
469 return (v & 0xf) << 0; 469 return (v & 0xfU) << 0U;
470} 470}
471static inline u32 falcon_falcon_icd_cmd_opc_m(void) 471static inline u32 falcon_falcon_icd_cmd_opc_m(void)
472{ 472{
473 return 0xf << 0; 473 return 0xfU << 0U;
474} 474}
475static inline u32 falcon_falcon_icd_cmd_opc_v(u32 r) 475static inline u32 falcon_falcon_icd_cmd_opc_v(u32 r)
476{ 476{
477 return (r >> 0) & 0xf; 477 return (r >> 0U) & 0xfU;
478} 478}
479static inline u32 falcon_falcon_icd_cmd_opc_rreg_f(void) 479static inline u32 falcon_falcon_icd_cmd_opc_rreg_f(void)
480{ 480{
481 return 0x8; 481 return 0x8U;
482} 482}
483static inline u32 falcon_falcon_icd_cmd_opc_rstat_f(void) 483static inline u32 falcon_falcon_icd_cmd_opc_rstat_f(void)
484{ 484{
485 return 0xe; 485 return 0xeU;
486} 486}
487static inline u32 falcon_falcon_icd_cmd_idx_f(u32 v) 487static inline u32 falcon_falcon_icd_cmd_idx_f(u32 v)
488{ 488{
489 return (v & 0x1f) << 8; 489 return (v & 0x1fU) << 8U;
490} 490}
491static inline u32 falcon_falcon_icd_rdata_r(void) 491static inline u32 falcon_falcon_icd_rdata_r(void)
492{ 492{
493 return 0x0000020c; 493 return 0x0000020cU;
494} 494}
495static inline u32 falcon_falcon_dmemc_r(u32 i) 495static inline u32 falcon_falcon_dmemc_r(u32 i)
496{ 496{
497 return 0x000001c0 + i*8; 497 return 0x000001c0U + i*8U;
498} 498}
499static inline u32 falcon_falcon_dmemc_offs_f(u32 v) 499static inline u32 falcon_falcon_dmemc_offs_f(u32 v)
500{ 500{
501 return (v & 0x3f) << 2; 501 return (v & 0x3fU) << 2U;
502} 502}
503static inline u32 falcon_falcon_dmemc_offs_m(void) 503static inline u32 falcon_falcon_dmemc_offs_m(void)
504{ 504{
505 return 0x3f << 2; 505 return 0x3fU << 2U;
506} 506}
507static inline u32 falcon_falcon_dmemc_blk_f(u32 v) 507static inline u32 falcon_falcon_dmemc_blk_f(u32 v)
508{ 508{
509 return (v & 0xff) << 8; 509 return (v & 0xffU) << 8U;
510} 510}
511static inline u32 falcon_falcon_dmemc_blk_m(void) 511static inline u32 falcon_falcon_dmemc_blk_m(void)
512{ 512{
513 return 0xff << 8; 513 return 0xffU << 8U;
514} 514}
515static inline u32 falcon_falcon_dmemc_aincw_f(u32 v) 515static inline u32 falcon_falcon_dmemc_aincw_f(u32 v)
516{ 516{
517 return (v & 0x1) << 24; 517 return (v & 0x1U) << 24U;
518} 518}
519static inline u32 falcon_falcon_dmemc_aincr_f(u32 v) 519static inline u32 falcon_falcon_dmemc_aincr_f(u32 v)
520{ 520{
521 return (v & 0x1) << 25; 521 return (v & 0x1U) << 25U;
522} 522}
523static inline u32 falcon_falcon_dmemd_r(u32 i) 523static inline u32 falcon_falcon_dmemd_r(u32 i)
524{ 524{
525 return 0x000001c4 + i*8; 525 return 0x000001c4U + i*8U;
526} 526}
527static inline u32 falcon_falcon_debug1_r(void) 527static inline u32 falcon_falcon_debug1_r(void)
528{ 528{
529 return 0x00000090; 529 return 0x00000090U;
530} 530}
531static inline u32 falcon_falcon_debug1_ctxsw_mode_s(void) 531static inline u32 falcon_falcon_debug1_ctxsw_mode_s(void)
532{ 532{
533 return 1; 533 return 1U;
534} 534}
535static inline u32 falcon_falcon_debug1_ctxsw_mode_f(u32 v) 535static inline u32 falcon_falcon_debug1_ctxsw_mode_f(u32 v)
536{ 536{
537 return (v & 0x1) << 16; 537 return (v & 0x1U) << 16U;
538} 538}
539static inline u32 falcon_falcon_debug1_ctxsw_mode_m(void) 539static inline u32 falcon_falcon_debug1_ctxsw_mode_m(void)
540{ 540{
541 return 0x1 << 16; 541 return 0x1U << 16U;
542} 542}
543static inline u32 falcon_falcon_debug1_ctxsw_mode_v(u32 r) 543static inline u32 falcon_falcon_debug1_ctxsw_mode_v(u32 r)
544{ 544{
545 return (r >> 16) & 0x1; 545 return (r >> 16U) & 0x1U;
546} 546}
547static inline u32 falcon_falcon_debug1_ctxsw_mode_init_f(void) 547static inline u32 falcon_falcon_debug1_ctxsw_mode_init_f(void)
548{ 548{
549 return 0x0; 549 return 0x0U;
550} 550}
551static inline u32 falcon_falcon_debuginfo_r(void) 551static inline u32 falcon_falcon_debuginfo_r(void)
552{ 552{
553 return 0x00000094; 553 return 0x00000094U;
554} 554}
555#endif 555#endif
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_falcon_gm20b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_falcon_gm20b.h
index 851fb62a..a17c9a9a 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_falcon_gm20b.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_falcon_gm20b.h
@@ -58,538 +58,538 @@
58 58
59static inline u32 falcon_falcon_irqsset_r(void) 59static inline u32 falcon_falcon_irqsset_r(void)
60{ 60{
61 return 0x00000000; 61 return 0x00000000U;
62} 62}
63static inline u32 falcon_falcon_irqsset_swgen0_set_f(void) 63static inline u32 falcon_falcon_irqsset_swgen0_set_f(void)
64{ 64{
65 return 0x40; 65 return 0x40U;
66} 66}
67static inline u32 falcon_falcon_irqsclr_r(void) 67static inline u32 falcon_falcon_irqsclr_r(void)
68{ 68{
69 return 0x00000004; 69 return 0x00000004U;
70} 70}
71static inline u32 falcon_falcon_irqstat_r(void) 71static inline u32 falcon_falcon_irqstat_r(void)
72{ 72{
73 return 0x00000008; 73 return 0x00000008U;
74} 74}
75static inline u32 falcon_falcon_irqstat_halt_true_f(void) 75static inline u32 falcon_falcon_irqstat_halt_true_f(void)
76{ 76{
77 return 0x10; 77 return 0x10U;
78} 78}
79static inline u32 falcon_falcon_irqstat_exterr_true_f(void) 79static inline u32 falcon_falcon_irqstat_exterr_true_f(void)
80{ 80{
81 return 0x20; 81 return 0x20U;
82} 82}
83static inline u32 falcon_falcon_irqstat_swgen0_true_f(void) 83static inline u32 falcon_falcon_irqstat_swgen0_true_f(void)
84{ 84{
85 return 0x40; 85 return 0x40U;
86} 86}
87static inline u32 falcon_falcon_irqmode_r(void) 87static inline u32 falcon_falcon_irqmode_r(void)
88{ 88{
89 return 0x0000000c; 89 return 0x0000000cU;
90} 90}
91static inline u32 falcon_falcon_irqmset_r(void) 91static inline u32 falcon_falcon_irqmset_r(void)
92{ 92{
93 return 0x00000010; 93 return 0x00000010U;
94} 94}
95static inline u32 falcon_falcon_irqmset_gptmr_f(u32 v) 95static inline u32 falcon_falcon_irqmset_gptmr_f(u32 v)
96{ 96{
97 return (v & 0x1) << 0; 97 return (v & 0x1U) << 0U;
98} 98}
99static inline u32 falcon_falcon_irqmset_wdtmr_f(u32 v) 99static inline u32 falcon_falcon_irqmset_wdtmr_f(u32 v)
100{ 100{
101 return (v & 0x1) << 1; 101 return (v & 0x1U) << 1U;
102} 102}
103static inline u32 falcon_falcon_irqmset_mthd_f(u32 v) 103static inline u32 falcon_falcon_irqmset_mthd_f(u32 v)
104{ 104{
105 return (v & 0x1) << 2; 105 return (v & 0x1U) << 2U;
106} 106}
107static inline u32 falcon_falcon_irqmset_ctxsw_f(u32 v) 107static inline u32 falcon_falcon_irqmset_ctxsw_f(u32 v)
108{ 108{
109 return (v & 0x1) << 3; 109 return (v & 0x1U) << 3U;
110} 110}
111static inline u32 falcon_falcon_irqmset_halt_f(u32 v) 111static inline u32 falcon_falcon_irqmset_halt_f(u32 v)
112{ 112{
113 return (v & 0x1) << 4; 113 return (v & 0x1U) << 4U;
114} 114}
115static inline u32 falcon_falcon_irqmset_exterr_f(u32 v) 115static inline u32 falcon_falcon_irqmset_exterr_f(u32 v)
116{ 116{
117 return (v & 0x1) << 5; 117 return (v & 0x1U) << 5U;
118} 118}
119static inline u32 falcon_falcon_irqmset_swgen0_f(u32 v) 119static inline u32 falcon_falcon_irqmset_swgen0_f(u32 v)
120{ 120{
121 return (v & 0x1) << 6; 121 return (v & 0x1U) << 6U;
122} 122}
123static inline u32 falcon_falcon_irqmset_swgen1_f(u32 v) 123static inline u32 falcon_falcon_irqmset_swgen1_f(u32 v)
124{ 124{
125 return (v & 0x1) << 7; 125 return (v & 0x1U) << 7U;
126} 126}
127static inline u32 falcon_falcon_irqmclr_r(void) 127static inline u32 falcon_falcon_irqmclr_r(void)
128{ 128{
129 return 0x00000014; 129 return 0x00000014U;
130} 130}
131static inline u32 falcon_falcon_irqmclr_gptmr_f(u32 v) 131static inline u32 falcon_falcon_irqmclr_gptmr_f(u32 v)
132{ 132{
133 return (v & 0x1) << 0; 133 return (v & 0x1U) << 0U;
134} 134}
135static inline u32 falcon_falcon_irqmclr_wdtmr_f(u32 v) 135static inline u32 falcon_falcon_irqmclr_wdtmr_f(u32 v)
136{ 136{
137 return (v & 0x1) << 1; 137 return (v & 0x1U) << 1U;
138} 138}
139static inline u32 falcon_falcon_irqmclr_mthd_f(u32 v) 139static inline u32 falcon_falcon_irqmclr_mthd_f(u32 v)
140{ 140{
141 return (v & 0x1) << 2; 141 return (v & 0x1U) << 2U;
142} 142}
143static inline u32 falcon_falcon_irqmclr_ctxsw_f(u32 v) 143static inline u32 falcon_falcon_irqmclr_ctxsw_f(u32 v)
144{ 144{
145 return (v & 0x1) << 3; 145 return (v & 0x1U) << 3U;
146} 146}
147static inline u32 falcon_falcon_irqmclr_halt_f(u32 v) 147static inline u32 falcon_falcon_irqmclr_halt_f(u32 v)
148{ 148{
149 return (v & 0x1) << 4; 149 return (v & 0x1U) << 4U;
150} 150}
151static inline u32 falcon_falcon_irqmclr_exterr_f(u32 v) 151static inline u32 falcon_falcon_irqmclr_exterr_f(u32 v)
152{ 152{
153 return (v & 0x1) << 5; 153 return (v & 0x1U) << 5U;
154} 154}
155static inline u32 falcon_falcon_irqmclr_swgen0_f(u32 v) 155static inline u32 falcon_falcon_irqmclr_swgen0_f(u32 v)
156{ 156{
157 return (v & 0x1) << 6; 157 return (v & 0x1U) << 6U;
158} 158}
159static inline u32 falcon_falcon_irqmclr_swgen1_f(u32 v) 159static inline u32 falcon_falcon_irqmclr_swgen1_f(u32 v)
160{ 160{
161 return (v & 0x1) << 7; 161 return (v & 0x1U) << 7U;
162} 162}
163static inline u32 falcon_falcon_irqmclr_ext_f(u32 v) 163static inline u32 falcon_falcon_irqmclr_ext_f(u32 v)
164{ 164{
165 return (v & 0xff) << 8; 165 return (v & 0xffU) << 8U;
166} 166}
167static inline u32 falcon_falcon_irqmask_r(void) 167static inline u32 falcon_falcon_irqmask_r(void)
168{ 168{
169 return 0x00000018; 169 return 0x00000018U;
170} 170}
171static inline u32 falcon_falcon_irqdest_r(void) 171static inline u32 falcon_falcon_irqdest_r(void)
172{ 172{
173 return 0x0000001c; 173 return 0x0000001cU;
174} 174}
175static inline u32 falcon_falcon_irqdest_host_gptmr_f(u32 v) 175static inline u32 falcon_falcon_irqdest_host_gptmr_f(u32 v)
176{ 176{
177 return (v & 0x1) << 0; 177 return (v & 0x1U) << 0U;
178} 178}
179static inline u32 falcon_falcon_irqdest_host_wdtmr_f(u32 v) 179static inline u32 falcon_falcon_irqdest_host_wdtmr_f(u32 v)
180{ 180{
181 return (v & 0x1) << 1; 181 return (v & 0x1U) << 1U;
182} 182}
183static inline u32 falcon_falcon_irqdest_host_mthd_f(u32 v) 183static inline u32 falcon_falcon_irqdest_host_mthd_f(u32 v)
184{ 184{
185 return (v & 0x1) << 2; 185 return (v & 0x1U) << 2U;
186} 186}
187static inline u32 falcon_falcon_irqdest_host_ctxsw_f(u32 v) 187static inline u32 falcon_falcon_irqdest_host_ctxsw_f(u32 v)
188{ 188{
189 return (v & 0x1) << 3; 189 return (v & 0x1U) << 3U;
190} 190}
191static inline u32 falcon_falcon_irqdest_host_halt_f(u32 v) 191static inline u32 falcon_falcon_irqdest_host_halt_f(u32 v)
192{ 192{
193 return (v & 0x1) << 4; 193 return (v & 0x1U) << 4U;
194} 194}
195static inline u32 falcon_falcon_irqdest_host_exterr_f(u32 v) 195static inline u32 falcon_falcon_irqdest_host_exterr_f(u32 v)
196{ 196{
197 return (v & 0x1) << 5; 197 return (v & 0x1U) << 5U;
198} 198}
199static inline u32 falcon_falcon_irqdest_host_swgen0_f(u32 v) 199static inline u32 falcon_falcon_irqdest_host_swgen0_f(u32 v)
200{ 200{
201 return (v & 0x1) << 6; 201 return (v & 0x1U) << 6U;
202} 202}
203static inline u32 falcon_falcon_irqdest_host_swgen1_f(u32 v) 203static inline u32 falcon_falcon_irqdest_host_swgen1_f(u32 v)
204{ 204{
205 return (v & 0x1) << 7; 205 return (v & 0x1U) << 7U;
206} 206}
207static inline u32 falcon_falcon_irqdest_host_ext_f(u32 v) 207static inline u32 falcon_falcon_irqdest_host_ext_f(u32 v)
208{ 208{
209 return (v & 0xff) << 8; 209 return (v & 0xffU) << 8U;
210} 210}
211static inline u32 falcon_falcon_irqdest_target_gptmr_f(u32 v) 211static inline u32 falcon_falcon_irqdest_target_gptmr_f(u32 v)
212{ 212{
213 return (v & 0x1) << 16; 213 return (v & 0x1U) << 16U;
214} 214}
215static inline u32 falcon_falcon_irqdest_target_wdtmr_f(u32 v) 215static inline u32 falcon_falcon_irqdest_target_wdtmr_f(u32 v)
216{ 216{
217 return (v & 0x1) << 17; 217 return (v & 0x1U) << 17U;
218} 218}
219static inline u32 falcon_falcon_irqdest_target_mthd_f(u32 v) 219static inline u32 falcon_falcon_irqdest_target_mthd_f(u32 v)
220{ 220{
221 return (v & 0x1) << 18; 221 return (v & 0x1U) << 18U;
222} 222}
223static inline u32 falcon_falcon_irqdest_target_ctxsw_f(u32 v) 223static inline u32 falcon_falcon_irqdest_target_ctxsw_f(u32 v)
224{ 224{
225 return (v & 0x1) << 19; 225 return (v & 0x1U) << 19U;
226} 226}
227static inline u32 falcon_falcon_irqdest_target_halt_f(u32 v) 227static inline u32 falcon_falcon_irqdest_target_halt_f(u32 v)
228{ 228{
229 return (v & 0x1) << 20; 229 return (v & 0x1U) << 20U;
230} 230}
231static inline u32 falcon_falcon_irqdest_target_exterr_f(u32 v) 231static inline u32 falcon_falcon_irqdest_target_exterr_f(u32 v)
232{ 232{
233 return (v & 0x1) << 21; 233 return (v & 0x1U) << 21U;
234} 234}
235static inline u32 falcon_falcon_irqdest_target_swgen0_f(u32 v) 235static inline u32 falcon_falcon_irqdest_target_swgen0_f(u32 v)
236{ 236{
237 return (v & 0x1) << 22; 237 return (v & 0x1U) << 22U;
238} 238}
239static inline u32 falcon_falcon_irqdest_target_swgen1_f(u32 v) 239static inline u32 falcon_falcon_irqdest_target_swgen1_f(u32 v)
240{ 240{
241 return (v & 0x1) << 23; 241 return (v & 0x1U) << 23U;
242} 242}
243static inline u32 falcon_falcon_irqdest_target_ext_f(u32 v) 243static inline u32 falcon_falcon_irqdest_target_ext_f(u32 v)
244{ 244{
245 return (v & 0xff) << 24; 245 return (v & 0xffU) << 24U;
246} 246}
247static inline u32 falcon_falcon_curctx_r(void) 247static inline u32 falcon_falcon_curctx_r(void)
248{ 248{
249 return 0x00000050; 249 return 0x00000050U;
250} 250}
251static inline u32 falcon_falcon_nxtctx_r(void) 251static inline u32 falcon_falcon_nxtctx_r(void)
252{ 252{
253 return 0x00000054; 253 return 0x00000054U;
254} 254}
255static inline u32 falcon_falcon_mailbox0_r(void) 255static inline u32 falcon_falcon_mailbox0_r(void)
256{ 256{
257 return 0x00000040; 257 return 0x00000040U;
258} 258}
259static inline u32 falcon_falcon_mailbox1_r(void) 259static inline u32 falcon_falcon_mailbox1_r(void)
260{ 260{
261 return 0x00000044; 261 return 0x00000044U;
262} 262}
263static inline u32 falcon_falcon_itfen_r(void) 263static inline u32 falcon_falcon_itfen_r(void)
264{ 264{
265 return 0x00000048; 265 return 0x00000048U;
266} 266}
267static inline u32 falcon_falcon_itfen_ctxen_enable_f(void) 267static inline u32 falcon_falcon_itfen_ctxen_enable_f(void)
268{ 268{
269 return 0x1; 269 return 0x1U;
270} 270}
271static inline u32 falcon_falcon_idlestate_r(void) 271static inline u32 falcon_falcon_idlestate_r(void)
272{ 272{
273 return 0x0000004c; 273 return 0x0000004cU;
274} 274}
275static inline u32 falcon_falcon_idlestate_falcon_busy_v(u32 r) 275static inline u32 falcon_falcon_idlestate_falcon_busy_v(u32 r)
276{ 276{
277 return (r >> 0) & 0x1; 277 return (r >> 0U) & 0x1U;
278} 278}
279static inline u32 falcon_falcon_idlestate_ext_busy_v(u32 r) 279static inline u32 falcon_falcon_idlestate_ext_busy_v(u32 r)
280{ 280{
281 return (r >> 1) & 0x7fff; 281 return (r >> 1U) & 0x7fffU;
282} 282}
283static inline u32 falcon_falcon_os_r(void) 283static inline u32 falcon_falcon_os_r(void)
284{ 284{
285 return 0x00000080; 285 return 0x00000080U;
286} 286}
287static inline u32 falcon_falcon_engctl_r(void) 287static inline u32 falcon_falcon_engctl_r(void)
288{ 288{
289 return 0x000000a4; 289 return 0x000000a4U;
290} 290}
291static inline u32 falcon_falcon_cpuctl_r(void) 291static inline u32 falcon_falcon_cpuctl_r(void)
292{ 292{
293 return 0x00000100; 293 return 0x00000100U;
294} 294}
295static inline u32 falcon_falcon_cpuctl_startcpu_f(u32 v) 295static inline u32 falcon_falcon_cpuctl_startcpu_f(u32 v)
296{ 296{
297 return (v & 0x1) << 1; 297 return (v & 0x1U) << 1U;
298} 298}
299static inline u32 falcon_falcon_cpuctl_sreset_f(u32 v) 299static inline u32 falcon_falcon_cpuctl_sreset_f(u32 v)
300{ 300{
301 return (v & 0x1) << 2; 301 return (v & 0x1U) << 2U;
302} 302}
303static inline u32 falcon_falcon_cpuctl_hreset_f(u32 v) 303static inline u32 falcon_falcon_cpuctl_hreset_f(u32 v)
304{ 304{
305 return (v & 0x1) << 3; 305 return (v & 0x1U) << 3U;
306} 306}
307static inline u32 falcon_falcon_cpuctl_halt_intr_f(u32 v) 307static inline u32 falcon_falcon_cpuctl_halt_intr_f(u32 v)
308{ 308{
309 return (v & 0x1) << 4; 309 return (v & 0x1U) << 4U;
310} 310}
311static inline u32 falcon_falcon_cpuctl_halt_intr_m(void) 311static inline u32 falcon_falcon_cpuctl_halt_intr_m(void)
312{ 312{
313 return 0x1 << 4; 313 return 0x1U << 4U;
314} 314}
315static inline u32 falcon_falcon_cpuctl_halt_intr_v(u32 r) 315static inline u32 falcon_falcon_cpuctl_halt_intr_v(u32 r)
316{ 316{
317 return (r >> 4) & 0x1; 317 return (r >> 4U) & 0x1U;
318} 318}
319static inline u32 falcon_falcon_cpuctl_stopped_m(void) 319static inline u32 falcon_falcon_cpuctl_stopped_m(void)
320{ 320{
321 return 0x1 << 5; 321 return 0x1U << 5U;
322} 322}
323static inline u32 falcon_falcon_cpuctl_cpuctl_alias_en_f(u32 v) 323static inline u32 falcon_falcon_cpuctl_cpuctl_alias_en_f(u32 v)
324{ 324{
325 return (v & 0x1) << 6; 325 return (v & 0x1U) << 6U;
326} 326}
327static inline u32 falcon_falcon_cpuctl_cpuctl_alias_en_m(void) 327static inline u32 falcon_falcon_cpuctl_cpuctl_alias_en_m(void)
328{ 328{
329 return 0x1 << 6; 329 return 0x1U << 6U;
330} 330}
331static inline u32 falcon_falcon_cpuctl_cpuctl_alias_en_v(u32 r) 331static inline u32 falcon_falcon_cpuctl_cpuctl_alias_en_v(u32 r)
332{ 332{
333 return (r >> 6) & 0x1; 333 return (r >> 6U) & 0x1U;
334} 334}
335static inline u32 falcon_falcon_cpuctl_alias_r(void) 335static inline u32 falcon_falcon_cpuctl_alias_r(void)
336{ 336{
337 return 0x00000130; 337 return 0x00000130U;
338} 338}
339static inline u32 falcon_falcon_cpuctl_alias_startcpu_f(u32 v) 339static inline u32 falcon_falcon_cpuctl_alias_startcpu_f(u32 v)
340{ 340{
341 return (v & 0x1) << 1; 341 return (v & 0x1U) << 1U;
342} 342}
343static inline u32 falcon_falcon_imemc_r(u32 i) 343static inline u32 falcon_falcon_imemc_r(u32 i)
344{ 344{
345 return 0x00000180 + i*16; 345 return 0x00000180U + i*16U;
346} 346}
347static inline u32 falcon_falcon_imemc_offs_f(u32 v) 347static inline u32 falcon_falcon_imemc_offs_f(u32 v)
348{ 348{
349 return (v & 0x3f) << 2; 349 return (v & 0x3fU) << 2U;
350} 350}
351static inline u32 falcon_falcon_imemc_blk_f(u32 v) 351static inline u32 falcon_falcon_imemc_blk_f(u32 v)
352{ 352{
353 return (v & 0xff) << 8; 353 return (v & 0xffU) << 8U;
354} 354}
355static inline u32 falcon_falcon_imemc_aincw_f(u32 v) 355static inline u32 falcon_falcon_imemc_aincw_f(u32 v)
356{ 356{
357 return (v & 0x1) << 24; 357 return (v & 0x1U) << 24U;
358} 358}
359static inline u32 falcon_falcon_imemd_r(u32 i) 359static inline u32 falcon_falcon_imemd_r(u32 i)
360{ 360{
361 return 0x00000184 + i*16; 361 return 0x00000184U + i*16U;
362} 362}
363static inline u32 falcon_falcon_imemt_r(u32 i) 363static inline u32 falcon_falcon_imemt_r(u32 i)
364{ 364{
365 return 0x00000188 + i*16; 365 return 0x00000188U + i*16U;
366} 366}
367static inline u32 falcon_falcon_sctl_r(void) 367static inline u32 falcon_falcon_sctl_r(void)
368{ 368{
369 return 0x00000240; 369 return 0x00000240U;
370} 370}
371static inline u32 falcon_falcon_mmu_phys_sec_r(void) 371static inline u32 falcon_falcon_mmu_phys_sec_r(void)
372{ 372{
373 return 0x00100ce4; 373 return 0x00100ce4U;
374} 374}
375static inline u32 falcon_falcon_bootvec_r(void) 375static inline u32 falcon_falcon_bootvec_r(void)
376{ 376{
377 return 0x00000104; 377 return 0x00000104U;
378} 378}
379static inline u32 falcon_falcon_bootvec_vec_f(u32 v) 379static inline u32 falcon_falcon_bootvec_vec_f(u32 v)
380{ 380{
381 return (v & 0xffffffff) << 0; 381 return (v & 0xffffffffU) << 0U;
382} 382}
383static inline u32 falcon_falcon_dmactl_r(void) 383static inline u32 falcon_falcon_dmactl_r(void)
384{ 384{
385 return 0x0000010c; 385 return 0x0000010cU;
386} 386}
387static inline u32 falcon_falcon_dmactl_dmem_scrubbing_m(void) 387static inline u32 falcon_falcon_dmactl_dmem_scrubbing_m(void)
388{ 388{
389 return 0x1 << 1; 389 return 0x1U << 1U;
390} 390}
391static inline u32 falcon_falcon_dmactl_imem_scrubbing_m(void) 391static inline u32 falcon_falcon_dmactl_imem_scrubbing_m(void)
392{ 392{
393 return 0x1 << 2; 393 return 0x1U << 2U;
394} 394}
395static inline u32 falcon_falcon_dmactl_require_ctx_f(u32 v) 395static inline u32 falcon_falcon_dmactl_require_ctx_f(u32 v)
396{ 396{
397 return (v & 0x1) << 0; 397 return (v & 0x1U) << 0U;
398} 398}
399static inline u32 falcon_falcon_hwcfg_r(void) 399static inline u32 falcon_falcon_hwcfg_r(void)
400{ 400{
401 return 0x00000108; 401 return 0x00000108U;
402} 402}
403static inline u32 falcon_falcon_hwcfg_imem_size_v(u32 r) 403static inline u32 falcon_falcon_hwcfg_imem_size_v(u32 r)
404{ 404{
405 return (r >> 0) & 0x1ff; 405 return (r >> 0U) & 0x1ffU;
406} 406}
407static inline u32 falcon_falcon_hwcfg_dmem_size_v(u32 r) 407static inline u32 falcon_falcon_hwcfg_dmem_size_v(u32 r)
408{ 408{
409 return (r >> 9) & 0x1ff; 409 return (r >> 9U) & 0x1ffU;
410} 410}
411static inline u32 falcon_falcon_dmatrfbase_r(void) 411static inline u32 falcon_falcon_dmatrfbase_r(void)
412{ 412{
413 return 0x00000110; 413 return 0x00000110U;
414} 414}
415static inline u32 falcon_falcon_dmatrfmoffs_r(void) 415static inline u32 falcon_falcon_dmatrfmoffs_r(void)
416{ 416{
417 return 0x00000114; 417 return 0x00000114U;
418} 418}
419static inline u32 falcon_falcon_dmatrfcmd_r(void) 419static inline u32 falcon_falcon_dmatrfcmd_r(void)
420{ 420{
421 return 0x00000118; 421 return 0x00000118U;
422} 422}
423static inline u32 falcon_falcon_dmatrfcmd_imem_f(u32 v) 423static inline u32 falcon_falcon_dmatrfcmd_imem_f(u32 v)
424{ 424{
425 return (v & 0x1) << 4; 425 return (v & 0x1U) << 4U;
426} 426}
427static inline u32 falcon_falcon_dmatrfcmd_write_f(u32 v) 427static inline u32 falcon_falcon_dmatrfcmd_write_f(u32 v)
428{ 428{
429 return (v & 0x1) << 5; 429 return (v & 0x1U) << 5U;
430} 430}
431static inline u32 falcon_falcon_dmatrfcmd_size_f(u32 v) 431static inline u32 falcon_falcon_dmatrfcmd_size_f(u32 v)
432{ 432{
433 return (v & 0x7) << 8; 433 return (v & 0x7U) << 8U;
434} 434}
435static inline u32 falcon_falcon_dmatrfcmd_ctxdma_f(u32 v) 435static inline u32 falcon_falcon_dmatrfcmd_ctxdma_f(u32 v)
436{ 436{
437 return (v & 0x7) << 12; 437 return (v & 0x7U) << 12U;
438} 438}
439static inline u32 falcon_falcon_dmatrffboffs_r(void) 439static inline u32 falcon_falcon_dmatrffboffs_r(void)
440{ 440{
441 return 0x0000011c; 441 return 0x0000011cU;
442} 442}
443static inline u32 falcon_falcon_imctl_debug_r(void) 443static inline u32 falcon_falcon_imctl_debug_r(void)
444{ 444{
445 return 0x0000015c; 445 return 0x0000015cU;
446} 446}
447static inline u32 falcon_falcon_imctl_debug_addr_blk_f(u32 v) 447static inline u32 falcon_falcon_imctl_debug_addr_blk_f(u32 v)
448{ 448{
449 return (v & 0xffffff) << 0; 449 return (v & 0xffffffU) << 0U;
450} 450}
451static inline u32 falcon_falcon_imctl_debug_cmd_f(u32 v) 451static inline u32 falcon_falcon_imctl_debug_cmd_f(u32 v)
452{ 452{
453 return (v & 0x7) << 24; 453 return (v & 0x7U) << 24U;
454} 454}
455static inline u32 falcon_falcon_imstat_r(void) 455static inline u32 falcon_falcon_imstat_r(void)
456{ 456{
457 return 0x00000144; 457 return 0x00000144U;
458} 458}
459static inline u32 falcon_falcon_traceidx_r(void) 459static inline u32 falcon_falcon_traceidx_r(void)
460{ 460{
461 return 0x00000148; 461 return 0x00000148U;
462} 462}
463static inline u32 falcon_falcon_traceidx_maxidx_v(u32 r) 463static inline u32 falcon_falcon_traceidx_maxidx_v(u32 r)
464{ 464{
465 return (r >> 16) & 0xff; 465 return (r >> 16U) & 0xffU;
466} 466}
467static inline u32 falcon_falcon_traceidx_idx_f(u32 v) 467static inline u32 falcon_falcon_traceidx_idx_f(u32 v)
468{ 468{
469 return (v & 0xff) << 0; 469 return (v & 0xffU) << 0U;
470} 470}
471static inline u32 falcon_falcon_tracepc_r(void) 471static inline u32 falcon_falcon_tracepc_r(void)
472{ 472{
473 return 0x0000014c; 473 return 0x0000014cU;
474} 474}
475static inline u32 falcon_falcon_tracepc_pc_v(u32 r) 475static inline u32 falcon_falcon_tracepc_pc_v(u32 r)
476{ 476{
477 return (r >> 0) & 0xffffff; 477 return (r >> 0U) & 0xffffffU;
478} 478}
479static inline u32 falcon_falcon_exterraddr_r(void) 479static inline u32 falcon_falcon_exterraddr_r(void)
480{ 480{
481 return 0x00000168; 481 return 0x00000168U;
482} 482}
483static inline u32 falcon_falcon_exterrstat_r(void) 483static inline u32 falcon_falcon_exterrstat_r(void)
484{ 484{
485 return 0x0000016c; 485 return 0x0000016cU;
486} 486}
487static inline u32 falcon_falcon_exterrstat_valid_m(void) 487static inline u32 falcon_falcon_exterrstat_valid_m(void)
488{ 488{
489 return 0x1 << 31; 489 return 0x1U << 31U;
490} 490}
491static inline u32 falcon_falcon_exterrstat_valid_v(u32 r) 491static inline u32 falcon_falcon_exterrstat_valid_v(u32 r)
492{ 492{
493 return (r >> 31) & 0x1; 493 return (r >> 31U) & 0x1U;
494} 494}
495static inline u32 falcon_falcon_exterrstat_valid_true_v(void) 495static inline u32 falcon_falcon_exterrstat_valid_true_v(void)
496{ 496{
497 return 0x00000001; 497 return 0x00000001U;
498} 498}
499static inline u32 falcon_falcon_icd_cmd_r(void) 499static inline u32 falcon_falcon_icd_cmd_r(void)
500{ 500{
501 return 0x00000200; 501 return 0x00000200U;
502} 502}
503static inline u32 falcon_falcon_icd_cmd_opc_s(void) 503static inline u32 falcon_falcon_icd_cmd_opc_s(void)
504{ 504{
505 return 4; 505 return 4U;
506} 506}
507static inline u32 falcon_falcon_icd_cmd_opc_f(u32 v) 507static inline u32 falcon_falcon_icd_cmd_opc_f(u32 v)
508{ 508{
509 return (v & 0xf) << 0; 509 return (v & 0xfU) << 0U;
510} 510}
511static inline u32 falcon_falcon_icd_cmd_opc_m(void) 511static inline u32 falcon_falcon_icd_cmd_opc_m(void)
512{ 512{
513 return 0xf << 0; 513 return 0xfU << 0U;
514} 514}
515static inline u32 falcon_falcon_icd_cmd_opc_v(u32 r) 515static inline u32 falcon_falcon_icd_cmd_opc_v(u32 r)
516{ 516{
517 return (r >> 0) & 0xf; 517 return (r >> 0U) & 0xfU;
518} 518}
519static inline u32 falcon_falcon_icd_cmd_opc_rreg_f(void) 519static inline u32 falcon_falcon_icd_cmd_opc_rreg_f(void)
520{ 520{
521 return 0x8; 521 return 0x8U;
522} 522}
523static inline u32 falcon_falcon_icd_cmd_opc_rstat_f(void) 523static inline u32 falcon_falcon_icd_cmd_opc_rstat_f(void)
524{ 524{
525 return 0xe; 525 return 0xeU;
526} 526}
527static inline u32 falcon_falcon_icd_cmd_idx_f(u32 v) 527static inline u32 falcon_falcon_icd_cmd_idx_f(u32 v)
528{ 528{
529 return (v & 0x1f) << 8; 529 return (v & 0x1fU) << 8U;
530} 530}
531static inline u32 falcon_falcon_icd_rdata_r(void) 531static inline u32 falcon_falcon_icd_rdata_r(void)
532{ 532{
533 return 0x0000020c; 533 return 0x0000020cU;
534} 534}
535static inline u32 falcon_falcon_dmemc_r(u32 i) 535static inline u32 falcon_falcon_dmemc_r(u32 i)
536{ 536{
537 return 0x000001c0 + i*8; 537 return 0x000001c0U + i*8U;
538} 538}
539static inline u32 falcon_falcon_dmemc_offs_f(u32 v) 539static inline u32 falcon_falcon_dmemc_offs_f(u32 v)
540{ 540{
541 return (v & 0x3f) << 2; 541 return (v & 0x3fU) << 2U;
542} 542}
543static inline u32 falcon_falcon_dmemc_offs_m(void) 543static inline u32 falcon_falcon_dmemc_offs_m(void)
544{ 544{
545 return 0x3f << 2; 545 return 0x3fU << 2U;
546} 546}
547static inline u32 falcon_falcon_dmemc_blk_f(u32 v) 547static inline u32 falcon_falcon_dmemc_blk_f(u32 v)
548{ 548{
549 return (v & 0xff) << 8; 549 return (v & 0xffU) << 8U;
550} 550}
551static inline u32 falcon_falcon_dmemc_blk_m(void) 551static inline u32 falcon_falcon_dmemc_blk_m(void)
552{ 552{
553 return 0xff << 8; 553 return 0xffU << 8U;
554} 554}
555static inline u32 falcon_falcon_dmemc_aincw_f(u32 v) 555static inline u32 falcon_falcon_dmemc_aincw_f(u32 v)
556{ 556{
557 return (v & 0x1) << 24; 557 return (v & 0x1U) << 24U;
558} 558}
559static inline u32 falcon_falcon_dmemc_aincr_f(u32 v) 559static inline u32 falcon_falcon_dmemc_aincr_f(u32 v)
560{ 560{
561 return (v & 0x1) << 25; 561 return (v & 0x1U) << 25U;
562} 562}
563static inline u32 falcon_falcon_dmemd_r(u32 i) 563static inline u32 falcon_falcon_dmemd_r(u32 i)
564{ 564{
565 return 0x000001c4 + i*8; 565 return 0x000001c4U + i*8U;
566} 566}
567static inline u32 falcon_falcon_debug1_r(void) 567static inline u32 falcon_falcon_debug1_r(void)
568{ 568{
569 return 0x00000090; 569 return 0x00000090U;
570} 570}
571static inline u32 falcon_falcon_debug1_ctxsw_mode_s(void) 571static inline u32 falcon_falcon_debug1_ctxsw_mode_s(void)
572{ 572{
573 return 1; 573 return 1U;
574} 574}
575static inline u32 falcon_falcon_debug1_ctxsw_mode_f(u32 v) 575static inline u32 falcon_falcon_debug1_ctxsw_mode_f(u32 v)
576{ 576{
577 return (v & 0x1) << 16; 577 return (v & 0x1U) << 16U;
578} 578}
579static inline u32 falcon_falcon_debug1_ctxsw_mode_m(void) 579static inline u32 falcon_falcon_debug1_ctxsw_mode_m(void)
580{ 580{
581 return 0x1 << 16; 581 return 0x1U << 16U;
582} 582}
583static inline u32 falcon_falcon_debug1_ctxsw_mode_v(u32 r) 583static inline u32 falcon_falcon_debug1_ctxsw_mode_v(u32 r)
584{ 584{
585 return (r >> 16) & 0x1; 585 return (r >> 16U) & 0x1U;
586} 586}
587static inline u32 falcon_falcon_debug1_ctxsw_mode_init_f(void) 587static inline u32 falcon_falcon_debug1_ctxsw_mode_init_f(void)
588{ 588{
589 return 0x0; 589 return 0x0U;
590} 590}
591static inline u32 falcon_falcon_debuginfo_r(void) 591static inline u32 falcon_falcon_debuginfo_r(void)
592{ 592{
593 return 0x00000094; 593 return 0x00000094U;
594} 594}
595#endif 595#endif
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_falcon_gp106.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_falcon_gp106.h
index 4f99f2cb..6740b2a6 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_falcon_gp106.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_falcon_gp106.h
@@ -58,542 +58,542 @@
58 58
59static inline u32 falcon_falcon_irqsset_r(void) 59static inline u32 falcon_falcon_irqsset_r(void)
60{ 60{
61 return 0x00000000; 61 return 0x00000000U;
62} 62}
63static inline u32 falcon_falcon_irqsset_swgen0_set_f(void) 63static inline u32 falcon_falcon_irqsset_swgen0_set_f(void)
64{ 64{
65 return 0x40; 65 return 0x40U;
66} 66}
67static inline u32 falcon_falcon_irqsclr_r(void) 67static inline u32 falcon_falcon_irqsclr_r(void)
68{ 68{
69 return 0x00000004; 69 return 0x00000004U;
70} 70}
71static inline u32 falcon_falcon_irqstat_r(void) 71static inline u32 falcon_falcon_irqstat_r(void)
72{ 72{
73 return 0x00000008; 73 return 0x00000008U;
74} 74}
75static inline u32 falcon_falcon_irqstat_halt_true_f(void) 75static inline u32 falcon_falcon_irqstat_halt_true_f(void)
76{ 76{
77 return 0x10; 77 return 0x10U;
78} 78}
79static inline u32 falcon_falcon_irqstat_exterr_true_f(void) 79static inline u32 falcon_falcon_irqstat_exterr_true_f(void)
80{ 80{
81 return 0x20; 81 return 0x20U;
82} 82}
83static inline u32 falcon_falcon_irqstat_swgen0_true_f(void) 83static inline u32 falcon_falcon_irqstat_swgen0_true_f(void)
84{ 84{
85 return 0x40; 85 return 0x40U;
86} 86}
87static inline u32 falcon_falcon_irqmode_r(void) 87static inline u32 falcon_falcon_irqmode_r(void)
88{ 88{
89 return 0x0000000c; 89 return 0x0000000cU;
90} 90}
91static inline u32 falcon_falcon_irqmset_r(void) 91static inline u32 falcon_falcon_irqmset_r(void)
92{ 92{
93 return 0x00000010; 93 return 0x00000010U;
94} 94}
95static inline u32 falcon_falcon_irqmset_gptmr_f(u32 v) 95static inline u32 falcon_falcon_irqmset_gptmr_f(u32 v)
96{ 96{
97 return (v & 0x1) << 0; 97 return (v & 0x1U) << 0U;
98} 98}
99static inline u32 falcon_falcon_irqmset_wdtmr_f(u32 v) 99static inline u32 falcon_falcon_irqmset_wdtmr_f(u32 v)
100{ 100{
101 return (v & 0x1) << 1; 101 return (v & 0x1U) << 1U;
102} 102}
103static inline u32 falcon_falcon_irqmset_mthd_f(u32 v) 103static inline u32 falcon_falcon_irqmset_mthd_f(u32 v)
104{ 104{
105 return (v & 0x1) << 2; 105 return (v & 0x1U) << 2U;
106} 106}
107static inline u32 falcon_falcon_irqmset_ctxsw_f(u32 v) 107static inline u32 falcon_falcon_irqmset_ctxsw_f(u32 v)
108{ 108{
109 return (v & 0x1) << 3; 109 return (v & 0x1U) << 3U;
110} 110}
111static inline u32 falcon_falcon_irqmset_halt_f(u32 v) 111static inline u32 falcon_falcon_irqmset_halt_f(u32 v)
112{ 112{
113 return (v & 0x1) << 4; 113 return (v & 0x1U) << 4U;
114} 114}
115static inline u32 falcon_falcon_irqmset_exterr_f(u32 v) 115static inline u32 falcon_falcon_irqmset_exterr_f(u32 v)
116{ 116{
117 return (v & 0x1) << 5; 117 return (v & 0x1U) << 5U;
118} 118}
119static inline u32 falcon_falcon_irqmset_swgen0_f(u32 v) 119static inline u32 falcon_falcon_irqmset_swgen0_f(u32 v)
120{ 120{
121 return (v & 0x1) << 6; 121 return (v & 0x1U) << 6U;
122} 122}
123static inline u32 falcon_falcon_irqmset_swgen1_f(u32 v) 123static inline u32 falcon_falcon_irqmset_swgen1_f(u32 v)
124{ 124{
125 return (v & 0x1) << 7; 125 return (v & 0x1U) << 7U;
126} 126}
127static inline u32 falcon_falcon_irqmclr_r(void) 127static inline u32 falcon_falcon_irqmclr_r(void)
128{ 128{
129 return 0x00000014; 129 return 0x00000014U;
130} 130}
131static inline u32 falcon_falcon_irqmclr_gptmr_f(u32 v) 131static inline u32 falcon_falcon_irqmclr_gptmr_f(u32 v)
132{ 132{
133 return (v & 0x1) << 0; 133 return (v & 0x1U) << 0U;
134} 134}
135static inline u32 falcon_falcon_irqmclr_wdtmr_f(u32 v) 135static inline u32 falcon_falcon_irqmclr_wdtmr_f(u32 v)
136{ 136{
137 return (v & 0x1) << 1; 137 return (v & 0x1U) << 1U;
138} 138}
139static inline u32 falcon_falcon_irqmclr_mthd_f(u32 v) 139static inline u32 falcon_falcon_irqmclr_mthd_f(u32 v)
140{ 140{
141 return (v & 0x1) << 2; 141 return (v & 0x1U) << 2U;
142} 142}
143static inline u32 falcon_falcon_irqmclr_ctxsw_f(u32 v) 143static inline u32 falcon_falcon_irqmclr_ctxsw_f(u32 v)
144{ 144{
145 return (v & 0x1) << 3; 145 return (v & 0x1U) << 3U;
146} 146}
147static inline u32 falcon_falcon_irqmclr_halt_f(u32 v) 147static inline u32 falcon_falcon_irqmclr_halt_f(u32 v)
148{ 148{
149 return (v & 0x1) << 4; 149 return (v & 0x1U) << 4U;
150} 150}
151static inline u32 falcon_falcon_irqmclr_exterr_f(u32 v) 151static inline u32 falcon_falcon_irqmclr_exterr_f(u32 v)
152{ 152{
153 return (v & 0x1) << 5; 153 return (v & 0x1U) << 5U;
154} 154}
155static inline u32 falcon_falcon_irqmclr_swgen0_f(u32 v) 155static inline u32 falcon_falcon_irqmclr_swgen0_f(u32 v)
156{ 156{
157 return (v & 0x1) << 6; 157 return (v & 0x1U) << 6U;
158} 158}
159static inline u32 falcon_falcon_irqmclr_swgen1_f(u32 v) 159static inline u32 falcon_falcon_irqmclr_swgen1_f(u32 v)
160{ 160{
161 return (v & 0x1) << 7; 161 return (v & 0x1U) << 7U;
162} 162}
163static inline u32 falcon_falcon_irqmclr_ext_f(u32 v) 163static inline u32 falcon_falcon_irqmclr_ext_f(u32 v)
164{ 164{
165 return (v & 0xff) << 8; 165 return (v & 0xffU) << 8U;
166} 166}
167static inline u32 falcon_falcon_irqmask_r(void) 167static inline u32 falcon_falcon_irqmask_r(void)
168{ 168{
169 return 0x00000018; 169 return 0x00000018U;
170} 170}
171static inline u32 falcon_falcon_irqdest_r(void) 171static inline u32 falcon_falcon_irqdest_r(void)
172{ 172{
173 return 0x0000001c; 173 return 0x0000001cU;
174} 174}
175static inline u32 falcon_falcon_irqdest_host_gptmr_f(u32 v) 175static inline u32 falcon_falcon_irqdest_host_gptmr_f(u32 v)
176{ 176{
177 return (v & 0x1) << 0; 177 return (v & 0x1U) << 0U;
178} 178}
179static inline u32 falcon_falcon_irqdest_host_wdtmr_f(u32 v) 179static inline u32 falcon_falcon_irqdest_host_wdtmr_f(u32 v)
180{ 180{
181 return (v & 0x1) << 1; 181 return (v & 0x1U) << 1U;
182} 182}
183static inline u32 falcon_falcon_irqdest_host_mthd_f(u32 v) 183static inline u32 falcon_falcon_irqdest_host_mthd_f(u32 v)
184{ 184{
185 return (v & 0x1) << 2; 185 return (v & 0x1U) << 2U;
186} 186}
187static inline u32 falcon_falcon_irqdest_host_ctxsw_f(u32 v) 187static inline u32 falcon_falcon_irqdest_host_ctxsw_f(u32 v)
188{ 188{
189 return (v & 0x1) << 3; 189 return (v & 0x1U) << 3U;
190} 190}
191static inline u32 falcon_falcon_irqdest_host_halt_f(u32 v) 191static inline u32 falcon_falcon_irqdest_host_halt_f(u32 v)
192{ 192{
193 return (v & 0x1) << 4; 193 return (v & 0x1U) << 4U;
194} 194}
195static inline u32 falcon_falcon_irqdest_host_exterr_f(u32 v) 195static inline u32 falcon_falcon_irqdest_host_exterr_f(u32 v)
196{ 196{
197 return (v & 0x1) << 5; 197 return (v & 0x1U) << 5U;
198} 198}
199static inline u32 falcon_falcon_irqdest_host_swgen0_f(u32 v) 199static inline u32 falcon_falcon_irqdest_host_swgen0_f(u32 v)
200{ 200{
201 return (v & 0x1) << 6; 201 return (v & 0x1U) << 6U;
202} 202}
203static inline u32 falcon_falcon_irqdest_host_swgen1_f(u32 v) 203static inline u32 falcon_falcon_irqdest_host_swgen1_f(u32 v)
204{ 204{
205 return (v & 0x1) << 7; 205 return (v & 0x1U) << 7U;
206} 206}
207static inline u32 falcon_falcon_irqdest_host_ext_f(u32 v) 207static inline u32 falcon_falcon_irqdest_host_ext_f(u32 v)
208{ 208{
209 return (v & 0xff) << 8; 209 return (v & 0xffU) << 8U;
210} 210}
211static inline u32 falcon_falcon_irqdest_target_gptmr_f(u32 v) 211static inline u32 falcon_falcon_irqdest_target_gptmr_f(u32 v)
212{ 212{
213 return (v & 0x1) << 16; 213 return (v & 0x1U) << 16U;
214} 214}
215static inline u32 falcon_falcon_irqdest_target_wdtmr_f(u32 v) 215static inline u32 falcon_falcon_irqdest_target_wdtmr_f(u32 v)
216{ 216{
217 return (v & 0x1) << 17; 217 return (v & 0x1U) << 17U;
218} 218}
219static inline u32 falcon_falcon_irqdest_target_mthd_f(u32 v) 219static inline u32 falcon_falcon_irqdest_target_mthd_f(u32 v)
220{ 220{
221 return (v & 0x1) << 18; 221 return (v & 0x1U) << 18U;
222} 222}
223static inline u32 falcon_falcon_irqdest_target_ctxsw_f(u32 v) 223static inline u32 falcon_falcon_irqdest_target_ctxsw_f(u32 v)
224{ 224{
225 return (v & 0x1) << 19; 225 return (v & 0x1U) << 19U;
226} 226}
227static inline u32 falcon_falcon_irqdest_target_halt_f(u32 v) 227static inline u32 falcon_falcon_irqdest_target_halt_f(u32 v)
228{ 228{
229 return (v & 0x1) << 20; 229 return (v & 0x1U) << 20U;
230} 230}
231static inline u32 falcon_falcon_irqdest_target_exterr_f(u32 v) 231static inline u32 falcon_falcon_irqdest_target_exterr_f(u32 v)
232{ 232{
233 return (v & 0x1) << 21; 233 return (v & 0x1U) << 21U;
234} 234}
235static inline u32 falcon_falcon_irqdest_target_swgen0_f(u32 v) 235static inline u32 falcon_falcon_irqdest_target_swgen0_f(u32 v)
236{ 236{
237 return (v & 0x1) << 22; 237 return (v & 0x1U) << 22U;
238} 238}
239static inline u32 falcon_falcon_irqdest_target_swgen1_f(u32 v) 239static inline u32 falcon_falcon_irqdest_target_swgen1_f(u32 v)
240{ 240{
241 return (v & 0x1) << 23; 241 return (v & 0x1U) << 23U;
242} 242}
243static inline u32 falcon_falcon_irqdest_target_ext_f(u32 v) 243static inline u32 falcon_falcon_irqdest_target_ext_f(u32 v)
244{ 244{
245 return (v & 0xff) << 24; 245 return (v & 0xffU) << 24U;
246} 246}
247static inline u32 falcon_falcon_curctx_r(void) 247static inline u32 falcon_falcon_curctx_r(void)
248{ 248{
249 return 0x00000050; 249 return 0x00000050U;
250} 250}
251static inline u32 falcon_falcon_nxtctx_r(void) 251static inline u32 falcon_falcon_nxtctx_r(void)
252{ 252{
253 return 0x00000054; 253 return 0x00000054U;
254} 254}
255static inline u32 falcon_falcon_mailbox0_r(void) 255static inline u32 falcon_falcon_mailbox0_r(void)
256{ 256{
257 return 0x00000040; 257 return 0x00000040U;
258} 258}
259static inline u32 falcon_falcon_mailbox1_r(void) 259static inline u32 falcon_falcon_mailbox1_r(void)
260{ 260{
261 return 0x00000044; 261 return 0x00000044U;
262} 262}
263static inline u32 falcon_falcon_itfen_r(void) 263static inline u32 falcon_falcon_itfen_r(void)
264{ 264{
265 return 0x00000048; 265 return 0x00000048U;
266} 266}
267static inline u32 falcon_falcon_itfen_ctxen_enable_f(void) 267static inline u32 falcon_falcon_itfen_ctxen_enable_f(void)
268{ 268{
269 return 0x1; 269 return 0x1U;
270} 270}
271static inline u32 falcon_falcon_idlestate_r(void) 271static inline u32 falcon_falcon_idlestate_r(void)
272{ 272{
273 return 0x0000004c; 273 return 0x0000004cU;
274} 274}
275static inline u32 falcon_falcon_idlestate_falcon_busy_v(u32 r) 275static inline u32 falcon_falcon_idlestate_falcon_busy_v(u32 r)
276{ 276{
277 return (r >> 0) & 0x1; 277 return (r >> 0U) & 0x1U;
278} 278}
279static inline u32 falcon_falcon_idlestate_ext_busy_v(u32 r) 279static inline u32 falcon_falcon_idlestate_ext_busy_v(u32 r)
280{ 280{
281 return (r >> 1) & 0x7fff; 281 return (r >> 1U) & 0x7fffU;
282} 282}
283static inline u32 falcon_falcon_os_r(void) 283static inline u32 falcon_falcon_os_r(void)
284{ 284{
285 return 0x00000080; 285 return 0x00000080U;
286} 286}
287static inline u32 falcon_falcon_engctl_r(void) 287static inline u32 falcon_falcon_engctl_r(void)
288{ 288{
289 return 0x000000a4; 289 return 0x000000a4U;
290} 290}
291static inline u32 falcon_falcon_cpuctl_r(void) 291static inline u32 falcon_falcon_cpuctl_r(void)
292{ 292{
293 return 0x00000100; 293 return 0x00000100U;
294} 294}
295static inline u32 falcon_falcon_cpuctl_startcpu_f(u32 v) 295static inline u32 falcon_falcon_cpuctl_startcpu_f(u32 v)
296{ 296{
297 return (v & 0x1) << 1; 297 return (v & 0x1U) << 1U;
298} 298}
299static inline u32 falcon_falcon_cpuctl_sreset_f(u32 v) 299static inline u32 falcon_falcon_cpuctl_sreset_f(u32 v)
300{ 300{
301 return (v & 0x1) << 2; 301 return (v & 0x1U) << 2U;
302} 302}
303static inline u32 falcon_falcon_cpuctl_hreset_f(u32 v) 303static inline u32 falcon_falcon_cpuctl_hreset_f(u32 v)
304{ 304{
305 return (v & 0x1) << 3; 305 return (v & 0x1U) << 3U;
306} 306}
307static inline u32 falcon_falcon_cpuctl_halt_intr_f(u32 v) 307static inline u32 falcon_falcon_cpuctl_halt_intr_f(u32 v)
308{ 308{
309 return (v & 0x1) << 4; 309 return (v & 0x1U) << 4U;
310} 310}
311static inline u32 falcon_falcon_cpuctl_halt_intr_m(void) 311static inline u32 falcon_falcon_cpuctl_halt_intr_m(void)
312{ 312{
313 return 0x1 << 4; 313 return 0x1U << 4U;
314} 314}
315static inline u32 falcon_falcon_cpuctl_halt_intr_v(u32 r) 315static inline u32 falcon_falcon_cpuctl_halt_intr_v(u32 r)
316{ 316{
317 return (r >> 4) & 0x1; 317 return (r >> 4U) & 0x1U;
318} 318}
319static inline u32 falcon_falcon_cpuctl_stopped_m(void) 319static inline u32 falcon_falcon_cpuctl_stopped_m(void)
320{ 320{
321 return 0x1 << 5; 321 return 0x1U << 5U;
322} 322}
323static inline u32 falcon_falcon_cpuctl_cpuctl_alias_en_f(u32 v) 323static inline u32 falcon_falcon_cpuctl_cpuctl_alias_en_f(u32 v)
324{ 324{
325 return (v & 0x1) << 6; 325 return (v & 0x1U) << 6U;
326} 326}
327static inline u32 falcon_falcon_cpuctl_cpuctl_alias_en_m(void) 327static inline u32 falcon_falcon_cpuctl_cpuctl_alias_en_m(void)
328{ 328{
329 return 0x1 << 6; 329 return 0x1U << 6U;
330} 330}
331static inline u32 falcon_falcon_cpuctl_cpuctl_alias_en_v(u32 r) 331static inline u32 falcon_falcon_cpuctl_cpuctl_alias_en_v(u32 r)
332{ 332{
333 return (r >> 6) & 0x1; 333 return (r >> 6U) & 0x1U;
334} 334}
335static inline u32 falcon_falcon_cpuctl_alias_r(void) 335static inline u32 falcon_falcon_cpuctl_alias_r(void)
336{ 336{
337 return 0x00000130; 337 return 0x00000130U;
338} 338}
339static inline u32 falcon_falcon_cpuctl_alias_startcpu_f(u32 v) 339static inline u32 falcon_falcon_cpuctl_alias_startcpu_f(u32 v)
340{ 340{
341 return (v & 0x1) << 1; 341 return (v & 0x1U) << 1U;
342} 342}
343static inline u32 falcon_falcon_imemc_r(u32 i) 343static inline u32 falcon_falcon_imemc_r(u32 i)
344{ 344{
345 return 0x00000180 + i*16; 345 return 0x00000180U + i*16U;
346} 346}
347static inline u32 falcon_falcon_imemc_offs_f(u32 v) 347static inline u32 falcon_falcon_imemc_offs_f(u32 v)
348{ 348{
349 return (v & 0x3f) << 2; 349 return (v & 0x3fU) << 2U;
350} 350}
351static inline u32 falcon_falcon_imemc_blk_f(u32 v) 351static inline u32 falcon_falcon_imemc_blk_f(u32 v)
352{ 352{
353 return (v & 0xff) << 8; 353 return (v & 0xffU) << 8U;
354} 354}
355static inline u32 falcon_falcon_imemc_aincw_f(u32 v) 355static inline u32 falcon_falcon_imemc_aincw_f(u32 v)
356{ 356{
357 return (v & 0x1) << 24; 357 return (v & 0x1U) << 24U;
358} 358}
359static inline u32 falcon_falcon_imemd_r(u32 i) 359static inline u32 falcon_falcon_imemd_r(u32 i)
360{ 360{
361 return 0x00000184 + i*16; 361 return 0x00000184U + i*16U;
362} 362}
363static inline u32 falcon_falcon_imemt_r(u32 i) 363static inline u32 falcon_falcon_imemt_r(u32 i)
364{ 364{
365 return 0x00000188 + i*16; 365 return 0x00000188U + i*16U;
366} 366}
367static inline u32 falcon_falcon_sctl_r(void) 367static inline u32 falcon_falcon_sctl_r(void)
368{ 368{
369 return 0x00000240; 369 return 0x00000240U;
370} 370}
371static inline u32 falcon_falcon_mmu_phys_sec_r(void) 371static inline u32 falcon_falcon_mmu_phys_sec_r(void)
372{ 372{
373 return 0x00100ce4; 373 return 0x00100ce4U;
374} 374}
375static inline u32 falcon_falcon_bootvec_r(void) 375static inline u32 falcon_falcon_bootvec_r(void)
376{ 376{
377 return 0x00000104; 377 return 0x00000104U;
378} 378}
379static inline u32 falcon_falcon_bootvec_vec_f(u32 v) 379static inline u32 falcon_falcon_bootvec_vec_f(u32 v)
380{ 380{
381 return (v & 0xffffffff) << 0; 381 return (v & 0xffffffffU) << 0U;
382} 382}
383static inline u32 falcon_falcon_dmactl_r(void) 383static inline u32 falcon_falcon_dmactl_r(void)
384{ 384{
385 return 0x0000010c; 385 return 0x0000010cU;
386} 386}
387static inline u32 falcon_falcon_dmactl_dmem_scrubbing_m(void) 387static inline u32 falcon_falcon_dmactl_dmem_scrubbing_m(void)
388{ 388{
389 return 0x1 << 1; 389 return 0x1U << 1U;
390} 390}
391static inline u32 falcon_falcon_dmactl_imem_scrubbing_m(void) 391static inline u32 falcon_falcon_dmactl_imem_scrubbing_m(void)
392{ 392{
393 return 0x1 << 2; 393 return 0x1U << 2U;
394} 394}
395static inline u32 falcon_falcon_dmactl_require_ctx_f(u32 v) 395static inline u32 falcon_falcon_dmactl_require_ctx_f(u32 v)
396{ 396{
397 return (v & 0x1) << 0; 397 return (v & 0x1U) << 0U;
398} 398}
399static inline u32 falcon_falcon_hwcfg_r(void) 399static inline u32 falcon_falcon_hwcfg_r(void)
400{ 400{
401 return 0x00000108; 401 return 0x00000108U;
402} 402}
403static inline u32 falcon_falcon_hwcfg_imem_size_v(u32 r) 403static inline u32 falcon_falcon_hwcfg_imem_size_v(u32 r)
404{ 404{
405 return (r >> 0) & 0x1ff; 405 return (r >> 0U) & 0x1ffU;
406} 406}
407static inline u32 falcon_falcon_hwcfg_dmem_size_v(u32 r) 407static inline u32 falcon_falcon_hwcfg_dmem_size_v(u32 r)
408{ 408{
409 return (r >> 9) & 0x1ff; 409 return (r >> 9U) & 0x1ffU;
410} 410}
411static inline u32 falcon_falcon_dmatrfbase_r(void) 411static inline u32 falcon_falcon_dmatrfbase_r(void)
412{ 412{
413 return 0x00000110; 413 return 0x00000110U;
414} 414}
415static inline u32 falcon_falcon_dmatrfbase1_r(void) 415static inline u32 falcon_falcon_dmatrfbase1_r(void)
416{ 416{
417 return 0x00000128; 417 return 0x00000128U;
418} 418}
419static inline u32 falcon_falcon_dmatrfmoffs_r(void) 419static inline u32 falcon_falcon_dmatrfmoffs_r(void)
420{ 420{
421 return 0x00000114; 421 return 0x00000114U;
422} 422}
423static inline u32 falcon_falcon_dmatrfcmd_r(void) 423static inline u32 falcon_falcon_dmatrfcmd_r(void)
424{ 424{
425 return 0x00000118; 425 return 0x00000118U;
426} 426}
427static inline u32 falcon_falcon_dmatrfcmd_imem_f(u32 v) 427static inline u32 falcon_falcon_dmatrfcmd_imem_f(u32 v)
428{ 428{
429 return (v & 0x1) << 4; 429 return (v & 0x1U) << 4U;
430} 430}
431static inline u32 falcon_falcon_dmatrfcmd_write_f(u32 v) 431static inline u32 falcon_falcon_dmatrfcmd_write_f(u32 v)
432{ 432{
433 return (v & 0x1) << 5; 433 return (v & 0x1U) << 5U;
434} 434}
435static inline u32 falcon_falcon_dmatrfcmd_size_f(u32 v) 435static inline u32 falcon_falcon_dmatrfcmd_size_f(u32 v)
436{ 436{
437 return (v & 0x7) << 8; 437 return (v & 0x7U) << 8U;
438} 438}
439static inline u32 falcon_falcon_dmatrfcmd_ctxdma_f(u32 v) 439static inline u32 falcon_falcon_dmatrfcmd_ctxdma_f(u32 v)
440{ 440{
441 return (v & 0x7) << 12; 441 return (v & 0x7U) << 12U;
442} 442}
443static inline u32 falcon_falcon_dmatrffboffs_r(void) 443static inline u32 falcon_falcon_dmatrffboffs_r(void)
444{ 444{
445 return 0x0000011c; 445 return 0x0000011cU;
446} 446}
447static inline u32 falcon_falcon_imctl_debug_r(void) 447static inline u32 falcon_falcon_imctl_debug_r(void)
448{ 448{
449 return 0x0000015c; 449 return 0x0000015cU;
450} 450}
451static inline u32 falcon_falcon_imctl_debug_addr_blk_f(u32 v) 451static inline u32 falcon_falcon_imctl_debug_addr_blk_f(u32 v)
452{ 452{
453 return (v & 0xffffff) << 0; 453 return (v & 0xffffffU) << 0U;
454} 454}
455static inline u32 falcon_falcon_imctl_debug_cmd_f(u32 v) 455static inline u32 falcon_falcon_imctl_debug_cmd_f(u32 v)
456{ 456{
457 return (v & 0x7) << 24; 457 return (v & 0x7U) << 24U;
458} 458}
459static inline u32 falcon_falcon_imstat_r(void) 459static inline u32 falcon_falcon_imstat_r(void)
460{ 460{
461 return 0x00000144; 461 return 0x00000144U;
462} 462}
463static inline u32 falcon_falcon_traceidx_r(void) 463static inline u32 falcon_falcon_traceidx_r(void)
464{ 464{
465 return 0x00000148; 465 return 0x00000148U;
466} 466}
467static inline u32 falcon_falcon_traceidx_maxidx_v(u32 r) 467static inline u32 falcon_falcon_traceidx_maxidx_v(u32 r)
468{ 468{
469 return (r >> 16) & 0xff; 469 return (r >> 16U) & 0xffU;
470} 470}
471static inline u32 falcon_falcon_traceidx_idx_f(u32 v) 471static inline u32 falcon_falcon_traceidx_idx_f(u32 v)
472{ 472{
473 return (v & 0xff) << 0; 473 return (v & 0xffU) << 0U;
474} 474}
475static inline u32 falcon_falcon_tracepc_r(void) 475static inline u32 falcon_falcon_tracepc_r(void)
476{ 476{
477 return 0x0000014c; 477 return 0x0000014cU;
478} 478}
479static inline u32 falcon_falcon_tracepc_pc_v(u32 r) 479static inline u32 falcon_falcon_tracepc_pc_v(u32 r)
480{ 480{
481 return (r >> 0) & 0xffffff; 481 return (r >> 0U) & 0xffffffU;
482} 482}
483static inline u32 falcon_falcon_exterraddr_r(void) 483static inline u32 falcon_falcon_exterraddr_r(void)
484{ 484{
485 return 0x00000168; 485 return 0x00000168U;
486} 486}
487static inline u32 falcon_falcon_exterrstat_r(void) 487static inline u32 falcon_falcon_exterrstat_r(void)
488{ 488{
489 return 0x0000016c; 489 return 0x0000016cU;
490} 490}
491static inline u32 falcon_falcon_exterrstat_valid_m(void) 491static inline u32 falcon_falcon_exterrstat_valid_m(void)
492{ 492{
493 return 0x1 << 31; 493 return 0x1U << 31U;
494} 494}
495static inline u32 falcon_falcon_exterrstat_valid_v(u32 r) 495static inline u32 falcon_falcon_exterrstat_valid_v(u32 r)
496{ 496{
497 return (r >> 31) & 0x1; 497 return (r >> 31U) & 0x1U;
498} 498}
499static inline u32 falcon_falcon_exterrstat_valid_true_v(void) 499static inline u32 falcon_falcon_exterrstat_valid_true_v(void)
500{ 500{
501 return 0x00000001; 501 return 0x00000001U;
502} 502}
503static inline u32 falcon_falcon_icd_cmd_r(void) 503static inline u32 falcon_falcon_icd_cmd_r(void)
504{ 504{
505 return 0x00000200; 505 return 0x00000200U;
506} 506}
507static inline u32 falcon_falcon_icd_cmd_opc_s(void) 507static inline u32 falcon_falcon_icd_cmd_opc_s(void)
508{ 508{
509 return 4; 509 return 4U;
510} 510}
511static inline u32 falcon_falcon_icd_cmd_opc_f(u32 v) 511static inline u32 falcon_falcon_icd_cmd_opc_f(u32 v)
512{ 512{
513 return (v & 0xf) << 0; 513 return (v & 0xfU) << 0U;
514} 514}
515static inline u32 falcon_falcon_icd_cmd_opc_m(void) 515static inline u32 falcon_falcon_icd_cmd_opc_m(void)
516{ 516{
517 return 0xf << 0; 517 return 0xfU << 0U;
518} 518}
519static inline u32 falcon_falcon_icd_cmd_opc_v(u32 r) 519static inline u32 falcon_falcon_icd_cmd_opc_v(u32 r)
520{ 520{
521 return (r >> 0) & 0xf; 521 return (r >> 0U) & 0xfU;
522} 522}
523static inline u32 falcon_falcon_icd_cmd_opc_rreg_f(void) 523static inline u32 falcon_falcon_icd_cmd_opc_rreg_f(void)
524{ 524{
525 return 0x8; 525 return 0x8U;
526} 526}
527static inline u32 falcon_falcon_icd_cmd_opc_rstat_f(void) 527static inline u32 falcon_falcon_icd_cmd_opc_rstat_f(void)
528{ 528{
529 return 0xe; 529 return 0xeU;
530} 530}
531static inline u32 falcon_falcon_icd_cmd_idx_f(u32 v) 531static inline u32 falcon_falcon_icd_cmd_idx_f(u32 v)
532{ 532{
533 return (v & 0x1f) << 8; 533 return (v & 0x1fU) << 8U;
534} 534}
535static inline u32 falcon_falcon_icd_rdata_r(void) 535static inline u32 falcon_falcon_icd_rdata_r(void)
536{ 536{
537 return 0x0000020c; 537 return 0x0000020cU;
538} 538}
539static inline u32 falcon_falcon_dmemc_r(u32 i) 539static inline u32 falcon_falcon_dmemc_r(u32 i)
540{ 540{
541 return 0x000001c0 + i*8; 541 return 0x000001c0U + i*8U;
542} 542}
543static inline u32 falcon_falcon_dmemc_offs_f(u32 v) 543static inline u32 falcon_falcon_dmemc_offs_f(u32 v)
544{ 544{
545 return (v & 0x3f) << 2; 545 return (v & 0x3fU) << 2U;
546} 546}
547static inline u32 falcon_falcon_dmemc_offs_m(void) 547static inline u32 falcon_falcon_dmemc_offs_m(void)
548{ 548{
549 return 0x3f << 2; 549 return 0x3fU << 2U;
550} 550}
551static inline u32 falcon_falcon_dmemc_blk_f(u32 v) 551static inline u32 falcon_falcon_dmemc_blk_f(u32 v)
552{ 552{
553 return (v & 0xff) << 8; 553 return (v & 0xffU) << 8U;
554} 554}
555static inline u32 falcon_falcon_dmemc_blk_m(void) 555static inline u32 falcon_falcon_dmemc_blk_m(void)
556{ 556{
557 return 0xff << 8; 557 return 0xffU << 8U;
558} 558}
559static inline u32 falcon_falcon_dmemc_aincw_f(u32 v) 559static inline u32 falcon_falcon_dmemc_aincw_f(u32 v)
560{ 560{
561 return (v & 0x1) << 24; 561 return (v & 0x1U) << 24U;
562} 562}
563static inline u32 falcon_falcon_dmemc_aincr_f(u32 v) 563static inline u32 falcon_falcon_dmemc_aincr_f(u32 v)
564{ 564{
565 return (v & 0x1) << 25; 565 return (v & 0x1U) << 25U;
566} 566}
567static inline u32 falcon_falcon_dmemd_r(u32 i) 567static inline u32 falcon_falcon_dmemd_r(u32 i)
568{ 568{
569 return 0x000001c4 + i*8; 569 return 0x000001c4U + i*8U;
570} 570}
571static inline u32 falcon_falcon_debug1_r(void) 571static inline u32 falcon_falcon_debug1_r(void)
572{ 572{
573 return 0x00000090; 573 return 0x00000090U;
574} 574}
575static inline u32 falcon_falcon_debug1_ctxsw_mode_s(void) 575static inline u32 falcon_falcon_debug1_ctxsw_mode_s(void)
576{ 576{
577 return 1; 577 return 1U;
578} 578}
579static inline u32 falcon_falcon_debug1_ctxsw_mode_f(u32 v) 579static inline u32 falcon_falcon_debug1_ctxsw_mode_f(u32 v)
580{ 580{
581 return (v & 0x1) << 16; 581 return (v & 0x1U) << 16U;
582} 582}
583static inline u32 falcon_falcon_debug1_ctxsw_mode_m(void) 583static inline u32 falcon_falcon_debug1_ctxsw_mode_m(void)
584{ 584{
585 return 0x1 << 16; 585 return 0x1U << 16U;
586} 586}
587static inline u32 falcon_falcon_debug1_ctxsw_mode_v(u32 r) 587static inline u32 falcon_falcon_debug1_ctxsw_mode_v(u32 r)
588{ 588{
589 return (r >> 16) & 0x1; 589 return (r >> 16U) & 0x1U;
590} 590}
591static inline u32 falcon_falcon_debug1_ctxsw_mode_init_f(void) 591static inline u32 falcon_falcon_debug1_ctxsw_mode_init_f(void)
592{ 592{
593 return 0x0; 593 return 0x0U;
594} 594}
595static inline u32 falcon_falcon_debuginfo_r(void) 595static inline u32 falcon_falcon_debuginfo_r(void)
596{ 596{
597 return 0x00000094; 597 return 0x00000094U;
598} 598}
599#endif 599#endif
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_falcon_gp10b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_falcon_gp10b.h
index 67b7ad75..918f262b 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_falcon_gp10b.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_falcon_gp10b.h
@@ -58,542 +58,542 @@
58 58
59static inline u32 falcon_falcon_irqsset_r(void) 59static inline u32 falcon_falcon_irqsset_r(void)
60{ 60{
61 return 0x00000000; 61 return 0x00000000U;
62} 62}
63static inline u32 falcon_falcon_irqsset_swgen0_set_f(void) 63static inline u32 falcon_falcon_irqsset_swgen0_set_f(void)
64{ 64{
65 return 0x40; 65 return 0x40U;
66} 66}
67static inline u32 falcon_falcon_irqsclr_r(void) 67static inline u32 falcon_falcon_irqsclr_r(void)
68{ 68{
69 return 0x00000004; 69 return 0x00000004U;
70} 70}
71static inline u32 falcon_falcon_irqstat_r(void) 71static inline u32 falcon_falcon_irqstat_r(void)
72{ 72{
73 return 0x00000008; 73 return 0x00000008U;
74} 74}
75static inline u32 falcon_falcon_irqstat_halt_true_f(void) 75static inline u32 falcon_falcon_irqstat_halt_true_f(void)
76{ 76{
77 return 0x10; 77 return 0x10U;
78} 78}
79static inline u32 falcon_falcon_irqstat_exterr_true_f(void) 79static inline u32 falcon_falcon_irqstat_exterr_true_f(void)
80{ 80{
81 return 0x20; 81 return 0x20U;
82} 82}
83static inline u32 falcon_falcon_irqstat_swgen0_true_f(void) 83static inline u32 falcon_falcon_irqstat_swgen0_true_f(void)
84{ 84{
85 return 0x40; 85 return 0x40U;
86} 86}
87static inline u32 falcon_falcon_irqmode_r(void) 87static inline u32 falcon_falcon_irqmode_r(void)
88{ 88{
89 return 0x0000000c; 89 return 0x0000000cU;
90} 90}
91static inline u32 falcon_falcon_irqmset_r(void) 91static inline u32 falcon_falcon_irqmset_r(void)
92{ 92{
93 return 0x00000010; 93 return 0x00000010U;
94} 94}
95static inline u32 falcon_falcon_irqmset_gptmr_f(u32 v) 95static inline u32 falcon_falcon_irqmset_gptmr_f(u32 v)
96{ 96{
97 return (v & 0x1) << 0; 97 return (v & 0x1U) << 0U;
98} 98}
99static inline u32 falcon_falcon_irqmset_wdtmr_f(u32 v) 99static inline u32 falcon_falcon_irqmset_wdtmr_f(u32 v)
100{ 100{
101 return (v & 0x1) << 1; 101 return (v & 0x1U) << 1U;
102} 102}
103static inline u32 falcon_falcon_irqmset_mthd_f(u32 v) 103static inline u32 falcon_falcon_irqmset_mthd_f(u32 v)
104{ 104{
105 return (v & 0x1) << 2; 105 return (v & 0x1U) << 2U;
106} 106}
107static inline u32 falcon_falcon_irqmset_ctxsw_f(u32 v) 107static inline u32 falcon_falcon_irqmset_ctxsw_f(u32 v)
108{ 108{
109 return (v & 0x1) << 3; 109 return (v & 0x1U) << 3U;
110} 110}
111static inline u32 falcon_falcon_irqmset_halt_f(u32 v) 111static inline u32 falcon_falcon_irqmset_halt_f(u32 v)
112{ 112{
113 return (v & 0x1) << 4; 113 return (v & 0x1U) << 4U;
114} 114}
115static inline u32 falcon_falcon_irqmset_exterr_f(u32 v) 115static inline u32 falcon_falcon_irqmset_exterr_f(u32 v)
116{ 116{
117 return (v & 0x1) << 5; 117 return (v & 0x1U) << 5U;
118} 118}
119static inline u32 falcon_falcon_irqmset_swgen0_f(u32 v) 119static inline u32 falcon_falcon_irqmset_swgen0_f(u32 v)
120{ 120{
121 return (v & 0x1) << 6; 121 return (v & 0x1U) << 6U;
122} 122}
123static inline u32 falcon_falcon_irqmset_swgen1_f(u32 v) 123static inline u32 falcon_falcon_irqmset_swgen1_f(u32 v)
124{ 124{
125 return (v & 0x1) << 7; 125 return (v & 0x1U) << 7U;
126} 126}
127static inline u32 falcon_falcon_irqmclr_r(void) 127static inline u32 falcon_falcon_irqmclr_r(void)
128{ 128{
129 return 0x00000014; 129 return 0x00000014U;
130} 130}
131static inline u32 falcon_falcon_irqmclr_gptmr_f(u32 v) 131static inline u32 falcon_falcon_irqmclr_gptmr_f(u32 v)
132{ 132{
133 return (v & 0x1) << 0; 133 return (v & 0x1U) << 0U;
134} 134}
135static inline u32 falcon_falcon_irqmclr_wdtmr_f(u32 v) 135static inline u32 falcon_falcon_irqmclr_wdtmr_f(u32 v)
136{ 136{
137 return (v & 0x1) << 1; 137 return (v & 0x1U) << 1U;
138} 138}
139static inline u32 falcon_falcon_irqmclr_mthd_f(u32 v) 139static inline u32 falcon_falcon_irqmclr_mthd_f(u32 v)
140{ 140{
141 return (v & 0x1) << 2; 141 return (v & 0x1U) << 2U;
142} 142}
143static inline u32 falcon_falcon_irqmclr_ctxsw_f(u32 v) 143static inline u32 falcon_falcon_irqmclr_ctxsw_f(u32 v)
144{ 144{
145 return (v & 0x1) << 3; 145 return (v & 0x1U) << 3U;
146} 146}
147static inline u32 falcon_falcon_irqmclr_halt_f(u32 v) 147static inline u32 falcon_falcon_irqmclr_halt_f(u32 v)
148{ 148{
149 return (v & 0x1) << 4; 149 return (v & 0x1U) << 4U;
150} 150}
151static inline u32 falcon_falcon_irqmclr_exterr_f(u32 v) 151static inline u32 falcon_falcon_irqmclr_exterr_f(u32 v)
152{ 152{
153 return (v & 0x1) << 5; 153 return (v & 0x1U) << 5U;
154} 154}
155static inline u32 falcon_falcon_irqmclr_swgen0_f(u32 v) 155static inline u32 falcon_falcon_irqmclr_swgen0_f(u32 v)
156{ 156{
157 return (v & 0x1) << 6; 157 return (v & 0x1U) << 6U;
158} 158}
159static inline u32 falcon_falcon_irqmclr_swgen1_f(u32 v) 159static inline u32 falcon_falcon_irqmclr_swgen1_f(u32 v)
160{ 160{
161 return (v & 0x1) << 7; 161 return (v & 0x1U) << 7U;
162} 162}
163static inline u32 falcon_falcon_irqmclr_ext_f(u32 v) 163static inline u32 falcon_falcon_irqmclr_ext_f(u32 v)
164{ 164{
165 return (v & 0xff) << 8; 165 return (v & 0xffU) << 8U;
166} 166}
167static inline u32 falcon_falcon_irqmask_r(void) 167static inline u32 falcon_falcon_irqmask_r(void)
168{ 168{
169 return 0x00000018; 169 return 0x00000018U;
170} 170}
171static inline u32 falcon_falcon_irqdest_r(void) 171static inline u32 falcon_falcon_irqdest_r(void)
172{ 172{
173 return 0x0000001c; 173 return 0x0000001cU;
174} 174}
175static inline u32 falcon_falcon_irqdest_host_gptmr_f(u32 v) 175static inline u32 falcon_falcon_irqdest_host_gptmr_f(u32 v)
176{ 176{
177 return (v & 0x1) << 0; 177 return (v & 0x1U) << 0U;
178} 178}
179static inline u32 falcon_falcon_irqdest_host_wdtmr_f(u32 v) 179static inline u32 falcon_falcon_irqdest_host_wdtmr_f(u32 v)
180{ 180{
181 return (v & 0x1) << 1; 181 return (v & 0x1U) << 1U;
182} 182}
183static inline u32 falcon_falcon_irqdest_host_mthd_f(u32 v) 183static inline u32 falcon_falcon_irqdest_host_mthd_f(u32 v)
184{ 184{
185 return (v & 0x1) << 2; 185 return (v & 0x1U) << 2U;
186} 186}
187static inline u32 falcon_falcon_irqdest_host_ctxsw_f(u32 v) 187static inline u32 falcon_falcon_irqdest_host_ctxsw_f(u32 v)
188{ 188{
189 return (v & 0x1) << 3; 189 return (v & 0x1U) << 3U;
190} 190}
191static inline u32 falcon_falcon_irqdest_host_halt_f(u32 v) 191static inline u32 falcon_falcon_irqdest_host_halt_f(u32 v)
192{ 192{
193 return (v & 0x1) << 4; 193 return (v & 0x1U) << 4U;
194} 194}
195static inline u32 falcon_falcon_irqdest_host_exterr_f(u32 v) 195static inline u32 falcon_falcon_irqdest_host_exterr_f(u32 v)
196{ 196{
197 return (v & 0x1) << 5; 197 return (v & 0x1U) << 5U;
198} 198}
199static inline u32 falcon_falcon_irqdest_host_swgen0_f(u32 v) 199static inline u32 falcon_falcon_irqdest_host_swgen0_f(u32 v)
200{ 200{
201 return (v & 0x1) << 6; 201 return (v & 0x1U) << 6U;
202} 202}
203static inline u32 falcon_falcon_irqdest_host_swgen1_f(u32 v) 203static inline u32 falcon_falcon_irqdest_host_swgen1_f(u32 v)
204{ 204{
205 return (v & 0x1) << 7; 205 return (v & 0x1U) << 7U;
206} 206}
207static inline u32 falcon_falcon_irqdest_host_ext_f(u32 v) 207static inline u32 falcon_falcon_irqdest_host_ext_f(u32 v)
208{ 208{
209 return (v & 0xff) << 8; 209 return (v & 0xffU) << 8U;
210} 210}
211static inline u32 falcon_falcon_irqdest_target_gptmr_f(u32 v) 211static inline u32 falcon_falcon_irqdest_target_gptmr_f(u32 v)
212{ 212{
213 return (v & 0x1) << 16; 213 return (v & 0x1U) << 16U;
214} 214}
215static inline u32 falcon_falcon_irqdest_target_wdtmr_f(u32 v) 215static inline u32 falcon_falcon_irqdest_target_wdtmr_f(u32 v)
216{ 216{
217 return (v & 0x1) << 17; 217 return (v & 0x1U) << 17U;
218} 218}
219static inline u32 falcon_falcon_irqdest_target_mthd_f(u32 v) 219static inline u32 falcon_falcon_irqdest_target_mthd_f(u32 v)
220{ 220{
221 return (v & 0x1) << 18; 221 return (v & 0x1U) << 18U;
222} 222}
223static inline u32 falcon_falcon_irqdest_target_ctxsw_f(u32 v) 223static inline u32 falcon_falcon_irqdest_target_ctxsw_f(u32 v)
224{ 224{
225 return (v & 0x1) << 19; 225 return (v & 0x1U) << 19U;
226} 226}
227static inline u32 falcon_falcon_irqdest_target_halt_f(u32 v) 227static inline u32 falcon_falcon_irqdest_target_halt_f(u32 v)
228{ 228{
229 return (v & 0x1) << 20; 229 return (v & 0x1U) << 20U;
230} 230}
231static inline u32 falcon_falcon_irqdest_target_exterr_f(u32 v) 231static inline u32 falcon_falcon_irqdest_target_exterr_f(u32 v)
232{ 232{
233 return (v & 0x1) << 21; 233 return (v & 0x1U) << 21U;
234} 234}
235static inline u32 falcon_falcon_irqdest_target_swgen0_f(u32 v) 235static inline u32 falcon_falcon_irqdest_target_swgen0_f(u32 v)
236{ 236{
237 return (v & 0x1) << 22; 237 return (v & 0x1U) << 22U;
238} 238}
239static inline u32 falcon_falcon_irqdest_target_swgen1_f(u32 v) 239static inline u32 falcon_falcon_irqdest_target_swgen1_f(u32 v)
240{ 240{
241 return (v & 0x1) << 23; 241 return (v & 0x1U) << 23U;
242} 242}
243static inline u32 falcon_falcon_irqdest_target_ext_f(u32 v) 243static inline u32 falcon_falcon_irqdest_target_ext_f(u32 v)
244{ 244{
245 return (v & 0xff) << 24; 245 return (v & 0xffU) << 24U;
246} 246}
247static inline u32 falcon_falcon_curctx_r(void) 247static inline u32 falcon_falcon_curctx_r(void)
248{ 248{
249 return 0x00000050; 249 return 0x00000050U;
250} 250}
251static inline u32 falcon_falcon_nxtctx_r(void) 251static inline u32 falcon_falcon_nxtctx_r(void)
252{ 252{
253 return 0x00000054; 253 return 0x00000054U;
254} 254}
255static inline u32 falcon_falcon_mailbox0_r(void) 255static inline u32 falcon_falcon_mailbox0_r(void)
256{ 256{
257 return 0x00000040; 257 return 0x00000040U;
258} 258}
259static inline u32 falcon_falcon_mailbox1_r(void) 259static inline u32 falcon_falcon_mailbox1_r(void)
260{ 260{
261 return 0x00000044; 261 return 0x00000044U;
262} 262}
263static inline u32 falcon_falcon_itfen_r(void) 263static inline u32 falcon_falcon_itfen_r(void)
264{ 264{
265 return 0x00000048; 265 return 0x00000048U;
266} 266}
267static inline u32 falcon_falcon_itfen_ctxen_enable_f(void) 267static inline u32 falcon_falcon_itfen_ctxen_enable_f(void)
268{ 268{
269 return 0x1; 269 return 0x1U;
270} 270}
271static inline u32 falcon_falcon_idlestate_r(void) 271static inline u32 falcon_falcon_idlestate_r(void)
272{ 272{
273 return 0x0000004c; 273 return 0x0000004cU;
274} 274}
275static inline u32 falcon_falcon_idlestate_falcon_busy_v(u32 r) 275static inline u32 falcon_falcon_idlestate_falcon_busy_v(u32 r)
276{ 276{
277 return (r >> 0) & 0x1; 277 return (r >> 0U) & 0x1U;
278} 278}
279static inline u32 falcon_falcon_idlestate_ext_busy_v(u32 r) 279static inline u32 falcon_falcon_idlestate_ext_busy_v(u32 r)
280{ 280{
281 return (r >> 1) & 0x7fff; 281 return (r >> 1U) & 0x7fffU;
282} 282}
283static inline u32 falcon_falcon_os_r(void) 283static inline u32 falcon_falcon_os_r(void)
284{ 284{
285 return 0x00000080; 285 return 0x00000080U;
286} 286}
287static inline u32 falcon_falcon_engctl_r(void) 287static inline u32 falcon_falcon_engctl_r(void)
288{ 288{
289 return 0x000000a4; 289 return 0x000000a4U;
290} 290}
291static inline u32 falcon_falcon_cpuctl_r(void) 291static inline u32 falcon_falcon_cpuctl_r(void)
292{ 292{
293 return 0x00000100; 293 return 0x00000100U;
294} 294}
295static inline u32 falcon_falcon_cpuctl_startcpu_f(u32 v) 295static inline u32 falcon_falcon_cpuctl_startcpu_f(u32 v)
296{ 296{
297 return (v & 0x1) << 1; 297 return (v & 0x1U) << 1U;
298} 298}
299static inline u32 falcon_falcon_cpuctl_sreset_f(u32 v) 299static inline u32 falcon_falcon_cpuctl_sreset_f(u32 v)
300{ 300{
301 return (v & 0x1) << 2; 301 return (v & 0x1U) << 2U;
302} 302}
303static inline u32 falcon_falcon_cpuctl_hreset_f(u32 v) 303static inline u32 falcon_falcon_cpuctl_hreset_f(u32 v)
304{ 304{
305 return (v & 0x1) << 3; 305 return (v & 0x1U) << 3U;
306} 306}
307static inline u32 falcon_falcon_cpuctl_halt_intr_f(u32 v) 307static inline u32 falcon_falcon_cpuctl_halt_intr_f(u32 v)
308{ 308{
309 return (v & 0x1) << 4; 309 return (v & 0x1U) << 4U;
310} 310}
311static inline u32 falcon_falcon_cpuctl_halt_intr_m(void) 311static inline u32 falcon_falcon_cpuctl_halt_intr_m(void)
312{ 312{
313 return 0x1 << 4; 313 return 0x1U << 4U;
314} 314}
315static inline u32 falcon_falcon_cpuctl_halt_intr_v(u32 r) 315static inline u32 falcon_falcon_cpuctl_halt_intr_v(u32 r)
316{ 316{
317 return (r >> 4) & 0x1; 317 return (r >> 4U) & 0x1U;
318} 318}
319static inline u32 falcon_falcon_cpuctl_stopped_m(void) 319static inline u32 falcon_falcon_cpuctl_stopped_m(void)
320{ 320{
321 return 0x1 << 5; 321 return 0x1U << 5U;
322} 322}
323static inline u32 falcon_falcon_cpuctl_cpuctl_alias_en_f(u32 v) 323static inline u32 falcon_falcon_cpuctl_cpuctl_alias_en_f(u32 v)
324{ 324{
325 return (v & 0x1) << 6; 325 return (v & 0x1U) << 6U;
326} 326}
327static inline u32 falcon_falcon_cpuctl_cpuctl_alias_en_m(void) 327static inline u32 falcon_falcon_cpuctl_cpuctl_alias_en_m(void)
328{ 328{
329 return 0x1 << 6; 329 return 0x1U << 6U;
330} 330}
331static inline u32 falcon_falcon_cpuctl_cpuctl_alias_en_v(u32 r) 331static inline u32 falcon_falcon_cpuctl_cpuctl_alias_en_v(u32 r)
332{ 332{
333 return (r >> 6) & 0x1; 333 return (r >> 6U) & 0x1U;
334} 334}
335static inline u32 falcon_falcon_cpuctl_alias_r(void) 335static inline u32 falcon_falcon_cpuctl_alias_r(void)
336{ 336{
337 return 0x00000130; 337 return 0x00000130U;
338} 338}
339static inline u32 falcon_falcon_cpuctl_alias_startcpu_f(u32 v) 339static inline u32 falcon_falcon_cpuctl_alias_startcpu_f(u32 v)
340{ 340{
341 return (v & 0x1) << 1; 341 return (v & 0x1U) << 1U;
342} 342}
343static inline u32 falcon_falcon_imemc_r(u32 i) 343static inline u32 falcon_falcon_imemc_r(u32 i)
344{ 344{
345 return 0x00000180 + i*16; 345 return 0x00000180U + i*16U;
346} 346}
347static inline u32 falcon_falcon_imemc_offs_f(u32 v) 347static inline u32 falcon_falcon_imemc_offs_f(u32 v)
348{ 348{
349 return (v & 0x3f) << 2; 349 return (v & 0x3fU) << 2U;
350} 350}
351static inline u32 falcon_falcon_imemc_blk_f(u32 v) 351static inline u32 falcon_falcon_imemc_blk_f(u32 v)
352{ 352{
353 return (v & 0xff) << 8; 353 return (v & 0xffU) << 8U;
354} 354}
355static inline u32 falcon_falcon_imemc_aincw_f(u32 v) 355static inline u32 falcon_falcon_imemc_aincw_f(u32 v)
356{ 356{
357 return (v & 0x1) << 24; 357 return (v & 0x1U) << 24U;
358} 358}
359static inline u32 falcon_falcon_imemd_r(u32 i) 359static inline u32 falcon_falcon_imemd_r(u32 i)
360{ 360{
361 return 0x00000184 + i*16; 361 return 0x00000184U + i*16U;
362} 362}
363static inline u32 falcon_falcon_imemt_r(u32 i) 363static inline u32 falcon_falcon_imemt_r(u32 i)
364{ 364{
365 return 0x00000188 + i*16; 365 return 0x00000188U + i*16U;
366} 366}
367static inline u32 falcon_falcon_sctl_r(void) 367static inline u32 falcon_falcon_sctl_r(void)
368{ 368{
369 return 0x00000240; 369 return 0x00000240U;
370} 370}
371static inline u32 falcon_falcon_mmu_phys_sec_r(void) 371static inline u32 falcon_falcon_mmu_phys_sec_r(void)
372{ 372{
373 return 0x00100ce4; 373 return 0x00100ce4U;
374} 374}
375static inline u32 falcon_falcon_bootvec_r(void) 375static inline u32 falcon_falcon_bootvec_r(void)
376{ 376{
377 return 0x00000104; 377 return 0x00000104U;
378} 378}
379static inline u32 falcon_falcon_bootvec_vec_f(u32 v) 379static inline u32 falcon_falcon_bootvec_vec_f(u32 v)
380{ 380{
381 return (v & 0xffffffff) << 0; 381 return (v & 0xffffffffU) << 0U;
382} 382}
383static inline u32 falcon_falcon_dmactl_r(void) 383static inline u32 falcon_falcon_dmactl_r(void)
384{ 384{
385 return 0x0000010c; 385 return 0x0000010cU;
386} 386}
387static inline u32 falcon_falcon_dmactl_dmem_scrubbing_m(void) 387static inline u32 falcon_falcon_dmactl_dmem_scrubbing_m(void)
388{ 388{
389 return 0x1 << 1; 389 return 0x1U << 1U;
390} 390}
391static inline u32 falcon_falcon_dmactl_imem_scrubbing_m(void) 391static inline u32 falcon_falcon_dmactl_imem_scrubbing_m(void)
392{ 392{
393 return 0x1 << 2; 393 return 0x1U << 2U;
394} 394}
395static inline u32 falcon_falcon_dmactl_require_ctx_f(u32 v) 395static inline u32 falcon_falcon_dmactl_require_ctx_f(u32 v)
396{ 396{
397 return (v & 0x1) << 0; 397 return (v & 0x1U) << 0U;
398} 398}
399static inline u32 falcon_falcon_hwcfg_r(void) 399static inline u32 falcon_falcon_hwcfg_r(void)
400{ 400{
401 return 0x00000108; 401 return 0x00000108U;
402} 402}
403static inline u32 falcon_falcon_hwcfg_imem_size_v(u32 r) 403static inline u32 falcon_falcon_hwcfg_imem_size_v(u32 r)
404{ 404{
405 return (r >> 0) & 0x1ff; 405 return (r >> 0U) & 0x1ffU;
406} 406}
407static inline u32 falcon_falcon_hwcfg_dmem_size_v(u32 r) 407static inline u32 falcon_falcon_hwcfg_dmem_size_v(u32 r)
408{ 408{
409 return (r >> 9) & 0x1ff; 409 return (r >> 9U) & 0x1ffU;
410} 410}
411static inline u32 falcon_falcon_dmatrfbase_r(void) 411static inline u32 falcon_falcon_dmatrfbase_r(void)
412{ 412{
413 return 0x00000110; 413 return 0x00000110U;
414} 414}
415static inline u32 falcon_falcon_dmatrfbase1_r(void) 415static inline u32 falcon_falcon_dmatrfbase1_r(void)
416{ 416{
417 return 0x00000128; 417 return 0x00000128U;
418} 418}
419static inline u32 falcon_falcon_dmatrfmoffs_r(void) 419static inline u32 falcon_falcon_dmatrfmoffs_r(void)
420{ 420{
421 return 0x00000114; 421 return 0x00000114U;
422} 422}
423static inline u32 falcon_falcon_imctl_debug_r(void) 423static inline u32 falcon_falcon_imctl_debug_r(void)
424{ 424{
425 return 0x0000015c; 425 return 0x0000015cU;
426} 426}
427static inline u32 falcon_falcon_imctl_debug_addr_blk_f(u32 v) 427static inline u32 falcon_falcon_imctl_debug_addr_blk_f(u32 v)
428{ 428{
429 return (v & 0xffffff) << 0; 429 return (v & 0xffffffU) << 0U;
430} 430}
431static inline u32 falcon_falcon_imctl_debug_cmd_f(u32 v) 431static inline u32 falcon_falcon_imctl_debug_cmd_f(u32 v)
432{ 432{
433 return (v & 0x7) << 24; 433 return (v & 0x7U) << 24U;
434} 434}
435static inline u32 falcon_falcon_imstat_r(void) 435static inline u32 falcon_falcon_imstat_r(void)
436{ 436{
437 return 0x00000144; 437 return 0x00000144U;
438} 438}
439static inline u32 falcon_falcon_traceidx_r(void) 439static inline u32 falcon_falcon_traceidx_r(void)
440{ 440{
441 return 0x00000148; 441 return 0x00000148U;
442} 442}
443static inline u32 falcon_falcon_traceidx_maxidx_v(u32 r) 443static inline u32 falcon_falcon_traceidx_maxidx_v(u32 r)
444{ 444{
445 return (r >> 16) & 0xff; 445 return (r >> 16U) & 0xffU;
446} 446}
447static inline u32 falcon_falcon_traceidx_idx_f(u32 v) 447static inline u32 falcon_falcon_traceidx_idx_f(u32 v)
448{ 448{
449 return (v & 0xff) << 0; 449 return (v & 0xffU) << 0U;
450} 450}
451static inline u32 falcon_falcon_tracepc_r(void) 451static inline u32 falcon_falcon_tracepc_r(void)
452{ 452{
453 return 0x0000014c; 453 return 0x0000014cU;
454} 454}
455static inline u32 falcon_falcon_tracepc_pc_v(u32 r) 455static inline u32 falcon_falcon_tracepc_pc_v(u32 r)
456{ 456{
457 return (r >> 0) & 0xffffff; 457 return (r >> 0U) & 0xffffffU;
458} 458}
459static inline u32 falcon_falcon_dmatrfcmd_r(void) 459static inline u32 falcon_falcon_dmatrfcmd_r(void)
460{ 460{
461 return 0x00000118; 461 return 0x00000118U;
462} 462}
463static inline u32 falcon_falcon_dmatrfcmd_imem_f(u32 v) 463static inline u32 falcon_falcon_dmatrfcmd_imem_f(u32 v)
464{ 464{
465 return (v & 0x1) << 4; 465 return (v & 0x1U) << 4U;
466} 466}
467static inline u32 falcon_falcon_dmatrfcmd_write_f(u32 v) 467static inline u32 falcon_falcon_dmatrfcmd_write_f(u32 v)
468{ 468{
469 return (v & 0x1) << 5; 469 return (v & 0x1U) << 5U;
470} 470}
471static inline u32 falcon_falcon_dmatrfcmd_size_f(u32 v) 471static inline u32 falcon_falcon_dmatrfcmd_size_f(u32 v)
472{ 472{
473 return (v & 0x7) << 8; 473 return (v & 0x7U) << 8U;
474} 474}
475static inline u32 falcon_falcon_dmatrfcmd_ctxdma_f(u32 v) 475static inline u32 falcon_falcon_dmatrfcmd_ctxdma_f(u32 v)
476{ 476{
477 return (v & 0x7) << 12; 477 return (v & 0x7U) << 12U;
478} 478}
479static inline u32 falcon_falcon_dmatrffboffs_r(void) 479static inline u32 falcon_falcon_dmatrffboffs_r(void)
480{ 480{
481 return 0x0000011c; 481 return 0x0000011cU;
482} 482}
483static inline u32 falcon_falcon_exterraddr_r(void) 483static inline u32 falcon_falcon_exterraddr_r(void)
484{ 484{
485 return 0x00000168; 485 return 0x00000168U;
486} 486}
487static inline u32 falcon_falcon_exterrstat_r(void) 487static inline u32 falcon_falcon_exterrstat_r(void)
488{ 488{
489 return 0x0000016c; 489 return 0x0000016cU;
490} 490}
491static inline u32 falcon_falcon_exterrstat_valid_m(void) 491static inline u32 falcon_falcon_exterrstat_valid_m(void)
492{ 492{
493 return 0x1 << 31; 493 return 0x1U << 31U;
494} 494}
495static inline u32 falcon_falcon_exterrstat_valid_v(u32 r) 495static inline u32 falcon_falcon_exterrstat_valid_v(u32 r)
496{ 496{
497 return (r >> 31) & 0x1; 497 return (r >> 31U) & 0x1U;
498} 498}
499static inline u32 falcon_falcon_exterrstat_valid_true_v(void) 499static inline u32 falcon_falcon_exterrstat_valid_true_v(void)
500{ 500{
501 return 0x00000001; 501 return 0x00000001U;
502} 502}
503static inline u32 falcon_falcon_icd_cmd_r(void) 503static inline u32 falcon_falcon_icd_cmd_r(void)
504{ 504{
505 return 0x00000200; 505 return 0x00000200U;
506} 506}
507static inline u32 falcon_falcon_icd_cmd_opc_s(void) 507static inline u32 falcon_falcon_icd_cmd_opc_s(void)
508{ 508{
509 return 4; 509 return 4U;
510} 510}
511static inline u32 falcon_falcon_icd_cmd_opc_f(u32 v) 511static inline u32 falcon_falcon_icd_cmd_opc_f(u32 v)
512{ 512{
513 return (v & 0xf) << 0; 513 return (v & 0xfU) << 0U;
514} 514}
515static inline u32 falcon_falcon_icd_cmd_opc_m(void) 515static inline u32 falcon_falcon_icd_cmd_opc_m(void)
516{ 516{
517 return 0xf << 0; 517 return 0xfU << 0U;
518} 518}
519static inline u32 falcon_falcon_icd_cmd_opc_v(u32 r) 519static inline u32 falcon_falcon_icd_cmd_opc_v(u32 r)
520{ 520{
521 return (r >> 0) & 0xf; 521 return (r >> 0U) & 0xfU;
522} 522}
523static inline u32 falcon_falcon_icd_cmd_opc_rreg_f(void) 523static inline u32 falcon_falcon_icd_cmd_opc_rreg_f(void)
524{ 524{
525 return 0x8; 525 return 0x8U;
526} 526}
527static inline u32 falcon_falcon_icd_cmd_opc_rstat_f(void) 527static inline u32 falcon_falcon_icd_cmd_opc_rstat_f(void)
528{ 528{
529 return 0xe; 529 return 0xeU;
530} 530}
531static inline u32 falcon_falcon_icd_cmd_idx_f(u32 v) 531static inline u32 falcon_falcon_icd_cmd_idx_f(u32 v)
532{ 532{
533 return (v & 0x1f) << 8; 533 return (v & 0x1fU) << 8U;
534} 534}
535static inline u32 falcon_falcon_icd_rdata_r(void) 535static inline u32 falcon_falcon_icd_rdata_r(void)
536{ 536{
537 return 0x0000020c; 537 return 0x0000020cU;
538} 538}
539static inline u32 falcon_falcon_dmemc_r(u32 i) 539static inline u32 falcon_falcon_dmemc_r(u32 i)
540{ 540{
541 return 0x000001c0 + i*8; 541 return 0x000001c0U + i*8U;
542} 542}
543static inline u32 falcon_falcon_dmemc_offs_f(u32 v) 543static inline u32 falcon_falcon_dmemc_offs_f(u32 v)
544{ 544{
545 return (v & 0x3f) << 2; 545 return (v & 0x3fU) << 2U;
546} 546}
547static inline u32 falcon_falcon_dmemc_offs_m(void) 547static inline u32 falcon_falcon_dmemc_offs_m(void)
548{ 548{
549 return 0x3f << 2; 549 return 0x3fU << 2U;
550} 550}
551static inline u32 falcon_falcon_dmemc_blk_f(u32 v) 551static inline u32 falcon_falcon_dmemc_blk_f(u32 v)
552{ 552{
553 return (v & 0xff) << 8; 553 return (v & 0xffU) << 8U;
554} 554}
555static inline u32 falcon_falcon_dmemc_blk_m(void) 555static inline u32 falcon_falcon_dmemc_blk_m(void)
556{ 556{
557 return 0xff << 8; 557 return 0xffU << 8U;
558} 558}
559static inline u32 falcon_falcon_dmemc_aincw_f(u32 v) 559static inline u32 falcon_falcon_dmemc_aincw_f(u32 v)
560{ 560{
561 return (v & 0x1) << 24; 561 return (v & 0x1U) << 24U;
562} 562}
563static inline u32 falcon_falcon_dmemc_aincr_f(u32 v) 563static inline u32 falcon_falcon_dmemc_aincr_f(u32 v)
564{ 564{
565 return (v & 0x1) << 25; 565 return (v & 0x1U) << 25U;
566} 566}
567static inline u32 falcon_falcon_dmemd_r(u32 i) 567static inline u32 falcon_falcon_dmemd_r(u32 i)
568{ 568{
569 return 0x000001c4 + i*8; 569 return 0x000001c4U + i*8U;
570} 570}
571static inline u32 falcon_falcon_debug1_r(void) 571static inline u32 falcon_falcon_debug1_r(void)
572{ 572{
573 return 0x00000090; 573 return 0x00000090U;
574} 574}
575static inline u32 falcon_falcon_debug1_ctxsw_mode_s(void) 575static inline u32 falcon_falcon_debug1_ctxsw_mode_s(void)
576{ 576{
577 return 1; 577 return 1U;
578} 578}
579static inline u32 falcon_falcon_debug1_ctxsw_mode_f(u32 v) 579static inline u32 falcon_falcon_debug1_ctxsw_mode_f(u32 v)
580{ 580{
581 return (v & 0x1) << 16; 581 return (v & 0x1U) << 16U;
582} 582}
583static inline u32 falcon_falcon_debug1_ctxsw_mode_m(void) 583static inline u32 falcon_falcon_debug1_ctxsw_mode_m(void)
584{ 584{
585 return 0x1 << 16; 585 return 0x1U << 16U;
586} 586}
587static inline u32 falcon_falcon_debug1_ctxsw_mode_v(u32 r) 587static inline u32 falcon_falcon_debug1_ctxsw_mode_v(u32 r)
588{ 588{
589 return (r >> 16) & 0x1; 589 return (r >> 16U) & 0x1U;
590} 590}
591static inline u32 falcon_falcon_debug1_ctxsw_mode_init_f(void) 591static inline u32 falcon_falcon_debug1_ctxsw_mode_init_f(void)
592{ 592{
593 return 0x0; 593 return 0x0U;
594} 594}
595static inline u32 falcon_falcon_debuginfo_r(void) 595static inline u32 falcon_falcon_debuginfo_r(void)
596{ 596{
597 return 0x00000094; 597 return 0x00000094U;
598} 598}
599#endif 599#endif