gpu: nvgpu: add support for therm gate ctrl

During gpu init, therm gate control is required to
add delay cycles before clock gating.

Bug 1717152

Change-Id: Ifabc428cf7b49e49964dc994eba2c38af4aa1a91
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/936443
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

4 files changed, 24 insertions, 3 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index a58a1eed..b02d6111 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -414,6 +414,7 @@ struct gpu_ops {
         } mm;
         struct {
                 int (*init_therm_setup_hw)(struct gk20a *g);
+                int (*update_therm_gate_ctrl)(struct gk20a *g);
         } therm;
         struct {
                 int (*prepare_ucode)(struct gk20a *g);
diff --git a/drivers/gpu/nvgpu/gk20a/hw_therm_gk20a.h b/drivers/gpu/nvgpu/gk20a/hw_therm_gk20a.h
index d4c04116..3f3052ab 100644
--- a/drivers/gpu/nvgpu/gk20a/hw_therm_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/hw_therm_gk20a.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2012-2015, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2012-2016, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -198,6 +198,14 @@ static inline u32 therm_gate_ctrl_eng_idle_filt_mant_m(void)
 {
         return 0x7 << 13;
 }
+static inline u32 therm_gate_ctrl_eng_delay_before_f(u32 v)
+{
+        return (v & 0xf) << 16;
+}
+static inline u32 therm_gate_ctrl_eng_delay_before_m(void)
+{
+        return 0xf << 16;
+}
 static inline u32 therm_gate_ctrl_eng_delay_after_f(u32 v)
 {
         return (v & 0xf) << 20;
diff --git a/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c b/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c
index b35403a7..cad74359 100644
--- a/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c
@@ -1,7 +1,7 @@
 /*
  * GK20A priv ring
  *
- * Copyright (c) 2011-2014, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2011-2016, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -39,6 +39,10 @@ void gk20a_reset_priv_ring(struct gk20a *g)
                         0x2);
 
         gk20a_readl(g, pri_ringstation_sys_decode_config_r());
+
+        if (g->ops.therm.update_therm_gate_ctrl)
+                g->ops.therm.update_therm_gate_ctrl(g);
+
 }
 
 void gk20a_priv_ring_isr(struct gk20a *g)
diff --git a/drivers/gpu/nvgpu/gm20b/hw_therm_gm20b.h b/drivers/gpu/nvgpu/gm20b/hw_therm_gm20b.h
index a0d8ffc9..e8a5b6a5 100644
--- a/drivers/gpu/nvgpu/gm20b/hw_therm_gm20b.h
+++ b/drivers/gpu/nvgpu/gm20b/hw_therm_gm20b.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2014-2015, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2014-2016, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -186,6 +186,14 @@ static inline u32 therm_gate_ctrl_eng_idle_filt_mant_m(void)
 {
         return 0x7 << 13;
 }
+static inline u32 therm_gate_ctrl_eng_delay_before_f(u32 v)
+{
+        return (v & 0xf) << 16;
+}
+static inline u32 therm_gate_ctrl_eng_delay_before_m(void)
+{
+        return 0xf << 16;
+}
 static inline u32 therm_gate_ctrl_eng_delay_after_f(u32 v)
 {
         return (v & 0xf) << 20;