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authorDeepak Nibade <dnibade@nvidia.com>2015-01-28 08:07:00 -0500
committerDan Willemsen <dwillemsen@nvidia.com>2015-04-04 21:07:03 -0400
commitbc1b5fdd56fff2a64a78b4a190897e34f9f08845 (patch)
treef37841e278840df2c71126a4e0eddd68d69c3aa0 /drivers
parentaa96b6bd1efa1e26a757080137486884972d248c (diff)
gpu: nvgpu: APIs to dump GR status
Add below APIs to dump various GR status registers 1. debugfs : /d/gpu.0/gr_status Read this debugfs at runtime to get status registers 2. API gk20a_gr_debug_dump() Add this API in code to dump registers at any point Bug 200062436 Change-Id: Ic1115b5a2fc16362954b5ed8a9e70afb872a8d91 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/486465 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/nvgpu/gk20a/debug_gk20a.c60
-rw-r--r--drivers/gpu/nvgpu/gk20a/debug_gk20a.h4
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.h2
-rw-r--r--drivers/gpu/nvgpu/gk20a/gr_gk20a.c106
-rw-r--r--drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h152
-rw-r--r--drivers/gpu/nvgpu/gm20b/gr_gm20b.c124
-rw-r--r--drivers/gpu/nvgpu/gm20b/hw_gr_gm20b.h164
7 files changed, 611 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/debug_gk20a.c b/drivers/gpu/nvgpu/gk20a/debug_gk20a.c
index 1351304d..9dfab370 100644
--- a/drivers/gpu/nvgpu/gk20a/debug_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/debug_gk20a.c
@@ -83,7 +83,7 @@ static inline void gk20a_debug_write_to_seqfile(void *ctx, const char *str,
83 seq_write((struct seq_file *)ctx, str, len); 83 seq_write((struct seq_file *)ctx, str, len);
84} 84}
85 85
86static void gk20a_debug_output(struct gk20a_debug_output *o, 86void gk20a_debug_output(struct gk20a_debug_output *o,
87 const char *fmt, ...) 87 const char *fmt, ...)
88{ 88{
89 va_list args; 89 va_list args;
@@ -223,6 +223,50 @@ void gk20a_debug_show_dump(struct gk20a *g, struct gk20a_debug_output *o)
223 gk20a_idle(g->dev); 223 gk20a_idle(g->dev);
224} 224}
225 225
226static int gk20a_gr_dump_regs(struct platform_device *pdev,
227 struct gk20a_debug_output *o)
228{
229 struct gk20a_platform *platform = gk20a_get_platform(pdev);
230 struct gk20a *g = platform->g;
231 int err;
232
233 err = gk20a_busy(g->dev);
234 if (err) {
235 gk20a_err(&pdev->dev, "failed to power on gpu: %d\n", err);
236 return -EINVAL;
237 }
238
239 gr_gk20a_elpg_protected_call(g, g->ops.gr.dump_gr_regs(g, o));
240
241 gk20a_idle(g->dev);
242
243 return 0;
244}
245
246int gk20a_gr_debug_dump(struct platform_device *pdev)
247{
248 struct gk20a_debug_output o = {
249 .fn = gk20a_debug_write_printk
250 };
251
252 gk20a_gr_dump_regs(pdev, &o);
253
254 return 0;
255}
256
257static int gk20a_gr_debug_show(struct seq_file *s, void *unused)
258{
259 struct platform_device *pdev = s->private;
260 struct gk20a_debug_output o = {
261 .fn = gk20a_debug_write_to_seqfile,
262 .ctx = s,
263 };
264
265 gk20a_gr_dump_regs(pdev, &o);
266
267 return 0;
268}
269
226void gk20a_debug_dump(struct platform_device *pdev) 270void gk20a_debug_dump(struct platform_device *pdev)
227{ 271{
228 struct gk20a_platform *platform = gk20a_get_platform(pdev); 272 struct gk20a_platform *platform = gk20a_get_platform(pdev);
@@ -277,11 +321,23 @@ static int gk20a_debug_show(struct seq_file *s, void *unused)
277 return 0; 321 return 0;
278} 322}
279 323
324static int gk20a_gr_debug_open(struct inode *inode, struct file *file)
325{
326 return single_open(file, gk20a_gr_debug_show, inode->i_private);
327}
328
280static int gk20a_debug_open(struct inode *inode, struct file *file) 329static int gk20a_debug_open(struct inode *inode, struct file *file)
281{ 330{
282 return single_open(file, gk20a_debug_show, inode->i_private); 331 return single_open(file, gk20a_debug_show, inode->i_private);
283} 332}
284 333
334static const struct file_operations gk20a_gr_debug_fops = {
335 .open = gk20a_gr_debug_open,
336 .read = seq_read,
337 .llseek = seq_lseek,
338 .release = single_release,
339};
340
285static const struct file_operations gk20a_debug_fops = { 341static const struct file_operations gk20a_debug_fops = {
286 .open = gk20a_debug_open, 342 .open = gk20a_debug_open,
287 .read = seq_read, 343 .read = seq_read,
@@ -306,6 +362,8 @@ void gk20a_debug_init(struct platform_device *pdev)
306 362
307 debugfs_create_file("status", S_IRUGO, platform->debugfs, 363 debugfs_create_file("status", S_IRUGO, platform->debugfs,
308 pdev, &gk20a_debug_fops); 364 pdev, &gk20a_debug_fops);
365 debugfs_create_file("gr_status", S_IRUGO, platform->debugfs,
366 pdev, &gk20a_gr_debug_fops);
309 debugfs_create_u32("trace_cmdbuf", S_IRUGO|S_IWUSR, platform->debugfs, 367 debugfs_create_u32("trace_cmdbuf", S_IRUGO|S_IWUSR, platform->debugfs,
310 &gk20a_debug_trace_cmdbuf); 368 &gk20a_debug_trace_cmdbuf);
311 369
diff --git a/drivers/gpu/nvgpu/gk20a/debug_gk20a.h b/drivers/gpu/nvgpu/gk20a/debug_gk20a.h
index 30c87f35..620688cb 100644
--- a/drivers/gpu/nvgpu/gk20a/debug_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/debug_gk20a.h
@@ -29,8 +29,12 @@ struct gk20a_debug_output {
29 char buf[256]; 29 char buf[256];
30}; 30};
31 31
32void gk20a_debug_output(struct gk20a_debug_output *o,
33 const char *fmt, ...);
34
32void gk20a_debug_dump(struct platform_device *pdev); 35void gk20a_debug_dump(struct platform_device *pdev);
33void gk20a_debug_show_dump(struct gk20a *g, struct gk20a_debug_output *o); 36void gk20a_debug_show_dump(struct gk20a *g, struct gk20a_debug_output *o);
37int gk20a_gr_debug_dump(struct platform_device *pdev);
34void gk20a_debug_init(struct platform_device *pdev); 38void gk20a_debug_init(struct platform_device *pdev);
35void gk20a_init_debug_ops(struct gpu_ops *gops); 39void gk20a_init_debug_ops(struct gpu_ops *gops);
36 40
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 4fbc25be..0e06e7de 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -159,6 +159,8 @@ struct gpu_ops {
159 void (*update_ctxsw_preemption_mode)(struct gk20a *g, 159 void (*update_ctxsw_preemption_mode)(struct gk20a *g,
160 struct channel_ctx_gk20a *ch_ctx, 160 struct channel_ctx_gk20a *ch_ctx,
161 void *ctx_ptr); 161 void *ctx_ptr);
162 int (*dump_gr_regs)(struct gk20a *g,
163 struct gk20a_debug_output *o);
162 } gr; 164 } gr;
163 const char *name; 165 const char *name;
164 struct { 166 struct {
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index c6f4a336..cffc48f5 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -52,6 +52,7 @@
52#include "gr_pri_gk20a.h" 52#include "gr_pri_gk20a.h"
53#include "regops_gk20a.h" 53#include "regops_gk20a.h"
54#include "dbg_gpu_gk20a.h" 54#include "dbg_gpu_gk20a.h"
55#include "debug_gk20a.h"
55#include "semaphore_gk20a.h" 56#include "semaphore_gk20a.h"
56 57
57#define BLK_SIZE (256) 58#define BLK_SIZE (256)
@@ -7322,6 +7323,110 @@ static u32 gr_gk20a_pagepool_default_size(struct gk20a *g)
7322 return gr_scc_pagepool_total_pages_hwmax_value_v(); 7323 return gr_scc_pagepool_total_pages_hwmax_value_v();
7323} 7324}
7324 7325
7326static int gr_gk20a_dump_gr_status_regs(struct gk20a *g,
7327 struct gk20a_debug_output *o)
7328{
7329 gk20a_debug_output(o, "NV_PGRAPH_STATUS: 0x%x\n",
7330 gk20a_readl(g, gr_status_r()));
7331 gk20a_debug_output(o, "NV_PGRAPH_STATUS1: 0x%x\n",
7332 gk20a_readl(g, gr_status_1_r()));
7333 gk20a_debug_output(o, "NV_PGRAPH_STATUS2: 0x%x\n",
7334 gk20a_readl(g, gr_status_2_r()));
7335 gk20a_debug_output(o, "NV_PGRAPH_ENGINE_STATUS: 0x%x\n",
7336 gk20a_readl(g, gr_engine_status_r()));
7337 gk20a_debug_output(o, "NV_PGRAPH_GRFIFO_STATUS : 0x%x\n",
7338 gk20a_readl(g, gr_gpfifo_status_r()));
7339 gk20a_debug_output(o, "NV_PGRAPH_GRFIFO_CONTROL : 0x%x\n",
7340 gk20a_readl(g, gr_gpfifo_ctl_r()));
7341 gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_HOST_INT_STATUS : 0x%x\n",
7342 gk20a_readl(g, gr_fecs_host_int_status_r()));
7343 gk20a_debug_output(o, "NV_PGRAPH_EXCEPTION : 0x%x\n",
7344 gk20a_readl(g, gr_exception_r()));
7345 gk20a_debug_output(o, "NV_PGRAPH_FECS_INTR : 0x%x\n",
7346 gk20a_readl(g, gr_fecs_intr_r()));
7347 gk20a_debug_output(o, "NV_PFIFO_ENGINE_STATUS(GR) : 0x%x\n",
7348 gk20a_readl(g, fifo_engine_status_r(ENGINE_GR_GK20A)));
7349 gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY0: 0x%x\n",
7350 gk20a_readl(g, gr_activity_0_r()));
7351 gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY1: 0x%x\n",
7352 gk20a_readl(g, gr_activity_1_r()));
7353 gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY2: 0x%x\n",
7354 gk20a_readl(g, gr_activity_2_r()));
7355 gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY4: 0x%x\n",
7356 gk20a_readl(g, gr_activity_4_r()));
7357 gk20a_debug_output(o, "NV_PGRAPH_PRI_SKED_ACTIVITY: 0x%x\n",
7358 gk20a_readl(g, gr_pri_sked_activity_r()));
7359 gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY0: 0x%x\n",
7360 gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity0_r()));
7361 gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY1: 0x%x\n",
7362 gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity1_r()));
7363 gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY2: 0x%x\n",
7364 gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity2_r()));
7365 gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY3: 0x%x\n",
7366 gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity3_r()));
7367 gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_ACTIVITY0: 0x%x\n",
7368 gk20a_readl(g, gr_pri_gpc0_tpc0_tpccs_tpc_activity_0_r()));
7369 gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPCS_TPCCS_TPC_ACTIVITY0: 0x%x\n",
7370 gk20a_readl(g, gr_pri_gpc0_tpcs_tpccs_tpc_activity_0_r()));
7371 gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY0: 0x%x\n",
7372 gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_0_r()));
7373 gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY1: 0x%x\n",
7374 gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_1_r()));
7375 gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY2: 0x%x\n",
7376 gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_2_r()));
7377 gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY3: 0x%x\n",
7378 gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_3_r()));
7379 gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_TPC0_TPCCS_TPC_ACTIVITY0: 0x%x\n",
7380 gk20a_readl(g, gr_pri_gpcs_tpc0_tpccs_tpc_activity_0_r()));
7381 gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_TPCS_TPCCS_TPC_ACTIVITY0: 0x%x\n",
7382 gk20a_readl(g, gr_pri_gpcs_tpcs_tpccs_tpc_activity_0_r()));
7383 gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_BECS_BE_ACTIVITY0: 0x%x\n",
7384 gk20a_readl(g, gr_pri_be0_becs_be_activity0_r()));
7385 gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_BECS_BE_ACTIVITY0: 0x%x\n",
7386 gk20a_readl(g, gr_pri_bes_becs_be_activity0_r()));
7387 gk20a_debug_output(o, "NV_PGRAPH_PRI_DS_MPIPE_STATUS: 0x%x\n",
7388 gk20a_readl(g, gr_pri_ds_mpipe_status_r()));
7389 gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_GO_IDLE_ON_STATUS: 0x%x\n",
7390 gk20a_readl(g, gr_pri_fe_go_idle_on_status_r()));
7391 gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_GO_IDLE_TIMEOUT : 0x%x\n",
7392 gk20a_readl(g, gr_fe_go_idle_timeout_r()));
7393 gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_GO_IDLE_CHECK : 0x%x\n",
7394 gk20a_readl(g, gr_pri_fe_go_idle_check_r()));
7395 gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_GO_IDLE_INFO : 0x%x\n",
7396 gk20a_readl(g, gr_pri_fe_go_idle_info_r()));
7397 gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPC0_TEX_M_TEX_SUBUNITS_STATUS: 0x%x\n",
7398 gk20a_readl(g, gr_pri_gpc0_tpc0_tex_m_tex_subunits_status_r()));
7399 gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CTXSW_STATUS_FE_0: 0x%x\n",
7400 gk20a_readl(g, gr_fecs_ctxsw_status_fe_0_r()));
7401 gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CTXSW_STATUS_1: 0x%x\n",
7402 gk20a_readl(g, gr_fecs_ctxsw_status_1_r()));
7403 gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_GPC_0: 0x%x\n",
7404 gk20a_readl(g, gr_gpc0_gpccs_ctxsw_status_gpc_0_r()));
7405 gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_1: 0x%x\n",
7406 gk20a_readl(g, gr_gpc0_gpccs_ctxsw_status_1_r()));
7407 gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CTXSW_IDLESTATE : 0x%x\n",
7408 gk20a_readl(g, gr_fecs_ctxsw_idlestate_r()));
7409 gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_IDLESTATE : 0x%x\n",
7410 gk20a_readl(g, gr_gpc0_gpccs_ctxsw_idlestate_r()));
7411 gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CURRENT_CTX : 0x%x\n",
7412 gk20a_readl(g, gr_fecs_current_ctx_r()));
7413 gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_NEW_CTX : 0x%x\n",
7414 gk20a_readl(g, gr_fecs_new_ctx_r()));
7415 gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_CROP_STATUS1 : 0x%x\n",
7416 gk20a_readl(g, gr_pri_be0_crop_status1_r()));
7417 gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_CROP_STATUS1 : 0x%x\n",
7418 gk20a_readl(g, gr_pri_bes_crop_status1_r()));
7419 gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_ZROP_STATUS : 0x%x\n",
7420 gk20a_readl(g, gr_pri_be0_zrop_status_r()));
7421 gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_ZROP_STATUS2 : 0x%x\n",
7422 gk20a_readl(g, gr_pri_be0_zrop_status2_r()));
7423 gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_ZROP_STATUS : 0x%x\n",
7424 gk20a_readl(g, gr_pri_bes_zrop_status_r()));
7425 gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_ZROP_STATUS2 : 0x%x\n",
7426 gk20a_readl(g, gr_pri_bes_zrop_status2_r()));
7427 return 0;
7428}
7429
7325void gk20a_init_gr_ops(struct gpu_ops *gops) 7430void gk20a_init_gr_ops(struct gpu_ops *gops)
7326{ 7431{
7327 gops->gr.access_smpc_reg = gr_gk20a_access_smpc_reg; 7432 gops->gr.access_smpc_reg = gr_gk20a_access_smpc_reg;
@@ -7362,5 +7467,6 @@ void gk20a_init_gr_ops(struct gpu_ops *gops)
7362 gops->gr.init_ctx_state = gr_gk20a_init_ctx_state; 7467 gops->gr.init_ctx_state = gr_gk20a_init_ctx_state;
7363 gops->gr.alloc_gr_ctx = gr_gk20a_alloc_gr_ctx; 7468 gops->gr.alloc_gr_ctx = gr_gk20a_alloc_gr_ctx;
7364 gops->gr.free_gr_ctx = gr_gk20a_free_gr_ctx; 7469 gops->gr.free_gr_ctx = gr_gk20a_free_gr_ctx;
7470 gops->gr.dump_gr_regs = gr_gk20a_dump_gr_status_regs;
7365} 7471}
7366 7472
diff --git a/drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h
index 7bd4ab79..d3345a51 100644
--- a/drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h
@@ -234,6 +234,10 @@ static inline u32 gr_gpfifo_ctl_semaphore_access_enabled_f(void)
234{ 234{
235 return 0x10000; 235 return 0x10000;
236} 236}
237static inline u32 gr_gpfifo_status_r(void)
238{
239 return 0x00400504;
240}
237static inline u32 gr_trapped_addr_r(void) 241static inline u32 gr_trapped_addr_r(void)
238{ 242{
239 return 0x00400704; 243 return 0x00400704;
@@ -278,6 +282,14 @@ static inline u32 gr_status_mask_r(void)
278{ 282{
279 return 0x00400610; 283 return 0x00400610;
280} 284}
285static inline u32 gr_status_1_r(void)
286{
287 return 0x00400604;
288}
289static inline u32 gr_status_2_r(void)
290{
291 return 0x00400608;
292}
281static inline u32 gr_engine_status_r(void) 293static inline u32 gr_engine_status_r(void)
282{ 294{
283 return 0x0040060c; 295 return 0x0040060c;
@@ -286,6 +298,126 @@ static inline u32 gr_engine_status_value_busy_f(void)
286{ 298{
287 return 0x1; 299 return 0x1;
288} 300}
301static inline u32 gr_activity_0_r(void)
302{
303 return 0x00400380;
304}
305static inline u32 gr_activity_1_r(void)
306{
307 return 0x00400384;
308}
309static inline u32 gr_activity_2_r(void)
310{
311 return 0x00400388;
312}
313static inline u32 gr_activity_4_r(void)
314{
315 return 0x00400390;
316}
317static inline u32 gr_pri_sked_activity_r(void)
318{
319 return 0x00407054;
320}
321static inline u32 gr_pri_gpc0_gpccs_gpc_activity0_r(void)
322{
323 return 0x00502c80;
324}
325static inline u32 gr_pri_gpc0_gpccs_gpc_activity1_r(void)
326{
327 return 0x00502c84;
328}
329static inline u32 gr_pri_gpc0_gpccs_gpc_activity2_r(void)
330{
331 return 0x00502c88;
332}
333static inline u32 gr_pri_gpc0_gpccs_gpc_activity3_r(void)
334{
335 return 0x00502c8c;
336}
337static inline u32 gr_pri_gpc0_tpc0_tpccs_tpc_activity_0_r(void)
338{
339 return 0x00504500;
340}
341static inline u32 gr_pri_gpc0_tpcs_tpccs_tpc_activity_0_r(void)
342{
343 return 0x00501d00;
344}
345static inline u32 gr_pri_gpcs_gpccs_gpc_activity_0_r(void)
346{
347 return 0x0041ac80;
348}
349static inline u32 gr_pri_gpcs_gpccs_gpc_activity_1_r(void)
350{
351 return 0x0041ac84;
352}
353static inline u32 gr_pri_gpcs_gpccs_gpc_activity_2_r(void)
354{
355 return 0x0041ac88;
356}
357static inline u32 gr_pri_gpcs_gpccs_gpc_activity_3_r(void)
358{
359 return 0x0041ac8c;
360}
361static inline u32 gr_pri_gpcs_tpc0_tpccs_tpc_activity_0_r(void)
362{
363 return 0x0041c500;
364}
365static inline u32 gr_pri_gpcs_tpcs_tpccs_tpc_activity_0_r(void)
366{
367 return 0x00419d00;
368}
369static inline u32 gr_pri_be0_becs_be_activity0_r(void)
370{
371 return 0x00410200;
372}
373static inline u32 gr_pri_bes_becs_be_activity0_r(void)
374{
375 return 0x00408a00;
376}
377static inline u32 gr_pri_ds_mpipe_status_r(void)
378{
379 return 0x00405858;
380}
381static inline u32 gr_pri_fe_go_idle_on_status_r(void)
382{
383 return 0x00404150;
384}
385static inline u32 gr_pri_fe_go_idle_check_r(void)
386{
387 return 0x00404158;
388}
389static inline u32 gr_pri_fe_go_idle_info_r(void)
390{
391 return 0x00404194;
392}
393static inline u32 gr_pri_gpc0_tpc0_tex_m_tex_subunits_status_r(void)
394{
395 return 0x00504238;
396}
397static inline u32 gr_pri_be0_crop_status1_r(void)
398{
399 return 0x00410134;
400}
401static inline u32 gr_pri_bes_crop_status1_r(void)
402{
403 return 0x00408934;
404}
405static inline u32 gr_pri_be0_zrop_status_r(void)
406{
407 return 0x00410048;
408}
409static inline u32 gr_pri_be0_zrop_status2_r(void)
410{
411 return 0x0041004c;
412}
413static inline u32 gr_pri_bes_zrop_status_r(void)
414{
415 return 0x00408848;
416}
417static inline u32 gr_pri_bes_zrop_status2_r(void)
418{
419 return 0x0040884c;
420}
289static inline u32 gr_pipe_bundle_address_r(void) 421static inline u32 gr_pipe_bundle_address_r(void)
290{ 422{
291 return 0x00400200; 423 return 0x00400200;
@@ -1062,6 +1194,26 @@ static inline u32 gr_fecs_arb_ctx_cmd_cmd_v(u32 r)
1062{ 1194{
1063 return (r >> 0) & 0x1f; 1195 return (r >> 0) & 0x1f;
1064} 1196}
1197static inline u32 gr_fecs_ctxsw_status_fe_0_r(void)
1198{
1199 return 0x00409c00;
1200}
1201static inline u32 gr_gpc0_gpccs_ctxsw_status_gpc_0_r(void)
1202{
1203 return 0x00502c04;
1204}
1205static inline u32 gr_gpc0_gpccs_ctxsw_status_1_r(void)
1206{
1207 return 0x00502400;
1208}
1209static inline u32 gr_fecs_ctxsw_idlestate_r(void)
1210{
1211 return 0x00409420;
1212}
1213static inline u32 gr_gpc0_gpccs_ctxsw_idlestate_r(void)
1214{
1215 return 0x00502420;
1216}
1065static inline u32 gr_rstr2d_gpc_map0_r(void) 1217static inline u32 gr_rstr2d_gpc_map0_r(void)
1066{ 1218{
1067 return 0x0040780c; 1219 return 0x0040780c;
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
index 84391377..79e46421 100644
--- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
@@ -23,6 +23,7 @@
23 23
24#include "gr_gm20b.h" 24#include "gr_gm20b.h"
25#include "hw_gr_gm20b.h" 25#include "hw_gr_gm20b.h"
26#include "hw_fifo_gm20b.h"
26#include "hw_fb_gm20b.h" 27#include "hw_fb_gm20b.h"
27#include "hw_proj_gm20b.h" 28#include "hw_proj_gm20b.h"
28#include "hw_ctxsw_prog_gm20b.h" 29#include "hw_ctxsw_prog_gm20b.h"
@@ -814,6 +815,128 @@ static void gr_gm20b_update_ctxsw_preemption_mode(struct gk20a *g,
814 gk20a_dbg_fn("done"); 815 gk20a_dbg_fn("done");
815} 816}
816 817
818static int gr_gm20b_dump_gr_status_regs(struct gk20a *g,
819 struct gk20a_debug_output *o)
820{
821 struct gr_gk20a *gr = &g->gr;
822
823 gk20a_debug_output(o, "NV_PGRAPH_STATUS: 0x%x\n",
824 gk20a_readl(g, gr_status_r()));
825 gk20a_debug_output(o, "NV_PGRAPH_STATUS1: 0x%x\n",
826 gk20a_readl(g, gr_status_1_r()));
827 gk20a_debug_output(o, "NV_PGRAPH_STATUS2: 0x%x\n",
828 gk20a_readl(g, gr_status_2_r()));
829 gk20a_debug_output(o, "NV_PGRAPH_ENGINE_STATUS: 0x%x\n",
830 gk20a_readl(g, gr_engine_status_r()));
831 gk20a_debug_output(o, "NV_PGRAPH_GRFIFO_STATUS : 0x%x\n",
832 gk20a_readl(g, gr_gpfifo_status_r()));
833 gk20a_debug_output(o, "NV_PGRAPH_GRFIFO_CONTROL : 0x%x\n",
834 gk20a_readl(g, gr_gpfifo_ctl_r()));
835 gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_HOST_INT_STATUS : 0x%x\n",
836 gk20a_readl(g, gr_fecs_host_int_status_r()));
837 gk20a_debug_output(o, "NV_PGRAPH_EXCEPTION : 0x%x\n",
838 gk20a_readl(g, gr_exception_r()));
839 gk20a_debug_output(o, "NV_PGRAPH_FECS_INTR : 0x%x\n",
840 gk20a_readl(g, gr_fecs_intr_r()));
841 gk20a_debug_output(o, "NV_PFIFO_ENGINE_STATUS(GR) : 0x%x\n",
842 gk20a_readl(g, fifo_engine_status_r(ENGINE_GR_GK20A)));
843 gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY0: 0x%x\n",
844 gk20a_readl(g, gr_activity_0_r()));
845 gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY1: 0x%x\n",
846 gk20a_readl(g, gr_activity_1_r()));
847 gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY2: 0x%x\n",
848 gk20a_readl(g, gr_activity_2_r()));
849 gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY4: 0x%x\n",
850 gk20a_readl(g, gr_activity_4_r()));
851 gk20a_debug_output(o, "NV_PGRAPH_PRI_SKED_ACTIVITY: 0x%x\n",
852 gk20a_readl(g, gr_pri_sked_activity_r()));
853 gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY0: 0x%x\n",
854 gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity0_r()));
855 gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY1: 0x%x\n",
856 gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity1_r()));
857 gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY2: 0x%x\n",
858 gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity2_r()));
859 gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY3: 0x%x\n",
860 gk20a_readl(g, gr_pri_gpc0_gpccs_gpc_activity3_r()));
861 gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_ACTIVITY0: 0x%x\n",
862 gk20a_readl(g, gr_pri_gpc0_tpc0_tpccs_tpc_activity_0_r()));
863 if (gr->gpc_tpc_count[0] == 2)
864 gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPC1_TPCCS_TPC_ACTIVITY0: 0x%x\n",
865 gk20a_readl(g, gr_pri_gpc0_tpc1_tpccs_tpc_activity_0_r()));
866 gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPCS_TPCCS_TPC_ACTIVITY0: 0x%x\n",
867 gk20a_readl(g, gr_pri_gpc0_tpcs_tpccs_tpc_activity_0_r()));
868 gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY0: 0x%x\n",
869 gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_0_r()));
870 gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY1: 0x%x\n",
871 gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_1_r()));
872 gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY2: 0x%x\n",
873 gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_2_r()));
874 gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY3: 0x%x\n",
875 gk20a_readl(g, gr_pri_gpcs_gpccs_gpc_activity_3_r()));
876 gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_TPC0_TPCCS_TPC_ACTIVITY0: 0x%x\n",
877 gk20a_readl(g, gr_pri_gpcs_tpc0_tpccs_tpc_activity_0_r()));
878 if (gr->gpc_tpc_count[0] == 2)
879 gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_TPC1_TPCCS_TPC_ACTIVITY0: 0x%x\n",
880 gk20a_readl(g, gr_pri_gpcs_tpc1_tpccs_tpc_activity_0_r()));
881 gk20a_debug_output(o, "NV_PGRAPH_PRI_GPCS_TPCS_TPCCS_TPC_ACTIVITY0: 0x%x\n",
882 gk20a_readl(g, gr_pri_gpcs_tpcs_tpccs_tpc_activity_0_r()));
883 gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_BECS_BE_ACTIVITY0: 0x%x\n",
884 gk20a_readl(g, gr_pri_be0_becs_be_activity0_r()));
885 gk20a_debug_output(o, "NV_PGRAPH_PRI_BE1_BECS_BE_ACTIVITY0: 0x%x\n",
886 gk20a_readl(g, gr_pri_be1_becs_be_activity0_r()));
887 gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_BECS_BE_ACTIVITY0: 0x%x\n",
888 gk20a_readl(g, gr_pri_bes_becs_be_activity0_r()));
889 gk20a_debug_output(o, "NV_PGRAPH_PRI_DS_MPIPE_STATUS: 0x%x\n",
890 gk20a_readl(g, gr_pri_ds_mpipe_status_r()));
891 gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_GO_IDLE_ON_STATUS: 0x%x\n",
892 gk20a_readl(g, gr_pri_fe_go_idle_on_status_r()));
893 gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_GO_IDLE_TIMEOUT : 0x%x\n",
894 gk20a_readl(g, gr_fe_go_idle_timeout_r()));
895 gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_GO_IDLE_CHECK : 0x%x\n",
896 gk20a_readl(g, gr_pri_fe_go_idle_check_r()));
897 gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_GO_IDLE_INFO : 0x%x\n",
898 gk20a_readl(g, gr_pri_fe_go_idle_info_r()));
899 gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_TPC0_TEX_M_TEX_SUBUNITS_STATUS: 0x%x\n",
900 gk20a_readl(g, gr_pri_gpc0_tpc0_tex_m_tex_subunits_status_r()));
901 gk20a_debug_output(o, "NV_PGRAPH_PRI_CWD_FS: 0x%x\n",
902 gk20a_readl(g, gr_cwd_fs_r()));
903 gk20a_debug_output(o, "NV_PGRAPH_PRI_FE_TPC_FS: 0x%x\n",
904 gk20a_readl(g, gr_fe_tpc_fs_r()));
905 gk20a_debug_output(o, "NV_PGRAPH_PRI_CWD_GPC_TPC_ID(0): 0x%x\n",
906 gk20a_readl(g, gr_cwd_gpc_tpc_id_r(0)));
907 gk20a_debug_output(o, "NV_PGRAPH_PRI_CWD_SM_ID(0): 0x%x\n",
908 gk20a_readl(g, gr_cwd_sm_id_r(0)));
909 gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CTXSW_STATUS_FE_0: 0x%x\n",
910 gk20a_readl(g, gr_fecs_ctxsw_status_fe_0_r()));
911 gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CTXSW_STATUS_1: 0x%x\n",
912 gk20a_readl(g, gr_fecs_ctxsw_status_1_r()));
913 gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_GPC_0: 0x%x\n",
914 gk20a_readl(g, gr_gpc0_gpccs_ctxsw_status_gpc_0_r()));
915 gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_1: 0x%x\n",
916 gk20a_readl(g, gr_gpc0_gpccs_ctxsw_status_1_r()));
917 gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CTXSW_IDLESTATE : 0x%x\n",
918 gk20a_readl(g, gr_fecs_ctxsw_idlestate_r()));
919 gk20a_debug_output(o, "NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_IDLESTATE : 0x%x\n",
920 gk20a_readl(g, gr_gpc0_gpccs_ctxsw_idlestate_r()));
921 gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_CURRENT_CTX : 0x%x\n",
922 gk20a_readl(g, gr_fecs_current_ctx_r()));
923 gk20a_debug_output(o, "NV_PGRAPH_PRI_FECS_NEW_CTX : 0x%x\n",
924 gk20a_readl(g, gr_fecs_new_ctx_r()));
925 gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_CROP_STATUS1 : 0x%x\n",
926 gk20a_readl(g, gr_pri_be0_crop_status1_r()));
927 gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_CROP_STATUS1 : 0x%x\n",
928 gk20a_readl(g, gr_pri_bes_crop_status1_r()));
929 gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_ZROP_STATUS : 0x%x\n",
930 gk20a_readl(g, gr_pri_be0_zrop_status_r()));
931 gk20a_debug_output(o, "NV_PGRAPH_PRI_BE0_ZROP_STATUS2 : 0x%x\n",
932 gk20a_readl(g, gr_pri_be0_zrop_status2_r()));
933 gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_ZROP_STATUS : 0x%x\n",
934 gk20a_readl(g, gr_pri_bes_zrop_status_r()));
935 gk20a_debug_output(o, "NV_PGRAPH_PRI_BES_ZROP_STATUS2 : 0x%x\n",
936 gk20a_readl(g, gr_pri_bes_zrop_status2_r()));
937 return 0;
938}
939
817void gm20b_init_gr(struct gpu_ops *gops) 940void gm20b_init_gr(struct gpu_ops *gops)
818{ 941{
819 gops->gr.init_gpc_mmu = gr_gm20b_init_gpc_mmu; 942 gops->gr.init_gpc_mmu = gr_gm20b_init_gpc_mmu;
@@ -857,4 +980,5 @@ void gm20b_init_gr(struct gpu_ops *gops)
857 gops->gr.free_gr_ctx = gr_gk20a_free_gr_ctx; 980 gops->gr.free_gr_ctx = gr_gk20a_free_gr_ctx;
858 gops->gr.update_ctxsw_preemption_mode = 981 gops->gr.update_ctxsw_preemption_mode =
859 gr_gm20b_update_ctxsw_preemption_mode; 982 gr_gm20b_update_ctxsw_preemption_mode;
983 gops->gr.dump_gr_regs = gr_gm20b_dump_gr_status_regs;
860} 984}
diff --git a/drivers/gpu/nvgpu/gm20b/hw_gr_gm20b.h b/drivers/gpu/nvgpu/gm20b/hw_gr_gm20b.h
index 23b5226a..9c33321f 100644
--- a/drivers/gpu/nvgpu/gm20b/hw_gr_gm20b.h
+++ b/drivers/gpu/nvgpu/gm20b/hw_gr_gm20b.h
@@ -222,6 +222,10 @@ static inline u32 gr_gpfifo_ctl_semaphore_access_enabled_f(void)
222{ 222{
223 return 0x10000; 223 return 0x10000;
224} 224}
225static inline u32 gr_gpfifo_status_r(void)
226{
227 return 0x00400504;
228}
225static inline u32 gr_trapped_addr_r(void) 229static inline u32 gr_trapped_addr_r(void)
226{ 230{
227 return 0x00400704; 231 return 0x00400704;
@@ -266,6 +270,14 @@ static inline u32 gr_status_mask_r(void)
266{ 270{
267 return 0x00400610; 271 return 0x00400610;
268} 272}
273static inline u32 gr_status_1_r(void)
274{
275 return 0x00400604;
276}
277static inline u32 gr_status_2_r(void)
278{
279 return 0x00400608;
280}
269static inline u32 gr_engine_status_r(void) 281static inline u32 gr_engine_status_r(void)
270{ 282{
271 return 0x0040060c; 283 return 0x0040060c;
@@ -274,6 +286,138 @@ static inline u32 gr_engine_status_value_busy_f(void)
274{ 286{
275 return 0x1; 287 return 0x1;
276} 288}
289static inline u32 gr_activity_0_r(void)
290{
291 return 0x00400380;
292}
293static inline u32 gr_activity_1_r(void)
294{
295 return 0x00400384;
296}
297static inline u32 gr_activity_2_r(void)
298{
299 return 0x00400388;
300}
301static inline u32 gr_activity_4_r(void)
302{
303 return 0x00400390;
304}
305static inline u32 gr_pri_sked_activity_r(void)
306{
307 return 0x00407054;
308}
309static inline u32 gr_pri_gpc0_gpccs_gpc_activity0_r(void)
310{
311 return 0x00502c80;
312}
313static inline u32 gr_pri_gpc0_gpccs_gpc_activity1_r(void)
314{
315 return 0x00502c84;
316}
317static inline u32 gr_pri_gpc0_gpccs_gpc_activity2_r(void)
318{
319 return 0x00502c88;
320}
321static inline u32 gr_pri_gpc0_gpccs_gpc_activity3_r(void)
322{
323 return 0x00502c8c;
324}
325static inline u32 gr_pri_gpc0_tpc0_tpccs_tpc_activity_0_r(void)
326{
327 return 0x00504500;
328}
329static inline u32 gr_pri_gpc0_tpc1_tpccs_tpc_activity_0_r(void)
330{
331 return 0x00504d00;
332}
333static inline u32 gr_pri_gpc0_tpcs_tpccs_tpc_activity_0_r(void)
334{
335 return 0x00501d00;
336}
337static inline u32 gr_pri_gpcs_gpccs_gpc_activity_0_r(void)
338{
339 return 0x0041ac80;
340}
341static inline u32 gr_pri_gpcs_gpccs_gpc_activity_1_r(void)
342{
343 return 0x0041ac84;
344}
345static inline u32 gr_pri_gpcs_gpccs_gpc_activity_2_r(void)
346{
347 return 0x0041ac88;
348}
349static inline u32 gr_pri_gpcs_gpccs_gpc_activity_3_r(void)
350{
351 return 0x0041ac8c;
352}
353static inline u32 gr_pri_gpcs_tpc0_tpccs_tpc_activity_0_r(void)
354{
355 return 0x0041c500;
356}
357static inline u32 gr_pri_gpcs_tpc1_tpccs_tpc_activity_0_r(void)
358{
359 return 0x0041cd00;
360}
361static inline u32 gr_pri_gpcs_tpcs_tpccs_tpc_activity_0_r(void)
362{
363 return 0x00419d00;
364}
365static inline u32 gr_pri_be0_becs_be_activity0_r(void)
366{
367 return 0x00410200;
368}
369static inline u32 gr_pri_be1_becs_be_activity0_r(void)
370{
371 return 0x00410600;
372}
373static inline u32 gr_pri_bes_becs_be_activity0_r(void)
374{
375 return 0x00408a00;
376}
377static inline u32 gr_pri_ds_mpipe_status_r(void)
378{
379 return 0x00405858;
380}
381static inline u32 gr_pri_fe_go_idle_on_status_r(void)
382{
383 return 0x00404150;
384}
385static inline u32 gr_pri_fe_go_idle_check_r(void)
386{
387 return 0x00404158;
388}
389static inline u32 gr_pri_fe_go_idle_info_r(void)
390{
391 return 0x00404194;
392}
393static inline u32 gr_pri_gpc0_tpc0_tex_m_tex_subunits_status_r(void)
394{
395 return 0x00504238;
396}
397static inline u32 gr_pri_be0_crop_status1_r(void)
398{
399 return 0x00410134;
400}
401static inline u32 gr_pri_bes_crop_status1_r(void)
402{
403 return 0x00408934;
404}
405static inline u32 gr_pri_be0_zrop_status_r(void)
406{
407 return 0x00410048;
408}
409static inline u32 gr_pri_be0_zrop_status2_r(void)
410{
411 return 0x0041004c;
412}
413static inline u32 gr_pri_bes_zrop_status_r(void)
414{
415 return 0x00408848;
416}
417static inline u32 gr_pri_bes_zrop_status2_r(void)
418{
419 return 0x0040884c;
420}
277static inline u32 gr_pipe_bundle_address_r(void) 421static inline u32 gr_pipe_bundle_address_r(void)
278{ 422{
279 return 0x00400200; 423 return 0x00400200;
@@ -1062,6 +1206,26 @@ static inline u32 gr_fecs_arb_ctx_cmd_cmd_v(u32 r)
1062{ 1206{
1063 return (r >> 0) & 0x1f; 1207 return (r >> 0) & 0x1f;
1064} 1208}
1209static inline u32 gr_fecs_ctxsw_status_fe_0_r(void)
1210{
1211 return 0x00409c00;
1212}
1213static inline u32 gr_gpc0_gpccs_ctxsw_status_gpc_0_r(void)
1214{
1215 return 0x00502c04;
1216}
1217static inline u32 gr_gpc0_gpccs_ctxsw_status_1_r(void)
1218{
1219 return 0x00502400;
1220}
1221static inline u32 gr_fecs_ctxsw_idlestate_r(void)
1222{
1223 return 0x00409420;
1224}
1225static inline u32 gr_gpc0_gpccs_ctxsw_idlestate_r(void)
1226{
1227 return 0x00502420;
1228}
1065static inline u32 gr_rstr2d_gpc_map0_r(void) 1229static inline u32 gr_rstr2d_gpc_map0_r(void)
1066{ 1230{
1067 return 0x0040780c; 1231 return 0x0040780c;
generated by cgit v1.2.2 (git 2.25.0) at 2024-07-07 16:10:15 -0400