diff options
author | Seema Khowala <seemaj@nvidia.com> | 2017-07-02 14:21:24 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-07-05 06:06:58 -0400 |
commit | b7ae37cc32babbb433a017df12300fe4b4d5e2ac (patch) | |
tree | f70bea471be75ee1f97c139a3b6099bf559c3f0d /drivers | |
parent | 3b1ab45ccc40683c4b51dd9022c3aeed2e7666ba (diff) |
gpu: nvgpu: add sm_debugger_attached gr ops
This is required to support t19x sm register address changes
JIRA GPUT19X-75
Change-Id: I7f961147e0e6464a71e240487f7bc964b0544e5d
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master/r/1512213
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 8 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/gr_gm20b.c | 1 |
4 files changed, 7 insertions, 5 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index 31b470d4..347ee7dd 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | |||
@@ -1268,7 +1268,7 @@ bool gk20a_fifo_should_defer_engine_reset(struct gk20a *g, u32 engine_id, | |||
1268 | 1268 | ||
1269 | /* channel recovery is only deferred if an sm debugger | 1269 | /* channel recovery is only deferred if an sm debugger |
1270 | is attached and has MMU debug mode is enabled */ | 1270 | is attached and has MMU debug mode is enabled */ |
1271 | if (!gk20a_gr_sm_debugger_attached(g) || | 1271 | if (!g->ops.gr.sm_debugger_attached(g) || |
1272 | !g->ops.fb.is_debug_mode_enabled(g)) | 1272 | !g->ops.fb.is_debug_mode_enabled(g)) |
1273 | return false; | 1273 | return false; |
1274 | 1274 | ||
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 61832320..a1ad96b9 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -369,6 +369,7 @@ struct gpu_ops { | |||
369 | u32 (*tpc_enabled_exceptions)(struct gk20a *g); | 369 | u32 (*tpc_enabled_exceptions)(struct gk20a *g); |
370 | int (*set_czf_bypass)(struct gk20a *g, | 370 | int (*set_czf_bypass)(struct gk20a *g, |
371 | struct channel_gk20a *ch); | 371 | struct channel_gk20a *ch); |
372 | bool (*sm_debugger_attached)(struct gk20a *g); | ||
372 | } gr; | 373 | } gr; |
373 | struct { | 374 | struct { |
374 | void (*init_hw)(struct gk20a *g); | 375 | void (*init_hw)(struct gk20a *g); |
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 570aad18..4c1a61a9 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -5543,7 +5543,7 @@ int gr_gk20a_handle_sm_exception(struct gk20a *g, u32 gpc, u32 tpc, u32 sm, | |||
5543 | gr_gpc0_tpc0_sm_hww_global_esr_bpt_pause_pending_f() | | 5543 | gr_gpc0_tpc0_sm_hww_global_esr_bpt_pause_pending_f() | |
5544 | gr_gpc0_tpc0_sm_hww_global_esr_single_step_complete_pending_f(); | 5544 | gr_gpc0_tpc0_sm_hww_global_esr_single_step_complete_pending_f(); |
5545 | u32 global_esr, warp_esr; | 5545 | u32 global_esr, warp_esr; |
5546 | bool sm_debugger_attached = gk20a_gr_sm_debugger_attached(g); | 5546 | bool sm_debugger_attached = g->ops.gr.sm_debugger_attached(g); |
5547 | 5547 | ||
5548 | gk20a_dbg(gpu_dbg_fn | gpu_dbg_gpu_dbg, ""); | 5548 | gk20a_dbg(gpu_dbg_fn | gpu_dbg_gpu_dbg, ""); |
5549 | 5549 | ||
@@ -5978,7 +5978,7 @@ int gk20a_gr_isr(struct gk20a *g) | |||
5978 | &post_event, fault_ch, &global_esr); | 5978 | &post_event, fault_ch, &global_esr); |
5979 | 5979 | ||
5980 | /* signal clients waiting on an event */ | 5980 | /* signal clients waiting on an event */ |
5981 | if (gk20a_gr_sm_debugger_attached(g) && | 5981 | if (g->ops.gr.sm_debugger_attached(g) && |
5982 | post_event && fault_ch) { | 5982 | post_event && fault_ch) { |
5983 | gk20a_dbg_gpu_post_events(fault_ch); | 5983 | gk20a_dbg_gpu_post_events(fault_ch); |
5984 | } | 5984 | } |
@@ -8025,7 +8025,7 @@ void gk20a_suspend_single_sm(struct gk20a *g, | |||
8025 | offset = gpc_stride * gpc + tpc_in_gpc_stride * tpc; | 8025 | offset = gpc_stride * gpc + tpc_in_gpc_stride * tpc; |
8026 | 8026 | ||
8027 | /* if an SM debugger isn't attached, skip suspend */ | 8027 | /* if an SM debugger isn't attached, skip suspend */ |
8028 | if (!gk20a_gr_sm_debugger_attached(g)) { | 8028 | if (!g->ops.gr.sm_debugger_attached(g)) { |
8029 | nvgpu_err(g, | 8029 | nvgpu_err(g, |
8030 | "SM debugger not attached, skipping suspend!"); | 8030 | "SM debugger not attached, skipping suspend!"); |
8031 | return; | 8031 | return; |
@@ -8056,7 +8056,7 @@ void gk20a_suspend_all_sms(struct gk20a *g, | |||
8056 | u32 dbgr_control0; | 8056 | u32 dbgr_control0; |
8057 | 8057 | ||
8058 | /* if an SM debugger isn't attached, skip suspend */ | 8058 | /* if an SM debugger isn't attached, skip suspend */ |
8059 | if (!gk20a_gr_sm_debugger_attached(g)) { | 8059 | if (!g->ops.gr.sm_debugger_attached(g)) { |
8060 | nvgpu_err(g, | 8060 | nvgpu_err(g, |
8061 | "SM debugger not attached, skipping suspend!"); | 8061 | "SM debugger not attached, skipping suspend!"); |
8062 | return; | 8062 | return; |
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c index d4cccf3b..043e2855 100644 --- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c | |||
@@ -1630,4 +1630,5 @@ void gm20b_init_gr(struct gpu_ops *gops) | |||
1630 | gops->gr.clear_sm_errors = gr_gk20a_clear_sm_errors; | 1630 | gops->gr.clear_sm_errors = gr_gk20a_clear_sm_errors; |
1631 | gops->gr.tpc_enabled_exceptions = gr_gk20a_tpc_enabled_exceptions; | 1631 | gops->gr.tpc_enabled_exceptions = gr_gk20a_tpc_enabled_exceptions; |
1632 | gops->gr.get_esr_sm_sel = gk20a_gr_get_esr_sm_sel; | 1632 | gops->gr.get_esr_sm_sel = gk20a_gr_get_esr_sm_sel; |
1633 | gops->gr.sm_debugger_attached = gk20a_gr_sm_debugger_attached; | ||
1633 | } | 1634 | } |