diff options
author | Richard Zhao <rizhao@nvidia.com> | 2017-06-27 20:43:00 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-06-30 01:34:36 -0400 |
commit | ac292605b5d2c4c27c7d133601594b9692a32fed (patch) | |
tree | 5aa3104c9eb992c4ce3664d471046511a93dc0d1 /drivers | |
parent | 0a77330ac77d50d637492f591262a36bf48f2e5e (diff) |
gpu: nvgpu: vgpu: fixes for no bar1 support case
- add check of is_bar1_supported
- move vgpu_init_fifo_setup_hw to hal
- assume it's bar1 reg if no "reg-names" in dts
Jira VFND-3796
Change-Id: I022a0ed98144bb8f1e7e55f24fcaf928b4a3fe32
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master/r/1474716
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/fifo_vgpu.c | 26 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/vgpu.c | 13 |
2 files changed, 25 insertions, 14 deletions
diff --git a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c index 55b3de07..7029498d 100644 --- a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c | |||
@@ -270,17 +270,21 @@ static int vgpu_init_fifo_setup_sw(struct gk20a *g) | |||
270 | } | 270 | } |
271 | 271 | ||
272 | /* bar1 va */ | 272 | /* bar1 va */ |
273 | f->userd.gpu_va = vgpu_bar1_map(g, &f->userd.priv.sgt, f->userd.size); | 273 | if (g->ops.mm.is_bar1_supported(g)) { |
274 | if (!f->userd.gpu_va) { | 274 | f->userd.gpu_va = vgpu_bar1_map(g, &f->userd.priv.sgt, |
275 | dev_err(d, "gmmu mapping failed\n"); | 275 | f->userd.size); |
276 | goto clean_up; | 276 | if (!f->userd.gpu_va) { |
277 | dev_err(d, "gmmu mapping failed\n"); | ||
278 | goto clean_up; | ||
279 | } | ||
280 | /* if reduced BAR1 range is specified, use offset of 0 | ||
281 | * (server returns offset assuming full BAR1 range) | ||
282 | */ | ||
283 | if (resource_size(g->bar1_mem) == | ||
284 | (resource_size_t)f->userd.size) | ||
285 | f->userd.gpu_va = 0; | ||
277 | } | 286 | } |
278 | 287 | ||
279 | /* if reduced BAR1 range is specified, use offset of 0 | ||
280 | (server returns offset assuming full BAR1 range) */ | ||
281 | if (resource_size(g->bar1_mem) == (resource_size_t)f->userd.size) | ||
282 | f->userd.gpu_va = 0; | ||
283 | |||
284 | gk20a_dbg(gpu_dbg_map_v, "userd bar1 va = 0x%llx", f->userd.gpu_va); | 288 | gk20a_dbg(gpu_dbg_map_v, "userd bar1 va = 0x%llx", f->userd.gpu_va); |
285 | 289 | ||
286 | f->channel = nvgpu_vzalloc(g, f->num_channels * sizeof(*f->channel)); | 290 | f->channel = nvgpu_vzalloc(g, f->num_channels * sizeof(*f->channel)); |
@@ -403,7 +407,8 @@ int vgpu_init_fifo_support(struct gk20a *g) | |||
403 | if (err) | 407 | if (err) |
404 | return err; | 408 | return err; |
405 | 409 | ||
406 | err = vgpu_init_fifo_setup_hw(g); | 410 | if (g->ops.fifo.init_fifo_setup_hw) |
411 | err = g->ops.fifo.init_fifo_setup_hw(g); | ||
407 | return err; | 412 | return err; |
408 | } | 413 | } |
409 | 414 | ||
@@ -788,6 +793,7 @@ u32 vgpu_fifo_default_timeslice_us(struct gk20a *g) | |||
788 | 793 | ||
789 | void vgpu_init_fifo_ops(struct gpu_ops *gops) | 794 | void vgpu_init_fifo_ops(struct gpu_ops *gops) |
790 | { | 795 | { |
796 | gops->fifo.init_fifo_setup_hw = vgpu_init_fifo_setup_hw; | ||
791 | gops->fifo.bind_channel = vgpu_channel_bind; | 797 | gops->fifo.bind_channel = vgpu_channel_bind; |
792 | gops->fifo.unbind_channel = vgpu_channel_unbind; | 798 | gops->fifo.unbind_channel = vgpu_channel_unbind; |
793 | gops->fifo.enable_channel = vgpu_channel_enable; | 799 | gops->fifo.enable_channel = vgpu_channel_enable; |
diff --git a/drivers/gpu/nvgpu/vgpu/vgpu.c b/drivers/gpu/nvgpu/vgpu/vgpu.c index 1a6dbb35..d94543a8 100644 --- a/drivers/gpu/nvgpu/vgpu/vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/vgpu.c | |||
@@ -259,6 +259,7 @@ static int vgpu_init_support(struct platform_device *pdev) | |||
259 | { | 259 | { |
260 | struct resource *r = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 260 | struct resource *r = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
261 | struct gk20a *g = get_gk20a(&pdev->dev); | 261 | struct gk20a *g = get_gk20a(&pdev->dev); |
262 | void __iomem *regs; | ||
262 | int err = 0; | 263 | int err = 0; |
263 | 264 | ||
264 | if (!r) { | 265 | if (!r) { |
@@ -267,13 +268,17 @@ static int vgpu_init_support(struct platform_device *pdev) | |||
267 | goto fail; | 268 | goto fail; |
268 | } | 269 | } |
269 | 270 | ||
270 | g->bar1 = devm_ioremap_resource(&pdev->dev, r); | 271 | regs = devm_ioremap_resource(&pdev->dev, r); |
271 | if (IS_ERR(g->bar1)) { | 272 | if (IS_ERR(regs)) { |
272 | dev_err(dev_from_gk20a(g), "failed to remap gk20a bar1\n"); | 273 | dev_err(dev_from_gk20a(g), "failed to remap gk20a regs\n"); |
273 | err = PTR_ERR(g->bar1); | 274 | err = PTR_ERR(g->bar1); |
274 | goto fail; | 275 | goto fail; |
275 | } | 276 | } |
276 | g->bar1_mem = r; | 277 | |
278 | if (r->name && !strcmp(r->name, "/vgpu")) { | ||
279 | g->bar1 = regs; | ||
280 | g->bar1_mem = r; | ||
281 | } | ||
277 | 282 | ||
278 | nvgpu_mutex_init(&g->dbg_sessions_lock); | 283 | nvgpu_mutex_init(&g->dbg_sessions_lock); |
279 | nvgpu_mutex_init(&g->client_lock); | 284 | nvgpu_mutex_init(&g->client_lock); |