diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2017-04-14 15:06:39 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-04-19 15:16:02 -0400 |
commit | a9c66768db400a82575a82ecddec71f1d3fd4aba (patch) | |
tree | 3b83db70149515fc21c9d700f68bbcf0fb4e58b4 /drivers | |
parent | 7eb59ff8d334e9980e21bac50b4680855bd8237f (diff) |
gpu: nvgpu: Add abstraction for firmware loading
Add nvgpu_firmware data structure, and return it instead of Linux
struct firmare from nvgpu_request_firmware. Also add abstraction
for releasing firmware: nvgpu_release_firmware.
JIRA NVGPU-16
Change-Id: I6dae8262957c0d4506f710289e3a43a6c1729fc7
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1463538
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/nvgpu/Makefile.nvgpu | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/boardobj/boardobj.c | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/driver_common.c | 66 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/firmware.c | 114 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/cde_gk20a.c | 20 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c | 9 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 16 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | 8 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/pmu_gk20a.h | 4 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm206/bios_gm206.c | 8 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/acr_gm20b.c | 32 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/acr_gp106.c | 28 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/acr/nvgpu_acr.h | 10 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/firmware.h | 66 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/include/nvgpu/nvgpu_common.h | 7 |
15 files changed, 251 insertions, 139 deletions
diff --git a/drivers/gpu/nvgpu/Makefile.nvgpu b/drivers/gpu/nvgpu/Makefile.nvgpu index 983df242..6bac840f 100644 --- a/drivers/gpu/nvgpu/Makefile.nvgpu +++ b/drivers/gpu/nvgpu/Makefile.nvgpu | |||
@@ -36,6 +36,7 @@ nvgpu-y := \ | |||
36 | common/linux/dma.o \ | 36 | common/linux/dma.o \ |
37 | common/linux/soc.o \ | 37 | common/linux/soc.o \ |
38 | common/linux/driver_common.o \ | 38 | common/linux/driver_common.o \ |
39 | common/linux/firmware.o \ | ||
39 | common/mm/nvgpu_allocator.o \ | 40 | common/mm/nvgpu_allocator.o \ |
40 | common/mm/bitmap_allocator.o \ | 41 | common/mm/bitmap_allocator.o \ |
41 | common/mm/buddy_allocator.o \ | 42 | common/mm/buddy_allocator.o \ |
diff --git a/drivers/gpu/nvgpu/boardobj/boardobj.c b/drivers/gpu/nvgpu/boardobj/boardobj.c index b955f2b4..7ac0eac1 100644 --- a/drivers/gpu/nvgpu/boardobj/boardobj.c +++ b/drivers/gpu/nvgpu/boardobj/boardobj.c | |||
@@ -11,7 +11,6 @@ | |||
11 | * more details. | 11 | * more details. |
12 | */ | 12 | */ |
13 | 13 | ||
14 | #include <linux/firmware.h> | ||
15 | #include <linux/module.h> | 14 | #include <linux/module.h> |
16 | #include <linux/uaccess.h> | 15 | #include <linux/uaccess.h> |
17 | 16 | ||
diff --git a/drivers/gpu/nvgpu/common/linux/driver_common.c b/drivers/gpu/nvgpu/common/linux/driver_common.c index 5c96b4e8..af26996b 100644 --- a/drivers/gpu/nvgpu/common/linux/driver_common.c +++ b/drivers/gpu/nvgpu/common/linux/driver_common.c | |||
@@ -15,7 +15,6 @@ | |||
15 | */ | 15 | */ |
16 | 16 | ||
17 | #include <linux/dma-mapping.h> | 17 | #include <linux/dma-mapping.h> |
18 | #include <linux/firmware.h> | ||
19 | 18 | ||
20 | #include <nvgpu/kmem.h> | 19 | #include <nvgpu/kmem.h> |
21 | #include <nvgpu/nvgpu_common.h> | 20 | #include <nvgpu/nvgpu_common.h> |
@@ -201,71 +200,6 @@ int nvgpu_probe(struct gk20a *g, | |||
201 | return 0; | 200 | return 0; |
202 | } | 201 | } |
203 | 202 | ||
204 | static const struct firmware *do_request_firmware(struct device *dev, | ||
205 | const char *prefix, const char *fw_name, int flags) | ||
206 | { | ||
207 | const struct firmware *fw; | ||
208 | char *fw_path = NULL; | ||
209 | int path_len, err; | ||
210 | |||
211 | if (prefix) { | ||
212 | path_len = strlen(prefix) + strlen(fw_name); | ||
213 | path_len += 2; /* for the path separator and zero terminator*/ | ||
214 | |||
215 | fw_path = nvgpu_kzalloc(get_gk20a(dev), | ||
216 | sizeof(*fw_path) * path_len); | ||
217 | if (!fw_path) | ||
218 | return NULL; | ||
219 | |||
220 | sprintf(fw_path, "%s/%s", prefix, fw_name); | ||
221 | fw_name = fw_path; | ||
222 | } | ||
223 | |||
224 | #if LINUX_VERSION_CODE < KERNEL_VERSION(3,18,0) | ||
225 | err = request_firmware(&fw, fw_name, dev); | ||
226 | #else | ||
227 | if (flags & NVGPU_REQUEST_FIRMWARE_NO_WARN) | ||
228 | err = request_firmware_direct(&fw, fw_name, dev); | ||
229 | else | ||
230 | err = request_firmware(&fw, fw_name, dev); | ||
231 | #endif | ||
232 | |||
233 | nvgpu_kfree(get_gk20a(dev), fw_path); | ||
234 | if (err) | ||
235 | return NULL; | ||
236 | return fw; | ||
237 | } | ||
238 | |||
239 | /* This is a simple wrapper around request_firmware that takes 'fw_name' and | ||
240 | * applies an IP specific relative path prefix to it. The caller is | ||
241 | * responsible for calling release_firmware later. */ | ||
242 | const struct firmware *nvgpu_request_firmware(struct gk20a *g, | ||
243 | const char *fw_name, | ||
244 | int flags) | ||
245 | { | ||
246 | struct device *dev = g->dev; | ||
247 | const struct firmware *fw; | ||
248 | |||
249 | /* current->fs is NULL when calling from SYS_EXIT. | ||
250 | Add a check here to prevent crash in request_firmware */ | ||
251 | if (!current->fs || !fw_name) | ||
252 | return NULL; | ||
253 | |||
254 | BUG_ON(!g->name); | ||
255 | fw = do_request_firmware(dev, g->name, fw_name, flags); | ||
256 | |||
257 | #ifdef CONFIG_TEGRA_GK20A | ||
258 | /* TO BE REMOVED - Support loading from legacy SOC specific path. */ | ||
259 | if (!fw && !(flags & NVGPU_REQUEST_FIRMWARE_NO_SOC)) { | ||
260 | struct gk20a_platform *platform = gk20a_get_platform(dev); | ||
261 | fw = do_request_firmware(dev, | ||
262 | platform->soc_name, fw_name, flags); | ||
263 | } | ||
264 | #endif | ||
265 | |||
266 | return fw; | ||
267 | } | ||
268 | |||
269 | /** | 203 | /** |
270 | * cyclic_delta - Returns delta of cyclic integers a and b. | 204 | * cyclic_delta - Returns delta of cyclic integers a and b. |
271 | * | 205 | * |
diff --git a/drivers/gpu/nvgpu/common/linux/firmware.c b/drivers/gpu/nvgpu/common/linux/firmware.c new file mode 100644 index 00000000..32b1e61f --- /dev/null +++ b/drivers/gpu/nvgpu/common/linux/firmware.c | |||
@@ -0,0 +1,114 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms and conditions of the GNU General Public License, | ||
6 | * version 2, as published by the Free Software Foundation. | ||
7 | * | ||
8 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
11 | * more details. | ||
12 | * | ||
13 | * You should have received a copy of the GNU General Public License | ||
14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
15 | */ | ||
16 | |||
17 | #include <linux/firmware.h> | ||
18 | |||
19 | #include <nvgpu/kmem.h> | ||
20 | #include <nvgpu/bug.h> | ||
21 | #include <nvgpu/firmware.h> | ||
22 | |||
23 | #include "gk20a/gk20a.h" | ||
24 | |||
25 | static const struct firmware *do_request_firmware(struct device *dev, | ||
26 | const char *prefix, const char *fw_name, int flags) | ||
27 | { | ||
28 | const struct firmware *fw; | ||
29 | char *fw_path = NULL; | ||
30 | int path_len, err; | ||
31 | |||
32 | if (prefix) { | ||
33 | path_len = strlen(prefix) + strlen(fw_name); | ||
34 | path_len += 2; /* for the path separator and zero terminator*/ | ||
35 | |||
36 | fw_path = nvgpu_kzalloc(get_gk20a(dev), | ||
37 | sizeof(*fw_path) * path_len); | ||
38 | if (!fw_path) | ||
39 | return NULL; | ||
40 | |||
41 | sprintf(fw_path, "%s/%s", prefix, fw_name); | ||
42 | fw_name = fw_path; | ||
43 | } | ||
44 | |||
45 | #if LINUX_VERSION_CODE < KERNEL_VERSION(3,18,0) | ||
46 | err = request_firmware(&fw, fw_name, dev); | ||
47 | #else | ||
48 | if (flags & NVGPU_REQUEST_FIRMWARE_NO_WARN) | ||
49 | err = request_firmware_direct(&fw, fw_name, dev); | ||
50 | else | ||
51 | err = request_firmware(&fw, fw_name, dev); | ||
52 | #endif | ||
53 | |||
54 | nvgpu_kfree(get_gk20a(dev), fw_path); | ||
55 | if (err) | ||
56 | return NULL; | ||
57 | return fw; | ||
58 | } | ||
59 | |||
60 | /* This is a simple wrapper around request_firmware that takes 'fw_name' and | ||
61 | * applies an IP specific relative path prefix to it. The caller is | ||
62 | * responsible for calling nvgpu_release_firmware later. */ | ||
63 | struct nvgpu_firmware *nvgpu_request_firmware(struct gk20a *g, | ||
64 | const char *fw_name, | ||
65 | int flags) | ||
66 | { | ||
67 | struct device *dev = g->dev; | ||
68 | struct nvgpu_firmware *fw; | ||
69 | const struct firmware *linux_fw; | ||
70 | |||
71 | /* current->fs is NULL when calling from SYS_EXIT. | ||
72 | Add a check here to prevent crash in request_firmware */ | ||
73 | if (!current->fs || !fw_name) | ||
74 | return NULL; | ||
75 | |||
76 | fw = nvgpu_kzalloc(g, sizeof(*fw)); | ||
77 | if (!fw) | ||
78 | return NULL; | ||
79 | |||
80 | linux_fw = do_request_firmware(dev, g->name, fw_name, flags); | ||
81 | |||
82 | #ifdef CONFIG_TEGRA_GK20A | ||
83 | /* TO BE REMOVED - Support loading from legacy SOC specific path. */ | ||
84 | if (!linux_fw && !(flags & NVGPU_REQUEST_FIRMWARE_NO_SOC)) { | ||
85 | struct gk20a_platform *platform = gk20a_get_platform(dev); | ||
86 | linux_fw = do_request_firmware(dev, | ||
87 | platform->soc_name, fw_name, flags); | ||
88 | } | ||
89 | #endif | ||
90 | |||
91 | if (!linux_fw) | ||
92 | goto err; | ||
93 | |||
94 | fw->data = nvgpu_kmalloc(g, linux_fw->size); | ||
95 | if (!fw->data) | ||
96 | goto err; | ||
97 | |||
98 | memcpy(fw->data, linux_fw->data, linux_fw->size); | ||
99 | fw->size = linux_fw->size; | ||
100 | |||
101 | release_firmware(linux_fw); | ||
102 | |||
103 | return fw; | ||
104 | |||
105 | err: | ||
106 | nvgpu_kfree(g, fw); | ||
107 | return NULL; | ||
108 | } | ||
109 | |||
110 | void nvgpu_release_firmware(struct gk20a *g, struct nvgpu_firmware *fw) | ||
111 | { | ||
112 | nvgpu_kfree(g, fw->data); | ||
113 | nvgpu_kfree(g, fw); | ||
114 | } | ||
diff --git a/drivers/gpu/nvgpu/gk20a/cde_gk20a.c b/drivers/gpu/nvgpu/gk20a/cde_gk20a.c index 2187e833..18432c55 100644 --- a/drivers/gpu/nvgpu/gk20a/cde_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/cde_gk20a.c | |||
@@ -17,7 +17,6 @@ | |||
17 | */ | 17 | */ |
18 | 18 | ||
19 | #include <linux/dma-mapping.h> | 19 | #include <linux/dma-mapping.h> |
20 | #include <linux/firmware.h> | ||
21 | #include <linux/fs.h> | 20 | #include <linux/fs.h> |
22 | #include <linux/debugfs.h> | 21 | #include <linux/debugfs.h> |
23 | #include <linux/dma-buf.h> | 22 | #include <linux/dma-buf.h> |
@@ -30,6 +29,7 @@ | |||
30 | #include <nvgpu/kmem.h> | 29 | #include <nvgpu/kmem.h> |
31 | #include <nvgpu/log.h> | 30 | #include <nvgpu/log.h> |
32 | #include <nvgpu/bug.h> | 31 | #include <nvgpu/bug.h> |
32 | #include <nvgpu/firmware.h> | ||
33 | 33 | ||
34 | #include "gk20a.h" | 34 | #include "gk20a.h" |
35 | #include "channel_gk20a.h" | 35 | #include "channel_gk20a.h" |
@@ -226,7 +226,7 @@ out: | |||
226 | } | 226 | } |
227 | 227 | ||
228 | static int gk20a_init_cde_buf(struct gk20a_cde_ctx *cde_ctx, | 228 | static int gk20a_init_cde_buf(struct gk20a_cde_ctx *cde_ctx, |
229 | const struct firmware *img, | 229 | struct nvgpu_firmware *img, |
230 | struct gk20a_cde_hdr_buf *buf) | 230 | struct gk20a_cde_hdr_buf *buf) |
231 | { | 231 | { |
232 | struct nvgpu_mem *mem; | 232 | struct nvgpu_mem *mem; |
@@ -314,7 +314,7 @@ static int gk20a_replace_data(struct gk20a_cde_ctx *cde_ctx, void *target, | |||
314 | } | 314 | } |
315 | 315 | ||
316 | static int gk20a_init_cde_replace(struct gk20a_cde_ctx *cde_ctx, | 316 | static int gk20a_init_cde_replace(struct gk20a_cde_ctx *cde_ctx, |
317 | const struct firmware *img, | 317 | struct nvgpu_firmware *img, |
318 | struct gk20a_cde_hdr_replace *replace) | 318 | struct gk20a_cde_hdr_replace *replace) |
319 | { | 319 | { |
320 | struct nvgpu_mem *source_mem; | 320 | struct nvgpu_mem *source_mem; |
@@ -454,7 +454,7 @@ static int gk20a_cde_patch_params(struct gk20a_cde_ctx *cde_ctx) | |||
454 | } | 454 | } |
455 | 455 | ||
456 | static int gk20a_init_cde_param(struct gk20a_cde_ctx *cde_ctx, | 456 | static int gk20a_init_cde_param(struct gk20a_cde_ctx *cde_ctx, |
457 | const struct firmware *img, | 457 | struct nvgpu_firmware *img, |
458 | struct gk20a_cde_hdr_param *param) | 458 | struct gk20a_cde_hdr_param *param) |
459 | { | 459 | { |
460 | struct nvgpu_mem *target_mem; | 460 | struct nvgpu_mem *target_mem; |
@@ -497,7 +497,7 @@ static int gk20a_init_cde_param(struct gk20a_cde_ctx *cde_ctx, | |||
497 | } | 497 | } |
498 | 498 | ||
499 | static int gk20a_init_cde_required_class(struct gk20a_cde_ctx *cde_ctx, | 499 | static int gk20a_init_cde_required_class(struct gk20a_cde_ctx *cde_ctx, |
500 | const struct firmware *img, | 500 | struct nvgpu_firmware *img, |
501 | u32 required_class) | 501 | u32 required_class) |
502 | { | 502 | { |
503 | struct gk20a *g = cde_ctx->g; | 503 | struct gk20a *g = cde_ctx->g; |
@@ -521,7 +521,7 @@ static int gk20a_init_cde_required_class(struct gk20a_cde_ctx *cde_ctx, | |||
521 | } | 521 | } |
522 | 522 | ||
523 | static int gk20a_init_cde_command(struct gk20a_cde_ctx *cde_ctx, | 523 | static int gk20a_init_cde_command(struct gk20a_cde_ctx *cde_ctx, |
524 | const struct firmware *img, | 524 | struct nvgpu_firmware *img, |
525 | u32 op, | 525 | u32 op, |
526 | struct gk20a_cde_cmd_elem *cmd_elem, | 526 | struct gk20a_cde_cmd_elem *cmd_elem, |
527 | u32 num_elems) | 527 | u32 num_elems) |
@@ -622,7 +622,7 @@ static int gk20a_cde_pack_cmdbufs(struct gk20a_cde_ctx *cde_ctx) | |||
622 | } | 622 | } |
623 | 623 | ||
624 | static int gk20a_init_cde_img(struct gk20a_cde_ctx *cde_ctx, | 624 | static int gk20a_init_cde_img(struct gk20a_cde_ctx *cde_ctx, |
625 | const struct firmware *img) | 625 | struct nvgpu_firmware *img) |
626 | { | 626 | { |
627 | struct gk20a *g = cde_ctx->g; | 627 | struct gk20a *g = cde_ctx->g; |
628 | struct gk20a_cde_app *cde_app = &cde_ctx->g->cde_app; | 628 | struct gk20a_cde_app *cde_app = &cde_ctx->g->cde_app; |
@@ -1202,7 +1202,7 @@ __releases(&cde_app->mutex) | |||
1202 | static int gk20a_cde_load(struct gk20a_cde_ctx *cde_ctx) | 1202 | static int gk20a_cde_load(struct gk20a_cde_ctx *cde_ctx) |
1203 | { | 1203 | { |
1204 | struct gk20a *g = cde_ctx->g; | 1204 | struct gk20a *g = cde_ctx->g; |
1205 | const struct firmware *img; | 1205 | struct nvgpu_firmware *img; |
1206 | struct channel_gk20a *ch; | 1206 | struct channel_gk20a *ch; |
1207 | struct gr_gk20a *gr = &g->gr; | 1207 | struct gr_gk20a *gr = &g->gr; |
1208 | int err = 0; | 1208 | int err = 0; |
@@ -1265,7 +1265,7 @@ static int gk20a_cde_load(struct gk20a_cde_ctx *cde_ctx) | |||
1265 | } | 1265 | } |
1266 | 1266 | ||
1267 | /* initialisation done */ | 1267 | /* initialisation done */ |
1268 | release_firmware(img); | 1268 | nvgpu_release_firmware(g, img); |
1269 | 1269 | ||
1270 | return 0; | 1270 | return 0; |
1271 | 1271 | ||
@@ -1276,7 +1276,7 @@ err_alloc_gpfifo: | |||
1276 | gk20a_vm_put(ch->vm); | 1276 | gk20a_vm_put(ch->vm); |
1277 | err_commit_va: | 1277 | err_commit_va: |
1278 | err_get_gk20a_channel: | 1278 | err_get_gk20a_channel: |
1279 | release_firmware(img); | 1279 | nvgpu_release_firmware(g, img); |
1280 | nvgpu_err(g, "cde: couldn't initialise buffer converter: %d", err); | 1280 | nvgpu_err(g, "cde: couldn't initialise buffer converter: %d", err); |
1281 | return err; | 1281 | return err; |
1282 | } | 1282 | } |
diff --git a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c index 712359e1..3c6d8924 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c | |||
@@ -19,11 +19,10 @@ | |||
19 | * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | 19 | * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
20 | */ | 20 | */ |
21 | 21 | ||
22 | #include <linux/firmware.h> | ||
23 | |||
24 | #include <nvgpu/nvgpu_common.h> | 22 | #include <nvgpu/nvgpu_common.h> |
25 | #include <nvgpu/kmem.h> | 23 | #include <nvgpu/kmem.h> |
26 | #include <nvgpu/log.h> | 24 | #include <nvgpu/log.h> |
25 | #include <nvgpu/firmware.h> | ||
27 | 26 | ||
28 | #include "gk20a.h" | 27 | #include "gk20a.h" |
29 | #include "gr_ctx_gk20a.h" | 28 | #include "gr_ctx_gk20a.h" |
@@ -112,7 +111,7 @@ static bool gr_gk20a_is_firmware_defined(void) | |||
112 | 111 | ||
113 | static int gr_gk20a_init_ctx_vars_fw(struct gk20a *g, struct gr_gk20a *gr) | 112 | static int gr_gk20a_init_ctx_vars_fw(struct gk20a *g, struct gr_gk20a *gr) |
114 | { | 113 | { |
115 | const struct firmware *netlist_fw; | 114 | struct nvgpu_firmware *netlist_fw; |
116 | struct netlist_image *netlist = NULL; | 115 | struct netlist_image *netlist = NULL; |
117 | char name[MAX_NETLIST_NAME]; | 116 | char name[MAX_NETLIST_NAME]; |
118 | u32 i, major_v = ~0, major_v_hw, netlist_num; | 117 | u32 i, major_v = ~0, major_v_hw, netlist_num; |
@@ -392,7 +391,7 @@ static int gr_gk20a_init_ctx_vars_fw(struct gk20a *g, struct gr_gk20a *gr) | |||
392 | g->gr.ctx_vars.valid = true; | 391 | g->gr.ctx_vars.valid = true; |
393 | g->gr.netlist = net; | 392 | g->gr.netlist = net; |
394 | 393 | ||
395 | release_firmware(netlist_fw); | 394 | nvgpu_release_firmware(g, netlist_fw); |
396 | gk20a_dbg_fn("done"); | 395 | gk20a_dbg_fn("done"); |
397 | goto done; | 396 | goto done; |
398 | 397 | ||
@@ -427,7 +426,7 @@ clean_up: | |||
427 | nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.perf_pma.l); | 426 | nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.perf_pma.l); |
428 | nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.pm_rop.l); | 427 | nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.pm_rop.l); |
429 | nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.pm_ucgpc.l); | 428 | nvgpu_kfree(g, g->gr.ctx_vars.ctxsw_regs.pm_ucgpc.l); |
430 | release_firmware(netlist_fw); | 429 | nvgpu_release_firmware(g, netlist_fw); |
431 | err = -ENOENT; | 430 | err = -ENOENT; |
432 | } | 431 | } |
433 | 432 | ||
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index a4419885..0e787356 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -17,7 +17,6 @@ | |||
17 | * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | 17 | * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
18 | */ | 18 | */ |
19 | 19 | ||
20 | #include <linux/firmware.h> | ||
21 | #include <trace/events/gk20a.h> | 20 | #include <trace/events/gk20a.h> |
22 | 21 | ||
23 | #include <nvgpu/dma.h> | 22 | #include <nvgpu/dma.h> |
@@ -28,6 +27,7 @@ | |||
28 | #include <nvgpu/bsearch.h> | 27 | #include <nvgpu/bsearch.h> |
29 | #include <nvgpu/sort.h> | 28 | #include <nvgpu/sort.h> |
30 | #include <nvgpu/bug.h> | 29 | #include <nvgpu/bug.h> |
30 | #include <nvgpu/firmware.h> | ||
31 | 31 | ||
32 | #include "gk20a.h" | 32 | #include "gk20a.h" |
33 | #include "kind_gk20a.h" | 33 | #include "kind_gk20a.h" |
@@ -2272,8 +2272,8 @@ int gr_gk20a_init_ctxsw_ucode(struct gk20a *g) | |||
2272 | struct vm_gk20a *vm = &mm->pmu.vm; | 2272 | struct vm_gk20a *vm = &mm->pmu.vm; |
2273 | struct gk20a_ctxsw_bootloader_desc *fecs_boot_desc; | 2273 | struct gk20a_ctxsw_bootloader_desc *fecs_boot_desc; |
2274 | struct gk20a_ctxsw_bootloader_desc *gpccs_boot_desc; | 2274 | struct gk20a_ctxsw_bootloader_desc *gpccs_boot_desc; |
2275 | const struct firmware *fecs_fw; | 2275 | struct nvgpu_firmware *fecs_fw; |
2276 | const struct firmware *gpccs_fw; | 2276 | struct nvgpu_firmware *gpccs_fw; |
2277 | u32 *fecs_boot_image; | 2277 | u32 *fecs_boot_image; |
2278 | u32 *gpccs_boot_image; | 2278 | u32 *gpccs_boot_image; |
2279 | struct gk20a_ctxsw_ucode_info *ucode_info = &g->ctxsw_ucode_info; | 2279 | struct gk20a_ctxsw_ucode_info *ucode_info = &g->ctxsw_ucode_info; |
@@ -2292,7 +2292,7 @@ int gr_gk20a_init_ctxsw_ucode(struct gk20a *g) | |||
2292 | 2292 | ||
2293 | gpccs_fw = nvgpu_request_firmware(g, GK20A_GPCCS_UCODE_IMAGE, 0); | 2293 | gpccs_fw = nvgpu_request_firmware(g, GK20A_GPCCS_UCODE_IMAGE, 0); |
2294 | if (!gpccs_fw) { | 2294 | if (!gpccs_fw) { |
2295 | release_firmware(fecs_fw); | 2295 | nvgpu_release_firmware(g, fecs_fw); |
2296 | nvgpu_err(g, "failed to load gpccs ucode!!"); | 2296 | nvgpu_err(g, "failed to load gpccs ucode!!"); |
2297 | return -ENOENT; | 2297 | return -ENOENT; |
2298 | } | 2298 | } |
@@ -2321,7 +2321,7 @@ int gr_gk20a_init_ctxsw_ucode(struct gk20a *g) | |||
2321 | g->gr.ctx_vars.ucode.fecs.inst.l, | 2321 | g->gr.ctx_vars.ucode.fecs.inst.l, |
2322 | g->gr.ctx_vars.ucode.fecs.data.l); | 2322 | g->gr.ctx_vars.ucode.fecs.data.l); |
2323 | 2323 | ||
2324 | release_firmware(fecs_fw); | 2324 | nvgpu_release_firmware(g, fecs_fw); |
2325 | fecs_fw = NULL; | 2325 | fecs_fw = NULL; |
2326 | 2326 | ||
2327 | gr_gk20a_copy_ctxsw_ucode_segments(g, &ucode_info->surface_desc, | 2327 | gr_gk20a_copy_ctxsw_ucode_segments(g, &ucode_info->surface_desc, |
@@ -2330,7 +2330,7 @@ int gr_gk20a_init_ctxsw_ucode(struct gk20a *g) | |||
2330 | g->gr.ctx_vars.ucode.gpccs.inst.l, | 2330 | g->gr.ctx_vars.ucode.gpccs.inst.l, |
2331 | g->gr.ctx_vars.ucode.gpccs.data.l); | 2331 | g->gr.ctx_vars.ucode.gpccs.data.l); |
2332 | 2332 | ||
2333 | release_firmware(gpccs_fw); | 2333 | nvgpu_release_firmware(g, gpccs_fw); |
2334 | gpccs_fw = NULL; | 2334 | gpccs_fw = NULL; |
2335 | 2335 | ||
2336 | err = gr_gk20a_init_ctxsw_ucode_vaspace(g); | 2336 | err = gr_gk20a_init_ctxsw_ucode_vaspace(g); |
@@ -2345,9 +2345,9 @@ int gr_gk20a_init_ctxsw_ucode(struct gk20a *g) | |||
2345 | ucode_info->surface_desc.size, gk20a_mem_flag_none); | 2345 | ucode_info->surface_desc.size, gk20a_mem_flag_none); |
2346 | nvgpu_dma_free(g, &ucode_info->surface_desc); | 2346 | nvgpu_dma_free(g, &ucode_info->surface_desc); |
2347 | 2347 | ||
2348 | release_firmware(gpccs_fw); | 2348 | nvgpu_release_firmware(g, gpccs_fw); |
2349 | gpccs_fw = NULL; | 2349 | gpccs_fw = NULL; |
2350 | release_firmware(fecs_fw); | 2350 | nvgpu_release_firmware(g, fecs_fw); |
2351 | fecs_fw = NULL; | 2351 | fecs_fw = NULL; |
2352 | 2352 | ||
2353 | return err; | 2353 | return err; |
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c index 49b9e78d..0ca8851f 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | |||
@@ -16,7 +16,6 @@ | |||
16 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | 16 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
17 | */ | 17 | */ |
18 | 18 | ||
19 | #include <linux/firmware.h> | ||
20 | #include <linux/module.h> | 19 | #include <linux/module.h> |
21 | #include <linux/debugfs.h> | 20 | #include <linux/debugfs.h> |
22 | #include <linux/uaccess.h> | 21 | #include <linux/uaccess.h> |
@@ -27,6 +26,7 @@ | |||
27 | #include <nvgpu/dma.h> | 26 | #include <nvgpu/dma.h> |
28 | #include <nvgpu/log.h> | 27 | #include <nvgpu/log.h> |
29 | #include <nvgpu/bug.h> | 28 | #include <nvgpu/bug.h> |
29 | #include <nvgpu/firmware.h> | ||
30 | 30 | ||
31 | #include "gk20a.h" | 31 | #include "gk20a.h" |
32 | #include "gr_gk20a.h" | 32 | #include "gr_gk20a.h" |
@@ -3099,12 +3099,14 @@ static int pmu_queue_close(struct pmu_gk20a *pmu, | |||
3099 | 3099 | ||
3100 | void gk20a_remove_pmu_support(struct pmu_gk20a *pmu) | 3100 | void gk20a_remove_pmu_support(struct pmu_gk20a *pmu) |
3101 | { | 3101 | { |
3102 | struct gk20a *g = gk20a_from_pmu(pmu); | ||
3103 | |||
3102 | gk20a_dbg_fn(""); | 3104 | gk20a_dbg_fn(""); |
3103 | 3105 | ||
3104 | if (nvgpu_alloc_initialized(&pmu->dmem)) | 3106 | if (nvgpu_alloc_initialized(&pmu->dmem)) |
3105 | nvgpu_alloc_destroy(&pmu->dmem); | 3107 | nvgpu_alloc_destroy(&pmu->dmem); |
3106 | 3108 | ||
3107 | release_firmware(pmu->fw); | 3109 | nvgpu_release_firmware(g, pmu->fw); |
3108 | 3110 | ||
3109 | nvgpu_mutex_destroy(&pmu->elpg_mutex); | 3111 | nvgpu_mutex_destroy(&pmu->elpg_mutex); |
3110 | nvgpu_mutex_destroy(&pmu->pg_mutex); | 3112 | nvgpu_mutex_destroy(&pmu->pg_mutex); |
@@ -3157,7 +3159,7 @@ static int gk20a_prepare_ucode(struct gk20a *g) | |||
3157 | return gk20a_init_pmu(pmu); | 3159 | return gk20a_init_pmu(pmu); |
3158 | 3160 | ||
3159 | err_release_fw: | 3161 | err_release_fw: |
3160 | release_firmware(pmu->fw); | 3162 | nvgpu_release_firmware(g, pmu->fw); |
3161 | pmu->fw = NULL; | 3163 | pmu->fw = NULL; |
3162 | 3164 | ||
3163 | return err; | 3165 | return err; |
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h index 84161304..e7a8b7c2 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h | |||
@@ -25,6 +25,8 @@ | |||
25 | #include <nvgpu/flcnif_cmn.h> | 25 | #include <nvgpu/flcnif_cmn.h> |
26 | #include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h> | 26 | #include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h> |
27 | 27 | ||
28 | struct nvgpu_firmware; | ||
29 | |||
28 | /* defined by pmu hw spec */ | 30 | /* defined by pmu hw spec */ |
29 | #define GK20A_PMU_VA_SIZE (512 * 1024 * 1024) | 31 | #define GK20A_PMU_VA_SIZE (512 * 1024 * 1024) |
30 | #define GK20A_PMU_UCODE_SIZE_MAX (256 * 1024) | 32 | #define GK20A_PMU_UCODE_SIZE_MAX (256 * 1024) |
@@ -394,7 +396,7 @@ struct pmu_gk20a { | |||
394 | u32 aelpg_param[5]; | 396 | u32 aelpg_param[5]; |
395 | u32 override_done; | 397 | u32 override_done; |
396 | 398 | ||
397 | const struct firmware *fw; | 399 | struct nvgpu_firmware *fw; |
398 | }; | 400 | }; |
399 | 401 | ||
400 | int gk20a_init_pmu_support(struct gk20a *g); | 402 | int gk20a_init_pmu_support(struct gk20a *g); |
diff --git a/drivers/gpu/nvgpu/gm206/bios_gm206.c b/drivers/gpu/nvgpu/gm206/bios_gm206.c index 2c84ac62..f460a053 100644 --- a/drivers/gpu/nvgpu/gm206/bios_gm206.c +++ b/drivers/gpu/nvgpu/gm206/bios_gm206.c | |||
@@ -11,13 +11,13 @@ | |||
11 | * more details. | 11 | * more details. |
12 | */ | 12 | */ |
13 | 13 | ||
14 | #include <linux/firmware.h> | ||
15 | #include <linux/pci.h> | 14 | #include <linux/pci.h> |
16 | 15 | ||
17 | #include <nvgpu/bios.h> | 16 | #include <nvgpu/bios.h> |
18 | #include <nvgpu/kmem.h> | 17 | #include <nvgpu/kmem.h> |
19 | #include <nvgpu/nvgpu_common.h> | 18 | #include <nvgpu/nvgpu_common.h> |
20 | #include <nvgpu/timers.h> | 19 | #include <nvgpu/timers.h> |
20 | #include <nvgpu/firmware.h> | ||
21 | 21 | ||
22 | #include "gk20a/gk20a.h" | 22 | #include "gk20a/gk20a.h" |
23 | #include "gm20b/fifo_gm20b.h" | 23 | #include "gm20b/fifo_gm20b.h" |
@@ -249,7 +249,7 @@ int gm206_bios_init(struct gk20a *g) | |||
249 | unsigned int i; | 249 | unsigned int i; |
250 | struct gk20a_platform *platform = dev_get_drvdata(g->dev); | 250 | struct gk20a_platform *platform = dev_get_drvdata(g->dev); |
251 | struct dentry *d; | 251 | struct dentry *d; |
252 | const struct firmware *bios_fw; | 252 | struct nvgpu_firmware *bios_fw; |
253 | int err; | 253 | int err; |
254 | struct pci_dev *pdev = to_pci_dev(g->dev); | 254 | struct pci_dev *pdev = to_pci_dev(g->dev); |
255 | char rom_name[sizeof(BIOS_OVERLAY_NAME_FORMATTED)]; | 255 | char rom_name[sizeof(BIOS_OVERLAY_NAME_FORMATTED)]; |
@@ -273,7 +273,7 @@ int gm206_bios_init(struct gk20a *g) | |||
273 | memcpy(g->bios.data, &bios_fw->data[ROM_FILE_PAYLOAD_OFFSET], | 273 | memcpy(g->bios.data, &bios_fw->data[ROM_FILE_PAYLOAD_OFFSET], |
274 | g->bios.size); | 274 | g->bios.size); |
275 | 275 | ||
276 | release_firmware(bios_fw); | 276 | nvgpu_release_firmware(g, bios_fw); |
277 | } else { | 277 | } else { |
278 | gk20a_dbg_info("reading bios from EEPROM"); | 278 | gk20a_dbg_info("reading bios from EEPROM"); |
279 | g->bios.size = BIOS_SIZE; | 279 | g->bios.size = BIOS_SIZE; |
@@ -336,7 +336,7 @@ int gm206_bios_init(struct gk20a *g) | |||
336 | return 0; | 336 | return 0; |
337 | 337 | ||
338 | free_firmware: | 338 | free_firmware: |
339 | release_firmware(bios_fw); | 339 | nvgpu_release_firmware(g, bios_fw); |
340 | return err; | 340 | return err; |
341 | } | 341 | } |
342 | 342 | ||
diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c index c593dd7c..b6afa748 100644 --- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c | |||
@@ -11,7 +11,6 @@ | |||
11 | * more details. | 11 | * more details. |
12 | */ | 12 | */ |
13 | 13 | ||
14 | #include <linux/firmware.h> | ||
15 | #include <linux/debugfs.h> | 14 | #include <linux/debugfs.h> |
16 | 15 | ||
17 | #include <linux/platform/tegra/mc.h> | 16 | #include <linux/platform/tegra/mc.h> |
@@ -21,6 +20,7 @@ | |||
21 | #include <nvgpu/nvgpu_common.h> | 20 | #include <nvgpu/nvgpu_common.h> |
22 | #include <nvgpu/kmem.h> | 21 | #include <nvgpu/kmem.h> |
23 | #include <nvgpu/acr/nvgpu_acr.h> | 22 | #include <nvgpu/acr/nvgpu_acr.h> |
23 | #include <nvgpu/firmware.h> | ||
24 | 24 | ||
25 | #include "gk20a/gk20a.h" | 25 | #include "gk20a/gk20a.h" |
26 | #include "gk20a/pmu_gk20a.h" | 26 | #include "gk20a/pmu_gk20a.h" |
@@ -123,7 +123,7 @@ void gm20b_init_secure_pmu(struct gpu_ops *gops) | |||
123 | 123 | ||
124 | static int pmu_ucode_details(struct gk20a *g, struct flcn_ucode_img *p_img) | 124 | static int pmu_ucode_details(struct gk20a *g, struct flcn_ucode_img *p_img) |
125 | { | 125 | { |
126 | const struct firmware *pmu_fw, *pmu_desc, *pmu_sig; | 126 | struct nvgpu_firmware *pmu_fw, *pmu_desc, *pmu_sig; |
127 | struct pmu_gk20a *pmu = &g->pmu; | 127 | struct pmu_gk20a *pmu = &g->pmu; |
128 | struct lsf_ucode_desc *lsf_desc; | 128 | struct lsf_ucode_desc *lsf_desc; |
129 | int err; | 129 | int err; |
@@ -174,21 +174,21 @@ static int pmu_ucode_details(struct gk20a *g, struct flcn_ucode_img *p_img) | |||
174 | p_img->header = NULL; | 174 | p_img->header = NULL; |
175 | p_img->lsf_desc = (struct lsf_ucode_desc *)lsf_desc; | 175 | p_img->lsf_desc = (struct lsf_ucode_desc *)lsf_desc; |
176 | gm20b_dbg_pmu("requesting PMU ucode in GM20B exit\n"); | 176 | gm20b_dbg_pmu("requesting PMU ucode in GM20B exit\n"); |
177 | release_firmware(pmu_sig); | 177 | nvgpu_release_firmware(g, pmu_sig); |
178 | return 0; | 178 | return 0; |
179 | release_sig: | 179 | release_sig: |
180 | release_firmware(pmu_sig); | 180 | nvgpu_release_firmware(g, pmu_sig); |
181 | release_desc: | 181 | release_desc: |
182 | release_firmware(pmu_desc); | 182 | nvgpu_release_firmware(g, pmu_desc); |
183 | release_img_fw: | 183 | release_img_fw: |
184 | release_firmware(pmu_fw); | 184 | nvgpu_release_firmware(g, pmu_fw); |
185 | return err; | 185 | return err; |
186 | } | 186 | } |
187 | 187 | ||
188 | static int fecs_ucode_details(struct gk20a *g, struct flcn_ucode_img *p_img) | 188 | static int fecs_ucode_details(struct gk20a *g, struct flcn_ucode_img *p_img) |
189 | { | 189 | { |
190 | struct lsf_ucode_desc *lsf_desc; | 190 | struct lsf_ucode_desc *lsf_desc; |
191 | const struct firmware *fecs_sig; | 191 | struct nvgpu_firmware *fecs_sig; |
192 | int err; | 192 | int err; |
193 | 193 | ||
194 | fecs_sig = nvgpu_request_firmware(g, GM20B_FECS_UCODE_SIG, 0); | 194 | fecs_sig = nvgpu_request_firmware(g, GM20B_FECS_UCODE_SIG, 0); |
@@ -244,18 +244,18 @@ static int fecs_ucode_details(struct gk20a *g, struct flcn_ucode_img *p_img) | |||
244 | p_img->header = NULL; | 244 | p_img->header = NULL; |
245 | p_img->lsf_desc = (struct lsf_ucode_desc *)lsf_desc; | 245 | p_img->lsf_desc = (struct lsf_ucode_desc *)lsf_desc; |
246 | gm20b_dbg_pmu("fecs fw loaded\n"); | 246 | gm20b_dbg_pmu("fecs fw loaded\n"); |
247 | release_firmware(fecs_sig); | 247 | nvgpu_release_firmware(g, fecs_sig); |
248 | return 0; | 248 | return 0; |
249 | free_lsf_desc: | 249 | free_lsf_desc: |
250 | nvgpu_kfree(g, lsf_desc); | 250 | nvgpu_kfree(g, lsf_desc); |
251 | rel_sig: | 251 | rel_sig: |
252 | release_firmware(fecs_sig); | 252 | nvgpu_release_firmware(g, fecs_sig); |
253 | return err; | 253 | return err; |
254 | } | 254 | } |
255 | static int gpccs_ucode_details(struct gk20a *g, struct flcn_ucode_img *p_img) | 255 | static int gpccs_ucode_details(struct gk20a *g, struct flcn_ucode_img *p_img) |
256 | { | 256 | { |
257 | struct lsf_ucode_desc *lsf_desc; | 257 | struct lsf_ucode_desc *lsf_desc; |
258 | const struct firmware *gpccs_sig; | 258 | struct nvgpu_firmware *gpccs_sig; |
259 | int err; | 259 | int err; |
260 | 260 | ||
261 | if (g->ops.securegpccs == false) | 261 | if (g->ops.securegpccs == false) |
@@ -315,12 +315,12 @@ static int gpccs_ucode_details(struct gk20a *g, struct flcn_ucode_img *p_img) | |||
315 | p_img->header = NULL; | 315 | p_img->header = NULL; |
316 | p_img->lsf_desc = (struct lsf_ucode_desc *)lsf_desc; | 316 | p_img->lsf_desc = (struct lsf_ucode_desc *)lsf_desc; |
317 | gm20b_dbg_pmu("gpccs fw loaded\n"); | 317 | gm20b_dbg_pmu("gpccs fw loaded\n"); |
318 | release_firmware(gpccs_sig); | 318 | nvgpu_release_firmware(g, gpccs_sig); |
319 | return 0; | 319 | return 0; |
320 | free_lsf_desc: | 320 | free_lsf_desc: |
321 | nvgpu_kfree(g, lsf_desc); | 321 | nvgpu_kfree(g, lsf_desc); |
322 | rel_sig: | 322 | rel_sig: |
323 | release_firmware(gpccs_sig); | 323 | nvgpu_release_firmware(g, gpccs_sig); |
324 | return err; | 324 | return err; |
325 | } | 325 | } |
326 | 326 | ||
@@ -1070,7 +1070,7 @@ static int gm20b_bootstrap_hs_flcn(struct gk20a *g) | |||
1070 | u32 status, size; | 1070 | u32 status, size; |
1071 | u64 start; | 1071 | u64 start; |
1072 | struct acr_desc *acr = &g->acr; | 1072 | struct acr_desc *acr = &g->acr; |
1073 | const struct firmware *acr_fw = acr->acr_fw; | 1073 | struct nvgpu_firmware *acr_fw = acr->acr_fw; |
1074 | struct flcn_bl_dmem_desc *bl_dmem_desc = &acr->bl_dmem_desc; | 1074 | struct flcn_bl_dmem_desc *bl_dmem_desc = &acr->bl_dmem_desc; |
1075 | u32 *acr_ucode_header_t210_load; | 1075 | u32 *acr_ucode_header_t210_load; |
1076 | u32 *acr_ucode_data_t210_load; | 1076 | u32 *acr_ucode_data_t210_load; |
@@ -1169,7 +1169,7 @@ static int gm20b_bootstrap_hs_flcn(struct gk20a *g) | |||
1169 | err_free_ucode_map: | 1169 | err_free_ucode_map: |
1170 | nvgpu_dma_unmap_free(vm, &acr->acr_ucode); | 1170 | nvgpu_dma_unmap_free(vm, &acr->acr_ucode); |
1171 | err_release_acr_fw: | 1171 | err_release_acr_fw: |
1172 | release_firmware(acr_fw); | 1172 | nvgpu_release_firmware(g, acr_fw); |
1173 | acr->acr_fw = NULL; | 1173 | acr->acr_fw = NULL; |
1174 | return err; | 1174 | return err; |
1175 | } | 1175 | } |
@@ -1385,7 +1385,7 @@ int pmu_exec_gen_bl(struct gk20a *g, void *desc, u8 b_wait_for_halt) | |||
1385 | int err = 0; | 1385 | int err = 0; |
1386 | u32 bl_sz; | 1386 | u32 bl_sz; |
1387 | struct acr_desc *acr = &g->acr; | 1387 | struct acr_desc *acr = &g->acr; |
1388 | const struct firmware *hsbl_fw = acr->hsbl_fw; | 1388 | struct nvgpu_firmware *hsbl_fw = acr->hsbl_fw; |
1389 | struct hsflcn_bl_desc *pmu_bl_gm10x_desc; | 1389 | struct hsflcn_bl_desc *pmu_bl_gm10x_desc; |
1390 | u32 *pmu_bl_gm10x = NULL; | 1390 | u32 *pmu_bl_gm10x = NULL; |
1391 | gm20b_dbg_pmu(""); | 1391 | gm20b_dbg_pmu(""); |
@@ -1472,7 +1472,7 @@ err_unmap_bl: | |||
1472 | err_free_ucode: | 1472 | err_free_ucode: |
1473 | nvgpu_dma_free(g, &acr->hsbl_ucode); | 1473 | nvgpu_dma_free(g, &acr->hsbl_ucode); |
1474 | err_done: | 1474 | err_done: |
1475 | release_firmware(hsbl_fw); | 1475 | nvgpu_release_firmware(g, hsbl_fw); |
1476 | return err; | 1476 | return err; |
1477 | } | 1477 | } |
1478 | 1478 | ||
diff --git a/drivers/gpu/nvgpu/gp106/acr_gp106.c b/drivers/gpu/nvgpu/gp106/acr_gp106.c index da281077..c4045cb6 100644 --- a/drivers/gpu/nvgpu/gp106/acr_gp106.c +++ b/drivers/gpu/nvgpu/gp106/acr_gp106.c | |||
@@ -11,13 +11,13 @@ | |||
11 | * more details. | 11 | * more details. |
12 | */ | 12 | */ |
13 | 13 | ||
14 | #include <linux/firmware.h> | ||
15 | #include <linux/debugfs.h> | 14 | #include <linux/debugfs.h> |
16 | 15 | ||
17 | #include <nvgpu/nvgpu_common.h> | 16 | #include <nvgpu/nvgpu_common.h> |
18 | #include <nvgpu/kmem.h> | 17 | #include <nvgpu/kmem.h> |
19 | #include <nvgpu/dma.h> | 18 | #include <nvgpu/dma.h> |
20 | #include <nvgpu/acr/nvgpu_acr.h> | 19 | #include <nvgpu/acr/nvgpu_acr.h> |
20 | #include <nvgpu/firmware.h> | ||
21 | 21 | ||
22 | #include "gk20a/gk20a.h" | 22 | #include "gk20a/gk20a.h" |
23 | #include "gk20a/pmu_gk20a.h" | 23 | #include "gk20a/pmu_gk20a.h" |
@@ -137,7 +137,7 @@ void gp106_init_secure_pmu(struct gpu_ops *gops) | |||
137 | 137 | ||
138 | static int pmu_ucode_details(struct gk20a *g, struct flcn_ucode_img_v1 *p_img) | 138 | static int pmu_ucode_details(struct gk20a *g, struct flcn_ucode_img_v1 *p_img) |
139 | { | 139 | { |
140 | const struct firmware *pmu_fw, *pmu_desc, *pmu_sig; | 140 | struct nvgpu_firmware *pmu_fw, *pmu_desc, *pmu_sig; |
141 | struct pmu_gk20a *pmu = &g->pmu; | 141 | struct pmu_gk20a *pmu = &g->pmu; |
142 | struct lsf_ucode_desc_v1 *lsf_desc; | 142 | struct lsf_ucode_desc_v1 *lsf_desc; |
143 | int err; | 143 | int err; |
@@ -194,14 +194,14 @@ static int pmu_ucode_details(struct gk20a *g, struct flcn_ucode_img_v1 *p_img) | |||
194 | p_img->lsf_desc = (struct lsf_ucode_desc_v1 *)lsf_desc; | 194 | p_img->lsf_desc = (struct lsf_ucode_desc_v1 *)lsf_desc; |
195 | gp106_dbg_pmu("requesting PMU ucode in GM20B exit\n"); | 195 | gp106_dbg_pmu("requesting PMU ucode in GM20B exit\n"); |
196 | 196 | ||
197 | release_firmware(pmu_sig); | 197 | nvgpu_release_firmware(g, pmu_sig); |
198 | return 0; | 198 | return 0; |
199 | release_sig: | 199 | release_sig: |
200 | release_firmware(pmu_sig); | 200 | nvgpu_release_firmware(g, pmu_sig); |
201 | release_desc: | 201 | release_desc: |
202 | release_firmware(pmu_desc); | 202 | nvgpu_release_firmware(g, pmu_desc); |
203 | release_img_fw: | 203 | release_img_fw: |
204 | release_firmware(pmu_fw); | 204 | nvgpu_release_firmware(g, pmu_fw); |
205 | return err; | 205 | return err; |
206 | } | 206 | } |
207 | 207 | ||
@@ -209,7 +209,7 @@ static int fecs_ucode_details(struct gk20a *g, struct flcn_ucode_img_v1 *p_img) | |||
209 | { | 209 | { |
210 | u32 ver = g->gpu_characteristics.arch + g->gpu_characteristics.impl; | 210 | u32 ver = g->gpu_characteristics.arch + g->gpu_characteristics.impl; |
211 | struct lsf_ucode_desc_v1 *lsf_desc; | 211 | struct lsf_ucode_desc_v1 *lsf_desc; |
212 | const struct firmware *fecs_sig = NULL; | 212 | struct nvgpu_firmware *fecs_sig = NULL; |
213 | int err; | 213 | int err; |
214 | 214 | ||
215 | switch (ver) { | 215 | switch (ver) { |
@@ -279,12 +279,12 @@ static int fecs_ucode_details(struct gk20a *g, struct flcn_ucode_img_v1 *p_img) | |||
279 | p_img->header = NULL; | 279 | p_img->header = NULL; |
280 | p_img->lsf_desc = (struct lsf_ucode_desc_v1 *)lsf_desc; | 280 | p_img->lsf_desc = (struct lsf_ucode_desc_v1 *)lsf_desc; |
281 | gp106_dbg_pmu("fecs fw loaded\n"); | 281 | gp106_dbg_pmu("fecs fw loaded\n"); |
282 | release_firmware(fecs_sig); | 282 | nvgpu_release_firmware(g, fecs_sig); |
283 | return 0; | 283 | return 0; |
284 | free_lsf_desc: | 284 | free_lsf_desc: |
285 | nvgpu_kfree(g, lsf_desc); | 285 | nvgpu_kfree(g, lsf_desc); |
286 | rel_sig: | 286 | rel_sig: |
287 | release_firmware(fecs_sig); | 287 | nvgpu_release_firmware(g, fecs_sig); |
288 | return err; | 288 | return err; |
289 | } | 289 | } |
290 | 290 | ||
@@ -292,7 +292,7 @@ static int gpccs_ucode_details(struct gk20a *g, struct flcn_ucode_img_v1 *p_img) | |||
292 | { | 292 | { |
293 | u32 ver = g->gpu_characteristics.arch + g->gpu_characteristics.impl; | 293 | u32 ver = g->gpu_characteristics.arch + g->gpu_characteristics.impl; |
294 | struct lsf_ucode_desc_v1 *lsf_desc; | 294 | struct lsf_ucode_desc_v1 *lsf_desc; |
295 | const struct firmware *gpccs_sig = NULL; | 295 | struct nvgpu_firmware *gpccs_sig = NULL; |
296 | int err; | 296 | int err; |
297 | 297 | ||
298 | if (g->ops.securegpccs == false) | 298 | if (g->ops.securegpccs == false) |
@@ -366,12 +366,12 @@ static int gpccs_ucode_details(struct gk20a *g, struct flcn_ucode_img_v1 *p_img) | |||
366 | p_img->header = NULL; | 366 | p_img->header = NULL; |
367 | p_img->lsf_desc = (struct lsf_ucode_desc_v1 *)lsf_desc; | 367 | p_img->lsf_desc = (struct lsf_ucode_desc_v1 *)lsf_desc; |
368 | gp106_dbg_pmu("gpccs fw loaded\n"); | 368 | gp106_dbg_pmu("gpccs fw loaded\n"); |
369 | release_firmware(gpccs_sig); | 369 | nvgpu_release_firmware(g, gpccs_sig); |
370 | return 0; | 370 | return 0; |
371 | free_lsf_desc: | 371 | free_lsf_desc: |
372 | nvgpu_kfree(g, lsf_desc); | 372 | nvgpu_kfree(g, lsf_desc); |
373 | rel_sig: | 373 | rel_sig: |
374 | release_firmware(gpccs_sig); | 374 | nvgpu_release_firmware(g, gpccs_sig); |
375 | return err; | 375 | return err; |
376 | } | 376 | } |
377 | 377 | ||
@@ -1048,7 +1048,7 @@ static int gp106_bootstrap_hs_flcn(struct gk20a *g) | |||
1048 | u32 img_size_in_bytes = 0; | 1048 | u32 img_size_in_bytes = 0; |
1049 | u32 status; | 1049 | u32 status; |
1050 | struct acr_desc *acr = &g->acr; | 1050 | struct acr_desc *acr = &g->acr; |
1051 | const struct firmware *acr_fw = acr->acr_fw; | 1051 | struct nvgpu_firmware *acr_fw = acr->acr_fw; |
1052 | struct flcn_bl_dmem_desc_v1 *bl_dmem_desc = &acr->bl_dmem_desc_v1; | 1052 | struct flcn_bl_dmem_desc_v1 *bl_dmem_desc = &acr->bl_dmem_desc_v1; |
1053 | u32 *acr_ucode_header_t210_load; | 1053 | u32 *acr_ucode_header_t210_load; |
1054 | u32 *acr_ucode_data_t210_load; | 1054 | u32 *acr_ucode_data_t210_load; |
@@ -1167,7 +1167,7 @@ static int gp106_bootstrap_hs_flcn(struct gk20a *g) | |||
1167 | err_free_ucode_map: | 1167 | err_free_ucode_map: |
1168 | nvgpu_dma_unmap_free(vm, &acr->acr_ucode); | 1168 | nvgpu_dma_unmap_free(vm, &acr->acr_ucode); |
1169 | err_release_acr_fw: | 1169 | err_release_acr_fw: |
1170 | release_firmware(acr_fw); | 1170 | nvgpu_release_firmware(g, acr_fw); |
1171 | acr->acr_fw = NULL; | 1171 | acr->acr_fw = NULL; |
1172 | return err; | 1172 | return err; |
1173 | } | 1173 | } |
diff --git a/drivers/gpu/nvgpu/include/nvgpu/acr/nvgpu_acr.h b/drivers/gpu/nvgpu/include/nvgpu/acr/nvgpu_acr.h index 6991a0ba..3844362d 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/acr/nvgpu_acr.h +++ b/drivers/gpu/nvgpu/include/nvgpu/acr/nvgpu_acr.h | |||
@@ -21,6 +21,8 @@ | |||
21 | #include "acr_objlsfm.h" | 21 | #include "acr_objlsfm.h" |
22 | #include "acr_objflcn.h" | 22 | #include "acr_objflcn.h" |
23 | 23 | ||
24 | struct nvgpu_firmware; | ||
25 | |||
24 | #define MAX_SUPPORTED_LSFM 3 /*PMU, FECS, GPCCS*/ | 26 | #define MAX_SUPPORTED_LSFM 3 /*PMU, FECS, GPCCS*/ |
25 | 27 | ||
26 | #define ACR_COMPLETION_TIMEOUT_MS 10000 /*in msec */ | 28 | #define ACR_COMPLETION_TIMEOUT_MS 10000 /*in msec */ |
@@ -74,20 +76,20 @@ struct acr_desc { | |||
74 | struct bin_hdr *hsbin_hdr; | 76 | struct bin_hdr *hsbin_hdr; |
75 | struct acr_fw_header *fw_hdr; | 77 | struct acr_fw_header *fw_hdr; |
76 | u32 pmu_args; | 78 | u32 pmu_args; |
77 | const struct firmware *acr_fw; | 79 | struct nvgpu_firmware *acr_fw; |
78 | union{ | 80 | union{ |
79 | struct flcn_acr_desc *acr_dmem_desc; | 81 | struct flcn_acr_desc *acr_dmem_desc; |
80 | struct flcn_acr_desc_v1 *acr_dmem_desc_v1; | 82 | struct flcn_acr_desc_v1 *acr_dmem_desc_v1; |
81 | }; | 83 | }; |
82 | struct nvgpu_mem acr_ucode; | 84 | struct nvgpu_mem acr_ucode; |
83 | const struct firmware *hsbl_fw; | 85 | struct nvgpu_firmware *hsbl_fw; |
84 | struct nvgpu_mem hsbl_ucode; | 86 | struct nvgpu_mem hsbl_ucode; |
85 | union { | 87 | union { |
86 | struct flcn_bl_dmem_desc bl_dmem_desc; | 88 | struct flcn_bl_dmem_desc bl_dmem_desc; |
87 | struct flcn_bl_dmem_desc_v1 bl_dmem_desc_v1; | 89 | struct flcn_bl_dmem_desc_v1 bl_dmem_desc_v1; |
88 | }; | 90 | }; |
89 | const struct firmware *pmu_fw; | 91 | struct nvgpu_firmware *pmu_fw; |
90 | const struct firmware *pmu_desc; | 92 | struct nvgpu_firmware *pmu_desc; |
91 | u32 capabilities; | 93 | u32 capabilities; |
92 | }; | 94 | }; |
93 | 95 | ||
diff --git a/drivers/gpu/nvgpu/include/nvgpu/firmware.h b/drivers/gpu/nvgpu/include/nvgpu/firmware.h new file mode 100644 index 00000000..cf206dc2 --- /dev/null +++ b/drivers/gpu/nvgpu/include/nvgpu/firmware.h | |||
@@ -0,0 +1,66 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms and conditions of the GNU General Public License, | ||
6 | * version 2, as published by the Free Software Foundation. | ||
7 | * | ||
8 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
11 | * more details. | ||
12 | * | ||
13 | * You should have received a copy of the GNU General Public License | ||
14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
15 | */ | ||
16 | |||
17 | #ifndef _NVGPU_FIRMWARE_H_ | ||
18 | #define _NVGPU_FIRMWARE_H_ | ||
19 | |||
20 | struct gk20a; | ||
21 | |||
22 | #define NVGPU_REQUEST_FIRMWARE_NO_WARN (1UL << 0) | ||
23 | #define NVGPU_REQUEST_FIRMWARE_NO_SOC (1UL << 1) | ||
24 | |||
25 | struct nvgpu_firmware { | ||
26 | u8 *data; | ||
27 | size_t size; | ||
28 | }; | ||
29 | |||
30 | /** | ||
31 | * nvgpu_request_firmware - load a firmware blob from filesystem. | ||
32 | * | ||
33 | * @g The GPU driver struct for device to load firmware for | ||
34 | * @fw_name The base name of the firmware file. | ||
35 | * @flags Flags for loading; | ||
36 | * | ||
37 | * NVGPU_REQUEST_FIRMWARE_NO_WARN: Do not display warning on | ||
38 | * failed load. | ||
39 | * | ||
40 | * NVGPU_REQUEST_FIRMWARE_NO_SOC: Do not attempt loading from | ||
41 | * path <SOC_NAME>. | ||
42 | * | ||
43 | * nvgpu_request_firmware() will load firmware from: | ||
44 | * | ||
45 | * <system firmware load path>/<GPU name>/<fw_name> | ||
46 | * | ||
47 | * If that fails and NO_SOC is not enabled, it'll try next from: | ||
48 | * | ||
49 | * <system firmware load path>/<SOC name>/<fw_name> | ||
50 | * | ||
51 | * It'll allocate a nvgpu_firmware structure and initializes it and returns | ||
52 | * it to caller. | ||
53 | */ | ||
54 | struct nvgpu_firmware *nvgpu_request_firmware(struct gk20a *g, | ||
55 | const char *fw_name, | ||
56 | int flags); | ||
57 | |||
58 | /** | ||
59 | * nvgpu_release_firmware - free firmware and associated nvgpu_firmware blob | ||
60 | * | ||
61 | * @g The GPU driver struct for device to free firmware for | ||
62 | * @fw The firmware to free. fw blob will also be freed. | ||
63 | */ | ||
64 | void nvgpu_release_firmware(struct gk20a *g, struct nvgpu_firmware *fw); | ||
65 | |||
66 | #endif | ||
diff --git a/drivers/gpu/nvgpu/include/nvgpu/nvgpu_common.h b/drivers/gpu/nvgpu/include/nvgpu/nvgpu_common.h index 85b4a3df..2a9e4f99 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/nvgpu_common.h +++ b/drivers/gpu/nvgpu/include/nvgpu/nvgpu_common.h | |||
@@ -25,11 +25,4 @@ int nvgpu_probe(struct gk20a *g, | |||
25 | const char *interface_name, | 25 | const char *interface_name, |
26 | struct class *class); | 26 | struct class *class); |
27 | 27 | ||
28 | #define NVGPU_REQUEST_FIRMWARE_NO_WARN BIT(0) | ||
29 | #define NVGPU_REQUEST_FIRMWARE_NO_SOC BIT(1) | ||
30 | |||
31 | const struct firmware *nvgpu_request_firmware(struct gk20a *g, | ||
32 | const char *fw_name, | ||
33 | int flags); | ||
34 | |||
35 | #endif | 28 | #endif |