gpu: nvgpu: support PCI device 0x1e3f

Add PCI device ID for 0x1e3f and also add gk20a_platform data for same

Jira NVGPUT-42

Change-Id: I3a6fb8ac4378d45add09795134da8fd3b174ac56
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1699311
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 43 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/common/linux/pci.c b/drivers/gpu/nvgpu/common/linux/pci.c
index 74f08704..c19ced7c 100644
--- a/drivers/gpu/nvgpu/common/linux/pci.c
+++ b/drivers/gpu/nvgpu/common/linux/pci.c
@@ -349,6 +349,43 @@ static struct gk20a_platform nvgpu_pci_device[] = {
         .hardcode_sw_threshold = false,
         .run_preos = true,
         },
+        { /* SKU 0x1e3f */
+        /* ptimer src frequency in hz */
+        .ptimer_src_freq        = 31250000,
+
+        .probe = nvgpu_pci_tegra_probe,
+        .remove = nvgpu_pci_tegra_remove,
+
+        /* power management configuration */
+        .railgate_delay_init    = 500,
+        .can_railgate_init      = false,
+        .can_elpg_init = false,
+        .enable_elpg = false,
+        .enable_elcg = false,
+        .enable_slcg = false,
+        .enable_blcg = false,
+        .enable_mscg = false,
+        .can_slcg    = false,
+        .can_blcg    = false,
+        .can_elcg    = false,
+        .default_pri_timeout = 0x3ff,
+
+        .disable_aspm = true,
+
+        /* power management callbacks */
+        .is_railgated = nvgpu_pci_tegra_is_railgated,
+        .clk_round_rate = nvgpu_pci_clk_round_rate,
+
+        /*
+         * WAR: PCIE X1 is very slow, set to very high value till nvlink is up
+         */
+        .ch_wdt_timeout_ms = 30000,
+
+        .honors_aperture = true,
+        .vbios_min_version = 0x1,
+        .hardcode_sw_threshold = false,
+        .unified_memory = false,
+        },
 };
 
 static struct pci_device_id nvgpu_pci_table[] = {
@@ -400,6 +437,12 @@ static struct pci_device_id nvgpu_pci_table[] = {
                 .class_mask = 0xff << 16,
                 .driver_data = 7,
         },
+        {
+                PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, 0x1e3f),
+                .class = PCI_BASE_CLASS_DISPLAY << 16,
+                .class_mask = 0xff << 16,
+                .driver_data = 8,
+        },
         {}
 };