gpu: nvgpu: add get_iova_addr() for gp10b

Add platform specific gp10b_mm_iova_addr() to get
iova/phys address for gp10b

If SMMU is not enabled and IO coherence flag is set,
set 34th bit in the physical address and return the
physical address

If SMMU is enabled, return the iova address

Bug 1605653

Change-Id: I5c91a8c8d85d8a8e422406e3c91fc1dda3cb0870
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/713106
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

2 files changed, 31 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c b/drivers/gpu/nvgpu/gp10b/mm_gp10b.c
index 9fde6147..c316aa9f 100644
--- a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/mm_gp10b.c
@@ -111,6 +111,33 @@ static int gb10b_init_bar2_mm_hw_setup(struct gk20a *g)
         gk20a_dbg_fn("done");
         return 0;
 }
+
+static u64 gp10b_mm_phys_addr_translate(struct gk20a *g, u64 phys_addr,
+                u32 flags)
+{
+        if (!device_is_iommuable(dev_from_gk20a(g)))
+                if (flags & NVGPU_AS_MAP_BUFFER_FLAGS_IO_COHERENT)
+                        return phys_addr |
+                                1ULL << NVGPU_MM_GET_IO_COHERENCE_BIT;
+
+        return phys_addr;
+}
+
+static u64 gp10b_mm_iova_addr(struct gk20a *g, struct scatterlist *sgl,
+                u32 flags)
+{
+        if (!device_is_iommuable(dev_from_gk20a(g)))
+                return gp10b_mm_phys_addr_translate(g, sg_phys(sgl), flags);
+
+        if (sg_dma_address(sgl) == 0)
+                return gp10b_mm_phys_addr_translate(g, sg_phys(sgl), flags);
+
+        if (sg_dma_address(sgl) == DMA_ERROR_CODE)
+                return 0;
+
+        return gk20a_mm_smmu_vaddr_translate(g, sg_dma_address(sgl));
+}
+
 void gp10b_init_mm(struct gpu_ops *gops)
 {
         gm20b_init_mm(gops);
@@ -118,4 +145,5 @@ void gp10b_init_mm(struct gpu_ops *gops)
         gops->mm.init_mm_setup_hw = gp10b_init_mm_setup_hw;
         gops->mm.init_bar2_vm = gb10b_init_bar2_vm;
         gops->mm.init_bar2_mm_hw_setup = gb10b_init_bar2_mm_hw_setup;
+        gops->mm.get_iova_addr = gp10b_mm_iova_addr;
 }
diff --git a/drivers/gpu/nvgpu/gp10b/mm_gp10b.h b/drivers/gpu/nvgpu/gp10b/mm_gp10b.h
index 38ca93a4..034944e0 100644
--- a/drivers/gpu/nvgpu/gp10b/mm_gp10b.h
+++ b/drivers/gpu/nvgpu/gp10b/mm_gp10b.h
@@ -13,6 +13,9 @@
 
 #ifndef MM_GP10B_H
 #define MM_GP10B_H
+
+#define NVGPU_MM_GET_IO_COHERENCE_BIT   35
+
 struct gpu_ops;
 
 void gp10b_init_mm(struct gpu_ops *gops);