diff options
| author | Peter Boonstoppel <pboonstoppel@nvidia.com> | 2016-12-12 20:00:55 -0500 |
|---|---|---|
| committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2016-12-20 18:15:51 -0500 |
| commit | 8ccfe2569c924c5f13f09baf54cedcc6d04fc18b (patch) | |
| tree | 4399517440e2ca79b9f9cab374c190895db53f8c /drivers | |
| parent | 339a67b2e84cea20a59334b0640b9ab7e0d75ca9 (diff) | |
gpu: nvgpu: gm20b pass correct clk to tegra_dvfs
Restoring original behavior. Use gbus instead of gpu_ref clk as the
argument to tegra_dvfs_get_fmax_at_vmin_safe_t(). Bug was introduced
due to refactoring in 01e61860fafbc0ee045c2db931a79f6c0d5300aa,
changing behavior when nvgpu is compiled with
CONFIG_TEGRA_CLK_FRAMEWORK.
Bug 200233943
Change-Id: Id2deec0107bd0c26a12feb511db22fc69e09a985
Signed-off-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-on: http://git-master/r/1269848
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com>
Tested-by: Jonathan Hunter <jonathanh@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/nvgpu/gm20b/clk_gm20b.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/clk_gm20b.c b/drivers/gpu/nvgpu/gm20b/clk_gm20b.c index 25503ea1..501be537 100644 --- a/drivers/gpu/nvgpu/gm20b/clk_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/clk_gm20b.c | |||
| @@ -1155,8 +1155,7 @@ static int gm20b_init_clk_setup_sw(struct gk20a *g) | |||
| 1155 | clk->gpc_pll.id = GK20A_GPC_PLL; | 1155 | clk->gpc_pll.id = GK20A_GPC_PLL; |
| 1156 | clk->gpc_pll.clk_in = clk_get_rate(ref) / KHZ; | 1156 | clk->gpc_pll.clk_in = clk_get_rate(ref) / KHZ; |
| 1157 | 1157 | ||
| 1158 | safe_rate = tegra_dvfs_get_fmax_at_vmin_safe_t( | 1158 | safe_rate = tegra_dvfs_get_fmax_at_vmin_safe_t(c); |
| 1159 | clk_get_parent(c)); | ||
| 1160 | safe_rate = safe_rate * (100 - DVFS_SAFE_MARGIN) / 100; | 1159 | safe_rate = safe_rate * (100 - DVFS_SAFE_MARGIN) / 100; |
| 1161 | dvfs_safe_max_freq = rate_gpu_to_gpc2clk(safe_rate); | 1160 | dvfs_safe_max_freq = rate_gpu_to_gpc2clk(safe_rate); |
| 1162 | clk->gpc_pll.PL = (dvfs_safe_max_freq == 0) ? 0 : | 1161 | clk->gpc_pll.PL = (dvfs_safe_max_freq == 0) ? 0 : |