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authorSeema Khowala <seemaj@nvidia.com>2016-10-13 18:17:01 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2016-10-17 17:45:51 -0400
commit8b34e4c6a8c2e8d162833e943f67ff072b0b7ecb (patch)
tree861a2f8ea602e63c0167819bb7383865dc360311 /drivers
parent37f317a3c4033b54ab4bf47286fb9ebd48edb021 (diff)
gpu: nvgpu: gv11b: header update for CL#37320141
Hardware header updates for CL#37320141 JIRA GV11B-27 JIRA GV11B-7 JIRA GV11B-8 JIRA GV11B-9 Change-Id: I54d467f42d4074d1d9ae912f6d46ab2e323f69bc Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: http://git-master/r/1236263 GVS: Gerrit_Virtual_Submit Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/nvgpu/gv11b/hw_gmmu_gv11b.h2
-rw-r--r--drivers/gpu/nvgpu/gv11b/hw_gr_gv11b.h96
-rw-r--r--drivers/gpu/nvgpu/gv11b/hw_ltc_gv11b.h20
-rw-r--r--drivers/gpu/nvgpu/gv11b/hw_mc_gv11b.h4
-rw-r--r--drivers/gpu/nvgpu/gv11b/hw_ram_gv11b.h16
5 files changed, 47 insertions, 91 deletions
diff --git a/drivers/gpu/nvgpu/gv11b/hw_gmmu_gv11b.h b/drivers/gpu/nvgpu/gv11b/hw_gmmu_gv11b.h
index 8c324225..f5e146c4 100644
--- a/drivers/gpu/nvgpu/gv11b/hw_gmmu_gv11b.h
+++ b/drivers/gpu/nvgpu/gv11b/hw_gmmu_gv11b.h
@@ -1182,7 +1182,7 @@ static inline u32 gmmu_pte_kind_c64_ms2_2cbr_v(void)
1182{ 1182{
1183 return 0x000000ec; 1183 return 0x000000ec;
1184} 1184}
1185static inline u32 gmmu_pte_kind_c64_ms2_2cbra_v(void) 1185static inline u32 gmmu_pte_kind_c64_ms2_4cbra_v(void)
1186{ 1186{
1187 return 0x000000cd; 1187 return 0x000000cd;
1188} 1188}
diff --git a/drivers/gpu/nvgpu/gv11b/hw_gr_gv11b.h b/drivers/gpu/nvgpu/gv11b/hw_gr_gv11b.h
index c58ee6ba..a5e93058 100644
--- a/drivers/gpu/nvgpu/gv11b/hw_gr_gv11b.h
+++ b/drivers/gpu/nvgpu/gv11b/hw_gr_gv11b.h
@@ -2676,7 +2676,7 @@ static inline u32 gr_gpcs_swdx_dss_zbc_color_a_val_f(u32 v)
2676} 2676}
2677static inline u32 gr_gpcs_swdx_dss_zbc_c_01_to_04_format_r(void) 2677static inline u32 gr_gpcs_swdx_dss_zbc_c_01_to_04_format_r(void)
2678{ 2678{
2679 return 0x00500100; 2679 return 0x00418100;
2680} 2680}
2681static inline u32 gr_gpcs_swdx_dss_zbc_z_r(u32 i) 2681static inline u32 gr_gpcs_swdx_dss_zbc_z_r(u32 i)
2682{ 2682{
@@ -2688,7 +2688,19 @@ static inline u32 gr_gpcs_swdx_dss_zbc_z_val_f(u32 v)
2688} 2688}
2689static inline u32 gr_gpcs_swdx_dss_zbc_z_01_to_04_format_r(void) 2689static inline u32 gr_gpcs_swdx_dss_zbc_z_01_to_04_format_r(void)
2690{ 2690{
2691 return 0x0050014c; 2691 return 0x0041814c;
2692}
2693static inline u32 gr_gpcs_swdx_dss_zbc_s_r(u32 i)
2694{
2695 return 0x0041815c + i*4;
2696}
2697static inline u32 gr_gpcs_swdx_dss_zbc_s_val_f(u32 v)
2698{
2699 return (v & 0xff) << 0;
2700}
2701static inline u32 gr_gpcs_swdx_dss_zbc_s_01_to_04_format_r(void)
2702{
2703 return 0x00418198;
2692} 2704}
2693static inline u32 gr_gpcs_setup_attrib_cb_base_r(void) 2705static inline u32 gr_gpcs_setup_attrib_cb_base_r(void)
2694{ 2706{
@@ -3114,14 +3126,6 @@ static inline u32 gr_gpc0_tpc0_sm0_hww_global_esr_multiple_warp_errors_pending_f
3114{ 3126{
3115 return 0x4; 3127 return 0x4;
3116} 3128}
3117static inline u32 gr_gpc0_tpc0_tex_m_hww_esr_r(void)
3118{
3119 return 0x00504224;
3120}
3121static inline u32 gr_gpc0_tpc0_tex_m_hww_esr_intr_pending_f(void)
3122{
3123 return 0x1;
3124}
3125static inline u32 gr_gpc0_tpc0_sm0_hww_warp_esr_r(void) 3129static inline u32 gr_gpc0_tpc0_sm0_hww_warp_esr_r(void)
3126{ 3130{
3127 return 0x00504730; 3131 return 0x00504730;
@@ -3294,78 +3298,6 @@ static inline u32 gr_zcull_subregion_qty_v(void)
3294{ 3298{
3295 return 0x00000010; 3299 return 0x00000010;
3296} 3300}
3297static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter_control_sel0_r(void)
3298{
3299 return 0x00504308;
3300}
3301static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter_control_sel1_r(void)
3302{
3303 return 0x0050430c;
3304}
3305static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter_control0_r(void)
3306{
3307 return 0x00504318;
3308}
3309static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter_control1_r(void)
3310{
3311 return 0x00504320;
3312}
3313static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter_control2_r(void)
3314{
3315 return 0x00504324;
3316}
3317static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter_control3_r(void)
3318{
3319 return 0x00504328;
3320}
3321static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter_control4_r(void)
3322{
3323 return 0x0050432c;
3324}
3325static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter_control5_r(void)
3326{
3327 return 0x0050431c;
3328}
3329static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter0_control_r(void)
3330{
3331 return 0x00504378;
3332}
3333static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter1_control_r(void)
3334{
3335 return 0x0050437c;
3336}
3337static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter2_control_r(void)
3338{
3339 return 0x00504380;
3340}
3341static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter3_control_r(void)
3342{
3343 return 0x00504384;
3344}
3345static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter4_control_r(void)
3346{
3347 return 0x00504388;
3348}
3349static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter5_control_r(void)
3350{
3351 return 0x0050438c;
3352}
3353static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter6_control_r(void)
3354{
3355 return 0x00504390;
3356}
3357static inline u32 gr_pri_gpc0_tpc0_sm_dsm_perf_counter7_control_r(void)
3358{
3359 return 0x00504394;
3360}
3361static inline u32 gr_pri_gpc0_tpc0_sm0_dsm_perf_counter_status_s1_r(void)
3362{
3363 return 0x00504744;
3364}
3365static inline u32 gr_pri_gpc0_tpc0_sm0_dsm_perf_counter_status1_r(void)
3366{
3367 return 0x00504750;
3368}
3369static inline u32 gr_fe_pwr_mode_r(void) 3301static inline u32 gr_fe_pwr_mode_r(void)
3370{ 3302{
3371 return 0x00404170; 3303 return 0x00404170;
diff --git a/drivers/gpu/nvgpu/gv11b/hw_ltc_gv11b.h b/drivers/gpu/nvgpu/gv11b/hw_ltc_gv11b.h
index 4c10852e..6968c699 100644
--- a/drivers/gpu/nvgpu/gv11b/hw_ltc_gv11b.h
+++ b/drivers/gpu/nvgpu/gv11b/hw_ltc_gv11b.h
@@ -246,6 +246,26 @@ static inline u32 ltc_ltcs_ltss_dstg_zbc_depth_clear_value_field_v(u32 r)
246{ 246{
247 return (r >> 0) & 0xffffffff; 247 return (r >> 0) & 0xffffffff;
248} 248}
249static inline u32 ltc_ltcs_ltss_dstg_zbc_stencil_clear_value_r(void)
250{
251 return 0x0017e204;
252}
253static inline u32 ltc_ltcs_ltss_dstg_zbc_stencil_clear_value_field_s(void)
254{
255 return 8;
256}
257static inline u32 ltc_ltcs_ltss_dstg_zbc_stencil_clear_value_field_f(u32 v)
258{
259 return (v & 0xff) << 0;
260}
261static inline u32 ltc_ltcs_ltss_dstg_zbc_stencil_clear_value_field_m(void)
262{
263 return 0xff << 0;
264}
265static inline u32 ltc_ltcs_ltss_dstg_zbc_stencil_clear_value_field_v(u32 r)
266{
267 return (r >> 0) & 0xff;
268}
249static inline u32 ltc_ltcs_ltss_tstg_set_mgmt_2_r(void) 269static inline u32 ltc_ltcs_ltss_tstg_set_mgmt_2_r(void)
250{ 270{
251 return 0x0017e2b0; 271 return 0x0017e2b0;
diff --git a/drivers/gpu/nvgpu/gv11b/hw_mc_gv11b.h b/drivers/gpu/nvgpu/gv11b/hw_mc_gv11b.h
index 7fe4d158..98bec43a 100644
--- a/drivers/gpu/nvgpu/gv11b/hw_mc_gv11b.h
+++ b/drivers/gpu/nvgpu/gv11b/hw_mc_gv11b.h
@@ -78,6 +78,10 @@ static inline u32 mc_intr_pfifo_pending_f(void)
78{ 78{
79 return 0x100; 79 return 0x100;
80} 80}
81static inline u32 mc_intr_hub_pending_f(void)
82{
83 return 0x200;
84}
81static inline u32 mc_intr_pgraph_pending_f(void) 85static inline u32 mc_intr_pgraph_pending_f(void)
82{ 86{
83 return 0x1000; 87 return 0x1000;
diff --git a/drivers/gpu/nvgpu/gv11b/hw_ram_gv11b.h b/drivers/gpu/nvgpu/gv11b/hw_ram_gv11b.h
index 868e4ad9..46772ff4 100644
--- a/drivers/gpu/nvgpu/gv11b/hw_ram_gv11b.h
+++ b/drivers/gpu/nvgpu/gv11b/hw_ram_gv11b.h
@@ -498,19 +498,23 @@ static inline u32 ram_fc_acquire_w(void)
498{ 498{
499 return 12; 499 return 12;
500} 500}
501static inline u32 ram_fc_semaphorea_w(void) 501static inline u32 ram_fc_sem_addr_hi_w(void)
502{ 502{
503 return 14; 503 return 14;
504} 504}
505static inline u32 ram_fc_semaphoreb_w(void) 505static inline u32 ram_fc_sem_addr_lo_w(void)
506{ 506{
507 return 15; 507 return 15;
508} 508}
509static inline u32 ram_fc_semaphorec_w(void) 509static inline u32 ram_fc_sem_payload_lo_w(void)
510{ 510{
511 return 16; 511 return 16;
512} 512}
513static inline u32 ram_fc_semaphored_w(void) 513static inline u32 ram_fc_sem_payload_hi_w(void)
514{
515 return 39;
516}
517static inline u32 ram_fc_sem_execute_w(void)
514{ 518{
515 return 17; 519 return 17;
516} 520}
@@ -554,10 +558,6 @@ static inline u32 ram_fc_subdevice_w(void)
554{ 558{
555 return 37; 559 return 37;
556} 560}
557static inline u32 ram_fc_formats_w(void)
558{
559 return 39;
560}
561static inline u32 ram_fc_allowed_syncpoints_w(void) 561static inline u32 ram_fc_allowed_syncpoints_w(void)
562{ 562{
563 return 58; 563 return 58;