gpu: nvgpu: handle timestamp buffer full ctxsw_intr0

If enabled, fecs trace updating happens from ucode
side even when there is no fecs trace dumper application
to consume it. Due to this, trace buffer will get
eventually full and ucode will trigger ctxsw_intr0.
Reset fecs_trace buffer to handle timestamp buffer full
ctxsw_intr0.

Bug 2361571
Bug 200472922

Change-Id: Ia26a17635fc6bd6e8663b8af983acc91839ecfcd
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1965370
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
(cherry picked from commit 790ba095543b33f4cc3a145559ad31a1e9f99d98)
Reviewed-on: https://git-master.nvidia.com/r/1979746
GVS: Gerrit_Virtual_Submit
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
Tested-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

4 files changed, 24 insertions, 2 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/fecs_trace_gk20a.c b/drivers/gpu/nvgpu/gk20a/fecs_trace_gk20a.c
index b30d1743..cac3ce27 100644
--- a/drivers/gpu/nvgpu/gk20a/fecs_trace_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fecs_trace_gk20a.c
@@ -634,4 +634,12 @@ bool gk20a_fecs_trace_is_enabled(struct gk20a *g)
 
         return (trace && nvgpu_thread_is_running(&trace->poll_task));
 }
+
+void gk20a_fecs_trace_reset_buffer(struct gk20a *g)
+{
+        nvgpu_log(g, gpu_dbg_fn|gpu_dbg_ctxsw, " ");
+
+        gk20a_fecs_trace_set_read_index(g,
+                gk20a_fecs_trace_get_write_index(g));
+}
 #endif /* CONFIG_GK20A_CTXSW_TRACE */
diff --git a/drivers/gpu/nvgpu/gk20a/fecs_trace_gk20a.h b/drivers/gpu/nvgpu/gk20a/fecs_trace_gk20a.h
index cbde2fe7..d33e619b 100644
--- a/drivers/gpu/nvgpu/gk20a/fecs_trace_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/fecs_trace_gk20a.h
@@ -40,5 +40,6 @@ int gk20a_fecs_trace_enable(struct gk20a *g);
 int gk20a_fecs_trace_disable(struct gk20a *g);
 bool gk20a_fecs_trace_is_enabled(struct gk20a *g);
 size_t gk20a_fecs_trace_buffer_size(struct gk20a *g);
+void gk20a_fecs_trace_reset_buffer(struct gk20a *g);
 
 #endif /* NVGPU_GK20A_FECS_TRACE_GK20A_H */
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index 8d65f90a..4541134f 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -5308,9 +5308,20 @@ int gk20a_gr_handle_fecs_error(struct gk20a *g, struct channel_gk20a *ch,
                 gr_fecs_host_int_status_ctxsw_intr_f(CTXSW_INTR0)) != 0U) {
                 u32 mailbox_value = gk20a_readl(g, gr_fecs_ctxsw_mailbox_r(6));
 
-                nvgpu_err(g, "ctxsw intr0 set by ucode, error_code: 0x%08x",
+                if (mailbox_value == MAILBOX_VALUE_TIMESTAMP_BUFFER_FULL) {
+                        nvgpu_info(g, "ctxsw intr0 set by ucode, "
+                                        "timestamp buffer full");
+#ifdef CONFIG_GK20A_CTXSW_TRACE
+                        gk20a_fecs_trace_reset_buffer(g);
+#else
+                        ret = -1;
+#endif
+                } else {
+                        nvgpu_err(g,
+                          "ctxsw intr0 set by ucode, error_code: 0x%08x",
                           mailbox_value);
-                ret = -1;
+                        ret = -1;
+                }
         } else {
                 nvgpu_err(g,
                         "unhandled fecs error interrupt 0x%08x for channel %u",
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
index 25850104..9ccd555a 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
@@ -69,6 +69,8 @@
 #define CTXSW_INTR0                             BIT32(0)
 #define CTXSW_INTR1                             BIT32(1)
 
+#define MAILBOX_VALUE_TIMESTAMP_BUFFER_FULL     0x26
+
 struct tsg_gk20a;
 struct channel_gk20a;
 struct nvgpu_warpstate;