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authorTerje Bergstrom <tbergstrom@nvidia.com>2017-03-17 12:55:43 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-03-20 19:40:02 -0400
commit866fee02478eb9db7978a81618b601eb717d4799 (patch)
tree119d9db1a65266ef758b2a925bbd20bae557a2c1 /drivers
parent74fe1caa2b56aab24c17ad4dd2524128fc237894 (diff)
gpu: nvgpu: Remove ELPG_FLUSH
ELPG_FLUSH is not accessible in later GPUs, so we stopped using it and instead do explicit CBC and L2 flushes. Delete the unused function op and backing code. Change-Id: Ic3eb97f2d32ea8fdbe5ec57bd9254268caaf9935 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1323236 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.h1
-rw-r--r--drivers/gpu/nvgpu/gk20a/ltc_gk20a.c39
-rw-r--r--drivers/gpu/nvgpu/gm20b/ltc_gm20b.c49
-rw-r--r--drivers/gpu/nvgpu/gm20b/ltc_gm20b.h1
-rw-r--r--drivers/gpu/nvgpu/gp10b/ltc_gp10b.c1
5 files changed, 0 insertions, 91 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 3ba05e84..95730b4e 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -148,7 +148,6 @@ struct gpu_ops {
148 void (*init_cbc)(struct gk20a *g, struct gr_gk20a *gr); 148 void (*init_cbc)(struct gk20a *g, struct gr_gk20a *gr);
149 void (*sync_debugfs)(struct gk20a *g); 149 void (*sync_debugfs)(struct gk20a *g);
150 void (*init_fs_state)(struct gk20a *g); 150 void (*init_fs_state)(struct gk20a *g);
151 void (*elpg_flush)(struct gk20a *g);
152 void (*isr)(struct gk20a *g); 151 void (*isr)(struct gk20a *g);
153 u32 (*cbc_fix_config)(struct gk20a *g, int base); 152 u32 (*cbc_fix_config)(struct gk20a *g, int base);
154 void (*flush)(struct gk20a *g); 153 void (*flush)(struct gk20a *g);
diff --git a/drivers/gpu/nvgpu/gk20a/ltc_gk20a.c b/drivers/gpu/nvgpu/gk20a/ltc_gk20a.c
index 5db48ae7..34a96971 100644
--- a/drivers/gpu/nvgpu/gk20a/ltc_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/ltc_gk20a.c
@@ -189,44 +189,6 @@ static void gk20a_ltc_isr(struct gk20a *g)
189 gk20a_writel(g, ltc_ltc0_ltss_intr_r(), intr); 189 gk20a_writel(g, ltc_ltc0_ltss_intr_r(), intr);
190} 190}
191 191
192/* Flushes the compression bit cache as well as "data".
193 * Note: the name here is a bit of a misnomer. ELPG uses this
194 * internally... but ELPG doesn't have to be on to do it manually.
195 */
196static void gk20a_mm_g_elpg_flush_locked(struct gk20a *g)
197{
198 u32 data;
199 s32 retry = 100;
200
201 gk20a_dbg_fn("");
202
203 trace_gk20a_mm_g_elpg_flush_locked(dev_name(g->dev));
204
205 /* Make sure all previous writes are committed to the L2. There's no
206 guarantee that writes are to DRAM. This will be a sysmembar internal
207 to the L2. */
208 gk20a_writel(g, ltc_ltcs_ltss_g_elpg_r(),
209 ltc_ltcs_ltss_g_elpg_flush_pending_f());
210 do {
211 data = gk20a_readl(g, ltc_ltc0_ltss_g_elpg_r());
212
213 if (ltc_ltc0_ltss_g_elpg_flush_v(data) ==
214 ltc_ltc0_ltss_g_elpg_flush_pending_v()) {
215 gk20a_dbg_info("g_elpg_flush 0x%x", data);
216 retry--;
217 udelay(5);
218 } else
219 break;
220 } while (retry >= 0 || !tegra_platform_is_silicon());
221
222 if (tegra_platform_is_silicon() && retry < 0)
223 gk20a_warn(dev_from_gk20a(g),
224 "g_elpg_flush too many retries");
225
226 trace_gk20a_mm_g_elpg_flush_locked_done(dev_name(g->dev));
227
228}
229
230static int gk20a_determine_L2_size_bytes(struct gk20a *g) 192static int gk20a_determine_L2_size_bytes(struct gk20a *g)
231{ 193{
232 u32 lts_per_ltc; 194 u32 lts_per_ltc;
@@ -279,7 +241,6 @@ void gk20a_init_ltc(struct gpu_ops *gops)
279#ifdef CONFIG_DEBUG_FS 241#ifdef CONFIG_DEBUG_FS
280 gops->ltc.sync_debugfs = gk20a_ltc_sync_debugfs; 242 gops->ltc.sync_debugfs = gk20a_ltc_sync_debugfs;
281#endif 243#endif
282 gops->ltc.elpg_flush = gk20a_mm_g_elpg_flush_locked;
283 gops->ltc.init_fs_state = gk20a_ltc_init_fs_state; 244 gops->ltc.init_fs_state = gk20a_ltc_init_fs_state;
284 gops->ltc.isr = gk20a_ltc_isr; 245 gops->ltc.isr = gk20a_ltc_isr;
285} 246}
diff --git a/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c b/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c
index 11258032..8c1be1d1 100644
--- a/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c
@@ -221,54 +221,6 @@ void gm20b_ltc_isr(struct gk20a *g)
221 } 221 }
222} 222}
223 223
224void gm20b_ltc_g_elpg_flush_locked(struct gk20a *g)
225{
226 u32 data;
227 bool done[g->ltc_count];
228 s32 retry = 100;
229 unsigned int i;
230 unsigned int num_done = 0;
231 u32 ltc_d = ltc_ltc1_ltss_g_elpg_r() - ltc_ltc0_ltss_g_elpg_r();
232
233 gk20a_dbg_fn("");
234
235 trace_gk20a_mm_g_elpg_flush_locked(dev_name(g->dev));
236
237 for (i = 0; i < g->ltc_count; i++)
238 done[i] = 0;
239
240 gk20a_writel(g, ltc_ltcs_ltss_g_elpg_r(),
241 ltc_ltcs_ltss_g_elpg_flush_pending_f());
242 do {
243 for (i = 0; i < g->ltc_count; i++) {
244 if (done[i])
245 continue;
246
247 data = gk20a_readl(g,
248 ltc_ltc0_ltss_g_elpg_r() + ltc_d * i);
249
250 if (ltc_ltc0_ltss_g_elpg_flush_v(data)) {
251 gk20a_dbg_info("g_elpg_flush 0x%x", data);
252 } else {
253 done[i] = 1;
254 num_done++;
255 }
256 }
257
258 if (num_done < g->ltc_count) {
259 retry--;
260 udelay(5);
261 } else
262 break;
263 } while (retry >= 0 || !tegra_platform_is_silicon());
264
265 if (retry < 0 && tegra_platform_is_silicon())
266 gk20a_warn(dev_from_gk20a(g),
267 "g_elpg_flush too many retries");
268
269 trace_gk20a_mm_g_elpg_flush_locked_done(dev_name(g->dev));
270}
271
272u32 gm20b_ltc_cbc_fix_config(struct gk20a *g, int base) 224u32 gm20b_ltc_cbc_fix_config(struct gk20a *g, int base)
273{ 225{
274 u32 val = gk20a_readl(g, ltc_ltcs_ltss_cbc_num_active_ltcs_r()); 226 u32 val = gk20a_readl(g, ltc_ltcs_ltss_cbc_num_active_ltcs_r());
@@ -412,7 +364,6 @@ void gm20b_init_ltc(struct gpu_ops *gops)
412 gops->ltc.init_fs_state = gm20b_ltc_init_fs_state; 364 gops->ltc.init_fs_state = gm20b_ltc_init_fs_state;
413 gops->ltc.init_comptags = gm20b_ltc_init_comptags; 365 gops->ltc.init_comptags = gm20b_ltc_init_comptags;
414 gops->ltc.cbc_ctrl = gm20b_ltc_cbc_ctrl; 366 gops->ltc.cbc_ctrl = gm20b_ltc_cbc_ctrl;
415 gops->ltc.elpg_flush = gm20b_ltc_g_elpg_flush_locked;
416 gops->ltc.isr = gm20b_ltc_isr; 367 gops->ltc.isr = gm20b_ltc_isr;
417 gops->ltc.cbc_fix_config = gm20b_ltc_cbc_fix_config; 368 gops->ltc.cbc_fix_config = gm20b_ltc_cbc_fix_config;
418 gops->ltc.flush = gm20b_flush_ltc; 369 gops->ltc.flush = gm20b_flush_ltc;
diff --git a/drivers/gpu/nvgpu/gm20b/ltc_gm20b.h b/drivers/gpu/nvgpu/gm20b/ltc_gm20b.h
index 288e193a..fcd263de 100644
--- a/drivers/gpu/nvgpu/gm20b/ltc_gm20b.h
+++ b/drivers/gpu/nvgpu/gm20b/ltc_gm20b.h
@@ -21,7 +21,6 @@ void gm20b_init_ltc(struct gpu_ops *gops);
21void gm20b_ltc_init_fs_state(struct gk20a *g); 21void gm20b_ltc_init_fs_state(struct gk20a *g);
22int gm20b_ltc_cbc_ctrl(struct gk20a *g, enum gk20a_cbc_op op, 22int gm20b_ltc_cbc_ctrl(struct gk20a *g, enum gk20a_cbc_op op,
23 u32 min, u32 max); 23 u32 min, u32 max);
24void gm20b_ltc_g_elpg_flush_locked(struct gk20a *g);
25void gm20b_ltc_isr(struct gk20a *g); 24void gm20b_ltc_isr(struct gk20a *g);
26u32 gm20b_ltc_cbc_fix_config(struct gk20a *g, int base); 25u32 gm20b_ltc_cbc_fix_config(struct gk20a *g, int base);
27void gm20b_flush_ltc(struct gk20a *g); 26void gm20b_flush_ltc(struct gk20a *g);
diff --git a/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c b/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c
index c429bcc2..9a11d90b 100644
--- a/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/ltc_gp10b.c
@@ -216,7 +216,6 @@ void gp10b_init_ltc(struct gpu_ops *gops)
216 gops->ltc.init_fs_state = gp10b_ltc_init_fs_state; 216 gops->ltc.init_fs_state = gp10b_ltc_init_fs_state;
217 gops->ltc.init_comptags = gp10b_ltc_init_comptags; 217 gops->ltc.init_comptags = gp10b_ltc_init_comptags;
218 gops->ltc.cbc_ctrl = gm20b_ltc_cbc_ctrl; 218 gops->ltc.cbc_ctrl = gm20b_ltc_cbc_ctrl;
219 gops->ltc.elpg_flush = gm20b_ltc_g_elpg_flush_locked;
220 gops->ltc.isr = gp10b_ltc_isr; 219 gops->ltc.isr = gp10b_ltc_isr;
221 gops->ltc.cbc_fix_config = gm20b_ltc_cbc_fix_config; 220 gops->ltc.cbc_fix_config = gm20b_ltc_cbc_fix_config;
222 gops->ltc.flush = gm20b_flush_ltc; 221 gops->ltc.flush = gm20b_flush_ltc;