gpu: nvgpu: use map_offset for PTE size computation

Make sure that map_offset is set to the fixed map address or 0)
before determining PTE size. Then use map_offset instead of
offset_align for computing the PTE size since offset_align
could be either an alignment ora fixed mapping offset.

Also is the minimum of the buffer size and the buffer alignment
for computing page size. This is necessary is the GMMU is doing
page gathering (i.e the buffer does not appear as a continguous
IOMMU range to the GPU). Is such cases a large page sized buffer
may be made up of a bunch of discontiguous 4k pages.

Bug 1396644
Bug 1729947

Change-Id: I6464ee6a4ccab2495ccb31cd1ddf1db467d2b215
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1271359
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 5 insertions, 2 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
index 0e3eabc7..cdbaef79 100644
--- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
@@ -2479,9 +2479,12 @@ u64 gk20a_vm_map(struct vm_gk20a *vm,
                 goto clean_up;
         }
 
-        bfr.align = gk20a_mm_get_align(g, sgl, aperture);
+        if (flags & NVGPU_AS_MAP_BUFFER_FLAGS_FIXED_OFFSET)
+                map_offset = offset_align;
 
-        bfr.pgsz_idx = -1;
+        bfr.align = gk20a_mm_get_align(g, sgl, aperture);
+        bfr.pgsz_idx = __get_pte_size(vm, map_offset,
+                                      min_t(u64, bfr.size, bfr.align));
         mapping_size = mapping_size ? mapping_size : bfr.size;
 
         if (vm->big_pages)