diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2017-11-10 13:53:51 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-11-14 18:46:58 -0500 |
commit | 744d5a5212936fd453bacc46be52e6aeef076a69 (patch) | |
tree | 50f99f03f549241c6cf47702075449feb8d70ec5 /drivers | |
parent | 5944f49f558370966d1ab943b2ec91afcdfd782d (diff) |
gpu: nvgpu: vgpu: Implement clk.get_maxfreq
Modify HAL clk->get_maxfreq() signature to match the one in
clk->set_rate() and clk->get_rate(). It allows support of multiple
clocks.
Implement clk.get_maxfreq operation for vgpu and use it to
fill max_freq field in GPU characteristics query.
JIRA NVGPU-388
Change-Id: I93bfc2aa76e38b8a5e0ac55d87c4e26df6fea77f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1597329
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/clk.c | 16 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.c | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/clk_gm20b.c | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/clk_vgpu.c | 8 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/vgpu/vgpu.c | 2 |
6 files changed, 25 insertions, 7 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/clk.c b/drivers/gpu/nvgpu/common/linux/clk.c index a9888590..ea5b023d 100644 --- a/drivers/gpu/nvgpu/common/linux/clk.c +++ b/drivers/gpu/nvgpu/common/linux/clk.c | |||
@@ -106,9 +106,21 @@ static int nvgpu_linux_predict_mv_at_hz_cur_tfloor(struct clk_gk20a *clk, | |||
106 | clk_get_parent(clk->tegra_clk), rate); | 106 | clk_get_parent(clk->tegra_clk), rate); |
107 | } | 107 | } |
108 | 108 | ||
109 | static unsigned long nvgpu_linux_get_maxrate(struct clk_gk20a *clk) | 109 | static unsigned long nvgpu_linux_get_maxrate(struct gk20a *g, u32 api_domain) |
110 | { | 110 | { |
111 | return tegra_dvfs_get_maxrate(clk_get_parent(clk->tegra_clk)); | 111 | int ret; |
112 | |||
113 | switch (api_domain) { | ||
114 | case CTRL_CLK_DOMAIN_GPCCLK: | ||
115 | ret = tegra_dvfs_get_maxrate(clk_get_parent(g->clk.tegra_clk)); | ||
116 | break; | ||
117 | default: | ||
118 | nvgpu_err(g, "unknown clock: %u", api_domain); | ||
119 | ret = 0; | ||
120 | break; | ||
121 | } | ||
122 | |||
123 | return ret; | ||
112 | } | 124 | } |
113 | 125 | ||
114 | static int nvgpu_linux_prepare_enable(struct clk_gk20a *clk) | 126 | static int nvgpu_linux_prepare_enable(struct clk_gk20a *clk) |
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c index ab3d86be..8f67da69 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gk20a.c | |||
@@ -466,7 +466,7 @@ int gk20a_init_gpu_characteristics(struct gk20a *g) | |||
466 | gpu->cbc_comptags_per_line = g->gr.comptags_per_cacheline; | 466 | gpu->cbc_comptags_per_line = g->gr.comptags_per_cacheline; |
467 | 467 | ||
468 | if (g->ops.clk.get_maxrate) | 468 | if (g->ops.clk.get_maxrate) |
469 | gpu->max_freq = g->ops.clk.get_maxrate(&g->clk); | 469 | gpu->max_freq = g->ops.clk.get_maxrate(g, CTRL_CLK_DOMAIN_GPCCLK); |
470 | 470 | ||
471 | gpu->local_video_memory_size = g->mm.vidmem.size; | 471 | gpu->local_video_memory_size = g->mm.vidmem.size; |
472 | 472 | ||
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 4bc5c04b..fb12d0d2 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -880,7 +880,7 @@ struct gpu_ops { | |||
880 | u32 (*get_ref_clock_rate)(struct gk20a *g); | 880 | u32 (*get_ref_clock_rate)(struct gk20a *g); |
881 | int (*predict_mv_at_hz_cur_tfloor)(struct clk_gk20a *clk, | 881 | int (*predict_mv_at_hz_cur_tfloor)(struct clk_gk20a *clk, |
882 | unsigned long rate); | 882 | unsigned long rate); |
883 | unsigned long (*get_maxrate)(struct clk_gk20a *clk); | 883 | unsigned long (*get_maxrate)(struct gk20a *g, u32 api_domain); |
884 | int (*prepare_enable)(struct clk_gk20a *clk); | 884 | int (*prepare_enable)(struct clk_gk20a *clk); |
885 | void (*disable_unprepare)(struct clk_gk20a *clk); | 885 | void (*disable_unprepare)(struct clk_gk20a *clk); |
886 | int (*get_voltage)(struct clk_gk20a *clk, u64 *val); | 886 | int (*get_voltage)(struct clk_gk20a *clk, u64 *val); |
diff --git a/drivers/gpu/nvgpu/gm20b/clk_gm20b.c b/drivers/gpu/nvgpu/gm20b/clk_gm20b.c index a74209cf..61d3b6f5 100644 --- a/drivers/gpu/nvgpu/gm20b/clk_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/clk_gm20b.c | |||
@@ -1273,7 +1273,7 @@ long gm20b_round_rate(struct clk_gk20a *clk, unsigned long rate, | |||
1273 | unsigned long maxrate; | 1273 | unsigned long maxrate; |
1274 | struct gk20a *g = clk->g; | 1274 | struct gk20a *g = clk->g; |
1275 | 1275 | ||
1276 | maxrate = g->ops.clk.get_maxrate(clk); | 1276 | maxrate = g->ops.clk.get_maxrate(g, CTRL_CLK_DOMAIN_GPCCLK); |
1277 | if (rate > maxrate) | 1277 | if (rate > maxrate) |
1278 | rate = maxrate; | 1278 | rate = maxrate; |
1279 | 1279 | ||
diff --git a/drivers/gpu/nvgpu/vgpu/clk_vgpu.c b/drivers/gpu/nvgpu/vgpu/clk_vgpu.c index 39a8e618..e4ad8f68 100644 --- a/drivers/gpu/nvgpu/vgpu/clk_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/clk_vgpu.c | |||
@@ -92,10 +92,18 @@ static int vgpu_clk_set_rate(struct gk20a *g, | |||
92 | return err; | 92 | return err; |
93 | } | 93 | } |
94 | 94 | ||
95 | static unsigned long vgpu_clk_get_maxrate(struct gk20a *g, u32 api_domain) | ||
96 | { | ||
97 | struct vgpu_priv_data *priv = vgpu_get_priv_data(g); | ||
98 | |||
99 | return priv->constants.max_freq; | ||
100 | } | ||
101 | |||
95 | void vgpu_init_clk_support(struct gk20a *g) | 102 | void vgpu_init_clk_support(struct gk20a *g) |
96 | { | 103 | { |
97 | g->ops.clk.get_rate = vgpu_clk_get_rate; | 104 | g->ops.clk.get_rate = vgpu_clk_get_rate; |
98 | g->ops.clk.set_rate = vgpu_clk_set_rate; | 105 | g->ops.clk.set_rate = vgpu_clk_set_rate; |
106 | g->ops.clk.get_maxrate = vgpu_clk_get_maxrate; | ||
99 | } | 107 | } |
100 | 108 | ||
101 | long vgpu_clk_round_rate(struct device *dev, unsigned long rate) | 109 | long vgpu_clk_round_rate(struct device *dev, unsigned long rate) |
diff --git a/drivers/gpu/nvgpu/vgpu/vgpu.c b/drivers/gpu/nvgpu/vgpu/vgpu.c index 6a9e986b..1153b540 100644 --- a/drivers/gpu/nvgpu/vgpu/vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/vgpu.c | |||
@@ -359,7 +359,6 @@ static void vgpu_detect_chip(struct gk20a *g) | |||
359 | 359 | ||
360 | int vgpu_init_gpu_characteristics(struct gk20a *g) | 360 | int vgpu_init_gpu_characteristics(struct gk20a *g) |
361 | { | 361 | { |
362 | struct vgpu_priv_data *priv = vgpu_get_priv_data(g); | ||
363 | int err; | 362 | int err; |
364 | 363 | ||
365 | gk20a_dbg_fn(""); | 364 | gk20a_dbg_fn(""); |
@@ -368,7 +367,6 @@ int vgpu_init_gpu_characteristics(struct gk20a *g) | |||
368 | if (err) | 367 | if (err) |
369 | return err; | 368 | return err; |
370 | 369 | ||
371 | g->gpu_characteristics.max_freq = priv->constants.max_freq; | ||
372 | __nvgpu_set_enabled(g, NVGPU_SUPPORT_MAP_BUFFER_BATCH, false); | 370 | __nvgpu_set_enabled(g, NVGPU_SUPPORT_MAP_BUFFER_BATCH, false); |
373 | 371 | ||
374 | /* features vgpu does not support */ | 372 | /* features vgpu does not support */ |