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authorMahantesh Kumbar <mkumbar@nvidia.com>2016-02-26 04:57:44 -0500
committerTerje Bergstrom <tbergstrom@nvidia.com>2016-02-26 15:28:11 -0500
commit6d585840ad5887407512dd292698100df50e5eed (patch)
tree1eb6b007ee498b9567ae01ce7b89b2cac4aab902 /drivers
parentde66bf2869b0ad1e29753d088a6c967270624f57 (diff)
gpu: nvgpu: Enable ELPG when disabled due to reset
Enable ELPG back whenever ELPG disable is done due to reset or recovery. Otherwise elpg_refcnt mismatch doesn't engage ELPG correctly Bug 200156347 Bug 1716764 Change-Id: I9284bb52b32fe911bb8eb260f138b616f4a564be Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1020617 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/nvgpu/gk20a/fifo_gk20a.c5
-rw-r--r--drivers/gpu/nvgpu/gk20a/gr_gk20a.h10
2 files changed, 11 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
index 337a9584..769960af 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
@@ -793,6 +793,8 @@ void gk20a_fifo_reset_engine(struct gk20a *g, u32 engine_id)
793 /* resetting engine using mc_enable_r() is not 793 /* resetting engine using mc_enable_r() is not
794 enough, we do full init sequence */ 794 enough, we do full init sequence */
795 gk20a_gr_reset(g); 795 gk20a_gr_reset(g);
796 if (support_gk20a_pmu(g->dev) && g->elpg_enabled)
797 gk20a_pmu_enable_elpg(g);
796 } 798 }
797 if (engine_id == top_device_info_type_enum_copy0_v()) 799 if (engine_id == top_device_info_type_enum_copy0_v())
798 gk20a_reset(g, mc_enable_ce2_m()); 800 gk20a_reset(g, mc_enable_ce2_m());
@@ -1099,7 +1101,7 @@ static bool gk20a_fifo_handle_mmu_fault(
1099 " deferring channel recovery to channel free"); 1101 " deferring channel recovery to channel free");
1100 /* clear interrupt */ 1102 /* clear interrupt */
1101 gk20a_writel(g, fifo_intr_mmu_fault_id_r(), fault_id); 1103 gk20a_writel(g, fifo_intr_mmu_fault_id_r(), fault_id);
1102 return verbose; 1104 goto exit_enable;
1103 } 1105 }
1104 1106
1105 /* clear interrupt */ 1107 /* clear interrupt */
@@ -1114,6 +1116,7 @@ static bool gk20a_fifo_handle_mmu_fault(
1114 gr_gpfifo_ctl_access_enabled_f() | 1116 gr_gpfifo_ctl_access_enabled_f() |
1115 gr_gpfifo_ctl_semaphore_access_enabled_f()); 1117 gr_gpfifo_ctl_semaphore_access_enabled_f());
1116 1118
1119exit_enable:
1117 /* It is safe to enable ELPG again. */ 1120 /* It is safe to enable ELPG again. */
1118 if (support_gk20a_pmu(g->dev) && g->elpg_enabled) 1121 if (support_gk20a_pmu(g->dev) && g->elpg_enabled)
1119 gk20a_pmu_enable_elpg(g); 1122 gk20a_pmu_enable_elpg(g);
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
index 9c37fd02..326b4f96 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
@@ -458,11 +458,15 @@ void gk20a_gr_clear_sm_hww(struct gk20a *g,
458#define gr_gk20a_elpg_protected_call(g, func) \ 458#define gr_gk20a_elpg_protected_call(g, func) \
459 ({ \ 459 ({ \
460 int err = 0; \ 460 int err = 0; \
461 if (support_gk20a_pmu(g->dev)) \ 461 if (support_gk20a_pmu(g->dev) && g->elpg_enabled) {\
462 err = gk20a_pmu_disable_elpg(g); \ 462 err = gk20a_pmu_disable_elpg(g); \
463 if (err) return err; \ 463 if (err) { \
464 gk20a_pmu_enable_elpg(g); \
465 return err; \
466 } \
467 } \
464 err = func; \ 468 err = func; \
465 if (support_gk20a_pmu(g->dev)) \ 469 if (support_gk20a_pmu(g->dev) && g->elpg_enabled) \
466 gk20a_pmu_enable_elpg(g); \ 470 gk20a_pmu_enable_elpg(g); \
467 err; \ 471 err; \
468 }) 472 })