diff options
author | Vijayakumar <vsubbu@nvidia.com> | 2015-08-19 03:05:29 -0400 |
---|---|---|
committer | Deepak Nibade <dnibade@nvidia.com> | 2016-12-27 04:52:07 -0500 |
commit | 6b2bfcbfe7f4134b7b640cdc61b250d27de5311f (patch) | |
tree | 514126585112d023675c0dc192442b9f631cd079 /drivers | |
parent | 8ae3f0ac28c3ee754ff7bbfe3f75b73e6ab33836 (diff) |
gpu: nvgpu: update t186 slcg prod settings
bug 1675413
work around for timestamp slcg bug
Change-Id: I0950403b89e9ea161bd7eb7052f47de3f9733240
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/785854
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/gp10b_gating_reglist.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/nvgpu/gp10b/gp10b_gating_reglist.c b/drivers/gpu/nvgpu/gp10b/gp10b_gating_reglist.c index f8ee80c3..fbf146a2 100644 --- a/drivers/gpu/nvgpu/gp10b/gp10b_gating_reglist.c +++ b/drivers/gpu/nvgpu/gp10b/gp10b_gating_reglist.c | |||
@@ -35,7 +35,7 @@ static const struct gating_desc gp10b_slcg_bus[] = { | |||
35 | 35 | ||
36 | /* slcg ce2 */ | 36 | /* slcg ce2 */ |
37 | static const struct gating_desc gp10b_slcg_ce2[] = { | 37 | static const struct gating_desc gp10b_slcg_ce2[] = { |
38 | {.addr = 0x00106f28, .prod = 0x00000000, .disable = 0x000007fe}, | 38 | {.addr = 0x00104204, .prod = 0x00000000, .disable = 0x000007fe}, |
39 | }; | 39 | }; |
40 | 40 | ||
41 | /* slcg chiplet */ | 41 | /* slcg chiplet */ |
@@ -59,7 +59,7 @@ static const struct gating_desc gp10b_slcg_fifo[] = { | |||
59 | 59 | ||
60 | /* slcg gr */ | 60 | /* slcg gr */ |
61 | static const struct gating_desc gp10b_slcg_gr[] = { | 61 | static const struct gating_desc gp10b_slcg_gr[] = { |
62 | {.addr = 0x004041f4, .prod = 0x00000000, .disable = 0x03fffffe}, | 62 | {.addr = 0x004041f4, .prod = 0x00000002, .disable = 0x03fffffe}, |
63 | {.addr = 0x0040917c, .prod = 0x00020008, .disable = 0x0003fffe}, | 63 | {.addr = 0x0040917c, .prod = 0x00020008, .disable = 0x0003fffe}, |
64 | {.addr = 0x00409894, .prod = 0x00000040, .disable = 0x03fffffe}, | 64 | {.addr = 0x00409894, .prod = 0x00000040, .disable = 0x03fffffe}, |
65 | {.addr = 0x004078c4, .prod = 0x00000000, .disable = 0x000001fe}, | 65 | {.addr = 0x004078c4, .prod = 0x00000000, .disable = 0x000001fe}, |
@@ -136,14 +136,14 @@ static const struct gating_desc gp10b_slcg_priring[] = { | |||
136 | static const struct gating_desc gp10b_slcg_pwr_csb[] = { | 136 | static const struct gating_desc gp10b_slcg_pwr_csb[] = { |
137 | {.addr = 0x00000134, .prod = 0x00020008, .disable = 0x0003fffe}, | 137 | {.addr = 0x00000134, .prod = 0x00020008, .disable = 0x0003fffe}, |
138 | {.addr = 0x00000e74, .prod = 0x00000000, .disable = 0x0000000f}, | 138 | {.addr = 0x00000e74, .prod = 0x00000000, .disable = 0x0000000f}, |
139 | {.addr = 0x00000a74, .prod = 0x00000000, .disable = 0x00007ffe}, | 139 | {.addr = 0x00000a74, .prod = 0x00004000, .disable = 0x00007ffe}, |
140 | {.addr = 0x000016b8, .prod = 0x00000000, .disable = 0x0000000f}, | 140 | {.addr = 0x000016b8, .prod = 0x00000000, .disable = 0x0000000f}, |
141 | }; | 141 | }; |
142 | 142 | ||
143 | /* slcg pmu */ | 143 | /* slcg pmu */ |
144 | static const struct gating_desc gp10b_slcg_pmu[] = { | 144 | static const struct gating_desc gp10b_slcg_pmu[] = { |
145 | {.addr = 0x0010a134, .prod = 0x00020008, .disable = 0x0003fffe}, | 145 | {.addr = 0x0010a134, .prod = 0x00020008, .disable = 0x0003fffe}, |
146 | {.addr = 0x0010aa74, .prod = 0x00000000, .disable = 0x00007ffe}, | 146 | {.addr = 0x0010aa74, .prod = 0x00004000, .disable = 0x00007ffe}, |
147 | {.addr = 0x0010ae74, .prod = 0x00000000, .disable = 0x0000000f}, | 147 | {.addr = 0x0010ae74, .prod = 0x00000000, .disable = 0x0000000f}, |
148 | }; | 148 | }; |
149 | 149 | ||
@@ -192,7 +192,7 @@ static const struct gating_desc gp10b_blcg_gr[] = { | |||
192 | {.addr = 0x00405860, .prod = 0x0000c242, .disable = 0x00000000}, | 192 | {.addr = 0x00405860, .prod = 0x0000c242, .disable = 0x00000000}, |
193 | {.addr = 0x0040590c, .prod = 0x0000c444, .disable = 0x00000000}, | 193 | {.addr = 0x0040590c, .prod = 0x0000c444, .disable = 0x00000000}, |
194 | {.addr = 0x00408040, .prod = 0x0000c444, .disable = 0x00000000}, | 194 | {.addr = 0x00408040, .prod = 0x0000c444, .disable = 0x00000000}, |
195 | {.addr = 0x00407000, .prod = 0x4000c141, .disable = 0x00000000}, | 195 | {.addr = 0x00407000, .prod = 0x4000c242, .disable = 0x00000000}, |
196 | {.addr = 0x00405bf0, .prod = 0x0000c444, .disable = 0x00000000}, | 196 | {.addr = 0x00405bf0, .prod = 0x0000c444, .disable = 0x00000000}, |
197 | {.addr = 0x0041a890, .prod = 0x0000427f, .disable = 0x00000000}, | 197 | {.addr = 0x0041a890, .prod = 0x0000427f, .disable = 0x00000000}, |
198 | {.addr = 0x0041a8b0, .prod = 0x0000007f, .disable = 0x00000000}, | 198 | {.addr = 0x0041a8b0, .prod = 0x0000007f, .disable = 0x00000000}, |