diff options
author | Sunny He <suhe@nvidia.com> | 2017-06-28 18:59:14 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-07-06 13:54:57 -0400 |
commit | 64076b4b214b45fe8367e467dd6796a9bcc058a4 (patch) | |
tree | 4d0fa3536fa188ec1f12f4349440b998cb608b77 /drivers | |
parent | 75d7d6826dea130d5eb5ac86f1ca54bd9b05fbe1 (diff) |
gpu: nvgpu: Reorg misc HAL initialization
Reorganize HAL initialization to remove inheritance and construct
the gpu_ops struct at compile time. This patch covers the lone
function pointers of the gpu_ops struct.
Perform HAL function assignments in hal_gxxxx.c through the
population of a chip-specific copy of gpu_ops.
Jira NVGPU-74
Change-Id: I30d379bf52709c8382c9d7aa87f1672ca0f89c6f
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master/r/1510386
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/nvgpu/gm206/bios_gm206.c | 5 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/hal_gm20b.c | 142 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp106/hal_gp106.c | 140 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gp10b/hal_gp10b.c | 146 |
4 files changed, 223 insertions, 210 deletions
diff --git a/drivers/gpu/nvgpu/gm206/bios_gm206.c b/drivers/gpu/nvgpu/gm206/bios_gm206.c index 13f5023a..bcc46c83 100644 --- a/drivers/gpu/nvgpu/gm206/bios_gm206.c +++ b/drivers/gpu/nvgpu/gm206/bios_gm206.c | |||
@@ -266,8 +266,3 @@ free_firmware: | |||
266 | nvgpu_release_firmware(g, bios_fw); | 266 | nvgpu_release_firmware(g, bios_fw); |
267 | return err; | 267 | return err; |
268 | } | 268 | } |
269 | |||
270 | void gm206_init_bios_ops(struct gpu_ops *gops) | ||
271 | { | ||
272 | gops->bios_init = gm206_bios_init; | ||
273 | } | ||
diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c index d22caab8..4d2e56d5 100644 --- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c | |||
@@ -46,72 +46,6 @@ | |||
46 | 46 | ||
47 | #define PRIV_SECURITY_DISABLE 0x01 | 47 | #define PRIV_SECURITY_DISABLE 0x01 |
48 | 48 | ||
49 | static const struct gpu_ops gm20b_ops = { | ||
50 | .ltc = { | ||
51 | .determine_L2_size_bytes = gm20b_determine_L2_size_bytes, | ||
52 | .set_zbc_color_entry = gm20b_ltc_set_zbc_color_entry, | ||
53 | .set_zbc_depth_entry = gm20b_ltc_set_zbc_depth_entry, | ||
54 | .init_cbc = gm20b_ltc_init_cbc, | ||
55 | .init_fs_state = gm20b_ltc_init_fs_state, | ||
56 | .init_comptags = gm20b_ltc_init_comptags, | ||
57 | .cbc_ctrl = gm20b_ltc_cbc_ctrl, | ||
58 | .isr = gm20b_ltc_isr, | ||
59 | .cbc_fix_config = gm20b_ltc_cbc_fix_config, | ||
60 | .flush = gm20b_flush_ltc, | ||
61 | #ifdef CONFIG_DEBUG_FS | ||
62 | .sync_debugfs = gm20b_ltc_sync_debugfs, | ||
63 | #endif | ||
64 | }, | ||
65 | .clock_gating = { | ||
66 | .slcg_bus_load_gating_prod = | ||
67 | gm20b_slcg_bus_load_gating_prod, | ||
68 | .slcg_ce2_load_gating_prod = | ||
69 | gm20b_slcg_ce2_load_gating_prod, | ||
70 | .slcg_chiplet_load_gating_prod = | ||
71 | gm20b_slcg_chiplet_load_gating_prod, | ||
72 | .slcg_ctxsw_firmware_load_gating_prod = | ||
73 | gm20b_slcg_ctxsw_firmware_load_gating_prod, | ||
74 | .slcg_fb_load_gating_prod = | ||
75 | gm20b_slcg_fb_load_gating_prod, | ||
76 | .slcg_fifo_load_gating_prod = | ||
77 | gm20b_slcg_fifo_load_gating_prod, | ||
78 | .slcg_gr_load_gating_prod = | ||
79 | gr_gm20b_slcg_gr_load_gating_prod, | ||
80 | .slcg_ltc_load_gating_prod = | ||
81 | ltc_gm20b_slcg_ltc_load_gating_prod, | ||
82 | .slcg_perf_load_gating_prod = | ||
83 | gm20b_slcg_perf_load_gating_prod, | ||
84 | .slcg_priring_load_gating_prod = | ||
85 | gm20b_slcg_priring_load_gating_prod, | ||
86 | .slcg_pmu_load_gating_prod = | ||
87 | gm20b_slcg_pmu_load_gating_prod, | ||
88 | .slcg_therm_load_gating_prod = | ||
89 | gm20b_slcg_therm_load_gating_prod, | ||
90 | .slcg_xbar_load_gating_prod = | ||
91 | gm20b_slcg_xbar_load_gating_prod, | ||
92 | .blcg_bus_load_gating_prod = | ||
93 | gm20b_blcg_bus_load_gating_prod, | ||
94 | .blcg_ctxsw_firmware_load_gating_prod = | ||
95 | gm20b_blcg_ctxsw_firmware_load_gating_prod, | ||
96 | .blcg_fb_load_gating_prod = | ||
97 | gm20b_blcg_fb_load_gating_prod, | ||
98 | .blcg_fifo_load_gating_prod = | ||
99 | gm20b_blcg_fifo_load_gating_prod, | ||
100 | .blcg_gr_load_gating_prod = | ||
101 | gm20b_blcg_gr_load_gating_prod, | ||
102 | .blcg_ltc_load_gating_prod = | ||
103 | gm20b_blcg_ltc_load_gating_prod, | ||
104 | .blcg_pwr_csb_load_gating_prod = | ||
105 | gm20b_blcg_pwr_csb_load_gating_prod, | ||
106 | .blcg_xbar_load_gating_prod = | ||
107 | gm20b_blcg_xbar_load_gating_prod, | ||
108 | .blcg_pmu_load_gating_prod = | ||
109 | gm20b_blcg_pmu_load_gating_prod, | ||
110 | .pg_gr_load_gating_prod = | ||
111 | gr_gm20b_pg_gr_load_gating_prod, | ||
112 | }, | ||
113 | }; | ||
114 | |||
115 | static int gm20b_get_litter_value(struct gk20a *g, int value) | 49 | static int gm20b_get_litter_value(struct gk20a *g, int value) |
116 | { | 50 | { |
117 | int ret = EINVAL; | 51 | int ret = EINVAL; |
@@ -201,6 +135,74 @@ static int gm20b_get_litter_value(struct gk20a *g, int value) | |||
201 | return ret; | 135 | return ret; |
202 | } | 136 | } |
203 | 137 | ||
138 | static const struct gpu_ops gm20b_ops = { | ||
139 | .ltc = { | ||
140 | .determine_L2_size_bytes = gm20b_determine_L2_size_bytes, | ||
141 | .set_zbc_color_entry = gm20b_ltc_set_zbc_color_entry, | ||
142 | .set_zbc_depth_entry = gm20b_ltc_set_zbc_depth_entry, | ||
143 | .init_cbc = gm20b_ltc_init_cbc, | ||
144 | .init_fs_state = gm20b_ltc_init_fs_state, | ||
145 | .init_comptags = gm20b_ltc_init_comptags, | ||
146 | .cbc_ctrl = gm20b_ltc_cbc_ctrl, | ||
147 | .isr = gm20b_ltc_isr, | ||
148 | .cbc_fix_config = gm20b_ltc_cbc_fix_config, | ||
149 | .flush = gm20b_flush_ltc, | ||
150 | #ifdef CONFIG_DEBUG_FS | ||
151 | .sync_debugfs = gm20b_ltc_sync_debugfs, | ||
152 | #endif | ||
153 | }, | ||
154 | .clock_gating = { | ||
155 | .slcg_bus_load_gating_prod = | ||
156 | gm20b_slcg_bus_load_gating_prod, | ||
157 | .slcg_ce2_load_gating_prod = | ||
158 | gm20b_slcg_ce2_load_gating_prod, | ||
159 | .slcg_chiplet_load_gating_prod = | ||
160 | gm20b_slcg_chiplet_load_gating_prod, | ||
161 | .slcg_ctxsw_firmware_load_gating_prod = | ||
162 | gm20b_slcg_ctxsw_firmware_load_gating_prod, | ||
163 | .slcg_fb_load_gating_prod = | ||
164 | gm20b_slcg_fb_load_gating_prod, | ||
165 | .slcg_fifo_load_gating_prod = | ||
166 | gm20b_slcg_fifo_load_gating_prod, | ||
167 | .slcg_gr_load_gating_prod = | ||
168 | gr_gm20b_slcg_gr_load_gating_prod, | ||
169 | .slcg_ltc_load_gating_prod = | ||
170 | ltc_gm20b_slcg_ltc_load_gating_prod, | ||
171 | .slcg_perf_load_gating_prod = | ||
172 | gm20b_slcg_perf_load_gating_prod, | ||
173 | .slcg_priring_load_gating_prod = | ||
174 | gm20b_slcg_priring_load_gating_prod, | ||
175 | .slcg_pmu_load_gating_prod = | ||
176 | gm20b_slcg_pmu_load_gating_prod, | ||
177 | .slcg_therm_load_gating_prod = | ||
178 | gm20b_slcg_therm_load_gating_prod, | ||
179 | .slcg_xbar_load_gating_prod = | ||
180 | gm20b_slcg_xbar_load_gating_prod, | ||
181 | .blcg_bus_load_gating_prod = | ||
182 | gm20b_blcg_bus_load_gating_prod, | ||
183 | .blcg_ctxsw_firmware_load_gating_prod = | ||
184 | gm20b_blcg_ctxsw_firmware_load_gating_prod, | ||
185 | .blcg_fb_load_gating_prod = | ||
186 | gm20b_blcg_fb_load_gating_prod, | ||
187 | .blcg_fifo_load_gating_prod = | ||
188 | gm20b_blcg_fifo_load_gating_prod, | ||
189 | .blcg_gr_load_gating_prod = | ||
190 | gm20b_blcg_gr_load_gating_prod, | ||
191 | .blcg_ltc_load_gating_prod = | ||
192 | gm20b_blcg_ltc_load_gating_prod, | ||
193 | .blcg_pwr_csb_load_gating_prod = | ||
194 | gm20b_blcg_pwr_csb_load_gating_prod, | ||
195 | .blcg_xbar_load_gating_prod = | ||
196 | gm20b_blcg_xbar_load_gating_prod, | ||
197 | .blcg_pmu_load_gating_prod = | ||
198 | gm20b_blcg_pmu_load_gating_prod, | ||
199 | .pg_gr_load_gating_prod = | ||
200 | gr_gm20b_pg_gr_load_gating_prod, | ||
201 | }, | ||
202 | .chip_init_gpu_characteristics = gk20a_init_gpu_characteristics, | ||
203 | .get_litter_value = gm20b_get_litter_value, | ||
204 | }; | ||
205 | |||
204 | int gm20b_init_hal(struct gk20a *g) | 206 | int gm20b_init_hal(struct gk20a *g) |
205 | { | 207 | { |
206 | struct gpu_ops *gops = &g->ops; | 208 | struct gpu_ops *gops = &g->ops; |
@@ -209,6 +211,12 @@ int gm20b_init_hal(struct gk20a *g) | |||
209 | 211 | ||
210 | gops->ltc = gm20b_ops.ltc; | 212 | gops->ltc = gm20b_ops.ltc; |
211 | gops->clock_gating = gm20b_ops.clock_gating; | 213 | gops->clock_gating = gm20b_ops.clock_gating; |
214 | |||
215 | /* Lone functions */ | ||
216 | gops->chip_init_gpu_characteristics = | ||
217 | gm20b_ops.chip_init_gpu_characteristics; | ||
218 | gops->get_litter_value = gm20b_ops.get_litter_value; | ||
219 | |||
212 | gops->securegpccs = false; | 220 | gops->securegpccs = false; |
213 | gops->pmupstate = false; | 221 | gops->pmupstate = false; |
214 | #ifdef CONFIG_TEGRA_ACR | 222 | #ifdef CONFIG_TEGRA_ACR |
@@ -260,8 +268,6 @@ int gm20b_init_hal(struct gk20a *g) | |||
260 | gk20a_init_css_ops(gops); | 268 | gk20a_init_css_ops(gops); |
261 | #endif | 269 | #endif |
262 | g->name = "gm20b"; | 270 | g->name = "gm20b"; |
263 | gops->chip_init_gpu_characteristics = gk20a_init_gpu_characteristics; | ||
264 | gops->get_litter_value = gm20b_get_litter_value; | ||
265 | 271 | ||
266 | c->twod_class = FERMI_TWOD_A; | 272 | c->twod_class = FERMI_TWOD_A; |
267 | c->threed_class = MAXWELL_B; | 273 | c->threed_class = MAXWELL_B; |
diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index 69516d22..f31180cd 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c | |||
@@ -59,70 +59,6 @@ | |||
59 | 59 | ||
60 | #include <nvgpu/hw/gp106/hw_proj_gp106.h> | 60 | #include <nvgpu/hw/gp106/hw_proj_gp106.h> |
61 | 61 | ||
62 | static const struct gpu_ops gp106_ops = { | ||
63 | .ltc = { | ||
64 | .determine_L2_size_bytes = gp10b_determine_L2_size_bytes, | ||
65 | .set_zbc_color_entry = gm20b_ltc_set_zbc_color_entry, | ||
66 | .set_zbc_depth_entry = gm20b_ltc_set_zbc_depth_entry, | ||
67 | .init_cbc = NULL, | ||
68 | .init_fs_state = gm20b_ltc_init_fs_state, | ||
69 | .init_comptags = gp10b_ltc_init_comptags, | ||
70 | .cbc_ctrl = gm20b_ltc_cbc_ctrl, | ||
71 | .isr = gp10b_ltc_isr, | ||
72 | .cbc_fix_config = NULL, | ||
73 | .flush = gm20b_flush_ltc, | ||
74 | #ifdef CONFIG_DEBUG_FS | ||
75 | .sync_debugfs = gp10b_ltc_sync_debugfs, | ||
76 | #endif | ||
77 | }, | ||
78 | .clock_gating = { | ||
79 | .slcg_bus_load_gating_prod = | ||
80 | gp106_slcg_bus_load_gating_prod, | ||
81 | .slcg_ce2_load_gating_prod = | ||
82 | gp106_slcg_ce2_load_gating_prod, | ||
83 | .slcg_chiplet_load_gating_prod = | ||
84 | gp106_slcg_chiplet_load_gating_prod, | ||
85 | .slcg_ctxsw_firmware_load_gating_prod = | ||
86 | gp106_slcg_ctxsw_firmware_load_gating_prod, | ||
87 | .slcg_fb_load_gating_prod = | ||
88 | gp106_slcg_fb_load_gating_prod, | ||
89 | .slcg_fifo_load_gating_prod = | ||
90 | gp106_slcg_fifo_load_gating_prod, | ||
91 | .slcg_gr_load_gating_prod = | ||
92 | gr_gp106_slcg_gr_load_gating_prod, | ||
93 | .slcg_ltc_load_gating_prod = | ||
94 | ltc_gp106_slcg_ltc_load_gating_prod, | ||
95 | .slcg_perf_load_gating_prod = | ||
96 | gp106_slcg_perf_load_gating_prod, | ||
97 | .slcg_priring_load_gating_prod = | ||
98 | gp106_slcg_priring_load_gating_prod, | ||
99 | .slcg_pmu_load_gating_prod = | ||
100 | gp106_slcg_pmu_load_gating_prod, | ||
101 | .slcg_therm_load_gating_prod = | ||
102 | gp106_slcg_therm_load_gating_prod, | ||
103 | .slcg_xbar_load_gating_prod = | ||
104 | gp106_slcg_xbar_load_gating_prod, | ||
105 | .blcg_bus_load_gating_prod = | ||
106 | gp106_blcg_bus_load_gating_prod, | ||
107 | .blcg_ce_load_gating_prod = | ||
108 | gp106_blcg_ce_load_gating_prod, | ||
109 | .blcg_fb_load_gating_prod = | ||
110 | gp106_blcg_fb_load_gating_prod, | ||
111 | .blcg_fifo_load_gating_prod = | ||
112 | gp106_blcg_fifo_load_gating_prod, | ||
113 | .blcg_gr_load_gating_prod = | ||
114 | gp106_blcg_gr_load_gating_prod, | ||
115 | .blcg_ltc_load_gating_prod = | ||
116 | gp106_blcg_ltc_load_gating_prod, | ||
117 | .blcg_pmu_load_gating_prod = | ||
118 | gp106_blcg_pmu_load_gating_prod, | ||
119 | .blcg_xbar_load_gating_prod = | ||
120 | gp106_blcg_xbar_load_gating_prod, | ||
121 | .pg_gr_load_gating_prod = | ||
122 | gr_gp106_pg_gr_load_gating_prod, | ||
123 | } | ||
124 | }; | ||
125 | |||
126 | static int gp106_get_litter_value(struct gk20a *g, int value) | 62 | static int gp106_get_litter_value(struct gk20a *g, int value) |
127 | { | 63 | { |
128 | int ret = -EINVAL; | 64 | int ret = -EINVAL; |
@@ -241,6 +177,73 @@ static int gp106_init_gpu_characteristics(struct gk20a *g) | |||
241 | return 0; | 177 | return 0; |
242 | } | 178 | } |
243 | 179 | ||
180 | static const struct gpu_ops gp106_ops = { | ||
181 | .ltc = { | ||
182 | .determine_L2_size_bytes = gp10b_determine_L2_size_bytes, | ||
183 | .set_zbc_color_entry = gm20b_ltc_set_zbc_color_entry, | ||
184 | .set_zbc_depth_entry = gm20b_ltc_set_zbc_depth_entry, | ||
185 | .init_cbc = NULL, | ||
186 | .init_fs_state = gm20b_ltc_init_fs_state, | ||
187 | .init_comptags = gp10b_ltc_init_comptags, | ||
188 | .cbc_ctrl = gm20b_ltc_cbc_ctrl, | ||
189 | .isr = gp10b_ltc_isr, | ||
190 | .cbc_fix_config = NULL, | ||
191 | .flush = gm20b_flush_ltc, | ||
192 | #ifdef CONFIG_DEBUG_FS | ||
193 | .sync_debugfs = gp10b_ltc_sync_debugfs, | ||
194 | #endif | ||
195 | }, | ||
196 | .clock_gating = { | ||
197 | .slcg_bus_load_gating_prod = | ||
198 | gp106_slcg_bus_load_gating_prod, | ||
199 | .slcg_ce2_load_gating_prod = | ||
200 | gp106_slcg_ce2_load_gating_prod, | ||
201 | .slcg_chiplet_load_gating_prod = | ||
202 | gp106_slcg_chiplet_load_gating_prod, | ||
203 | .slcg_ctxsw_firmware_load_gating_prod = | ||
204 | gp106_slcg_ctxsw_firmware_load_gating_prod, | ||
205 | .slcg_fb_load_gating_prod = | ||
206 | gp106_slcg_fb_load_gating_prod, | ||
207 | .slcg_fifo_load_gating_prod = | ||
208 | gp106_slcg_fifo_load_gating_prod, | ||
209 | .slcg_gr_load_gating_prod = | ||
210 | gr_gp106_slcg_gr_load_gating_prod, | ||
211 | .slcg_ltc_load_gating_prod = | ||
212 | ltc_gp106_slcg_ltc_load_gating_prod, | ||
213 | .slcg_perf_load_gating_prod = | ||
214 | gp106_slcg_perf_load_gating_prod, | ||
215 | .slcg_priring_load_gating_prod = | ||
216 | gp106_slcg_priring_load_gating_prod, | ||
217 | .slcg_pmu_load_gating_prod = | ||
218 | gp106_slcg_pmu_load_gating_prod, | ||
219 | .slcg_therm_load_gating_prod = | ||
220 | gp106_slcg_therm_load_gating_prod, | ||
221 | .slcg_xbar_load_gating_prod = | ||
222 | gp106_slcg_xbar_load_gating_prod, | ||
223 | .blcg_bus_load_gating_prod = | ||
224 | gp106_blcg_bus_load_gating_prod, | ||
225 | .blcg_ce_load_gating_prod = | ||
226 | gp106_blcg_ce_load_gating_prod, | ||
227 | .blcg_fb_load_gating_prod = | ||
228 | gp106_blcg_fb_load_gating_prod, | ||
229 | .blcg_fifo_load_gating_prod = | ||
230 | gp106_blcg_fifo_load_gating_prod, | ||
231 | .blcg_gr_load_gating_prod = | ||
232 | gp106_blcg_gr_load_gating_prod, | ||
233 | .blcg_ltc_load_gating_prod = | ||
234 | gp106_blcg_ltc_load_gating_prod, | ||
235 | .blcg_pmu_load_gating_prod = | ||
236 | gp106_blcg_pmu_load_gating_prod, | ||
237 | .blcg_xbar_load_gating_prod = | ||
238 | gp106_blcg_xbar_load_gating_prod, | ||
239 | .pg_gr_load_gating_prod = | ||
240 | gr_gp106_pg_gr_load_gating_prod, | ||
241 | }, | ||
242 | .get_litter_value = gp106_get_litter_value, | ||
243 | .chip_init_gpu_characteristics = gp106_init_gpu_characteristics, | ||
244 | .bios_init = gm206_bios_init, | ||
245 | }; | ||
246 | |||
244 | int gp106_init_hal(struct gk20a *g) | 247 | int gp106_init_hal(struct gk20a *g) |
245 | { | 248 | { |
246 | struct gpu_ops *gops = &g->ops; | 249 | struct gpu_ops *gops = &g->ops; |
@@ -251,6 +254,12 @@ int gp106_init_hal(struct gk20a *g) | |||
251 | gops->ltc = gp106_ops.ltc; | 254 | gops->ltc = gp106_ops.ltc; |
252 | gops->clock_gating = gp106_ops.clock_gating; | 255 | gops->clock_gating = gp106_ops.clock_gating; |
253 | 256 | ||
257 | /* Lone functions */ | ||
258 | gops->get_litter_value = gp106_ops.get_litter_value; | ||
259 | gops->chip_init_gpu_characteristics = | ||
260 | gp106_ops.chip_init_gpu_characteristics; | ||
261 | gops->bios_init = gp106_ops.bios_init; | ||
262 | |||
254 | gops->privsecurity = 1; | 263 | gops->privsecurity = 1; |
255 | gops->securegpccs = 1; | 264 | gops->securegpccs = 1; |
256 | gops->pmupstate = true; | 265 | gops->pmupstate = true; |
@@ -277,13 +286,10 @@ int gp106_init_hal(struct gk20a *g) | |||
277 | #if defined(CONFIG_GK20A_CYCLE_STATS) | 286 | #if defined(CONFIG_GK20A_CYCLE_STATS) |
278 | gk20a_init_css_ops(gops); | 287 | gk20a_init_css_ops(gops); |
279 | #endif | 288 | #endif |
280 | gm206_init_bios_ops(gops); | ||
281 | gp106_init_therm_ops(gops); | 289 | gp106_init_therm_ops(gops); |
282 | gp106_init_xve_ops(gops); | 290 | gp106_init_xve_ops(gops); |
283 | 291 | ||
284 | g->name = "gp10x"; | 292 | g->name = "gp10x"; |
285 | gops->get_litter_value = gp106_get_litter_value; | ||
286 | gops->chip_init_gpu_characteristics = gp106_init_gpu_characteristics; | ||
287 | gops->gr_ctx.use_dma_for_fw_bootstrap = true; | 293 | gops->gr_ctx.use_dma_for_fw_bootstrap = true; |
288 | 294 | ||
289 | c->twod_class = FERMI_TWOD_A; | 295 | c->twod_class = FERMI_TWOD_A; |
diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c index 505dc6d7..98ff55cc 100644 --- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c | |||
@@ -52,74 +52,6 @@ | |||
52 | #include <nvgpu/hw/gp10b/hw_proj_gp10b.h> | 52 | #include <nvgpu/hw/gp10b/hw_proj_gp10b.h> |
53 | #include <nvgpu/hw/gp10b/hw_fuse_gp10b.h> | 53 | #include <nvgpu/hw/gp10b/hw_fuse_gp10b.h> |
54 | 54 | ||
55 | static const struct gpu_ops gp10b_ops = { | ||
56 | .ltc = { | ||
57 | .determine_L2_size_bytes = gp10b_determine_L2_size_bytes, | ||
58 | .set_zbc_color_entry = gm20b_ltc_set_zbc_color_entry, | ||
59 | .set_zbc_depth_entry = gm20b_ltc_set_zbc_depth_entry, | ||
60 | .init_cbc = gm20b_ltc_init_cbc, | ||
61 | .init_fs_state = gp10b_ltc_init_fs_state, | ||
62 | .init_comptags = gp10b_ltc_init_comptags, | ||
63 | .cbc_ctrl = gm20b_ltc_cbc_ctrl, | ||
64 | .isr = gp10b_ltc_isr, | ||
65 | .cbc_fix_config = gm20b_ltc_cbc_fix_config, | ||
66 | .flush = gm20b_flush_ltc, | ||
67 | #ifdef CONFIG_DEBUG_FS | ||
68 | .sync_debugfs = gp10b_ltc_sync_debugfs, | ||
69 | #endif | ||
70 | }, | ||
71 | .clock_gating = { | ||
72 | .slcg_bus_load_gating_prod = | ||
73 | gp10b_slcg_bus_load_gating_prod, | ||
74 | .slcg_ce2_load_gating_prod = | ||
75 | gp10b_slcg_ce2_load_gating_prod, | ||
76 | .slcg_chiplet_load_gating_prod = | ||
77 | gp10b_slcg_chiplet_load_gating_prod, | ||
78 | .slcg_ctxsw_firmware_load_gating_prod = | ||
79 | gp10b_slcg_ctxsw_firmware_load_gating_prod, | ||
80 | .slcg_fb_load_gating_prod = | ||
81 | gp10b_slcg_fb_load_gating_prod, | ||
82 | .slcg_fifo_load_gating_prod = | ||
83 | gp10b_slcg_fifo_load_gating_prod, | ||
84 | .slcg_gr_load_gating_prod = | ||
85 | gr_gp10b_slcg_gr_load_gating_prod, | ||
86 | .slcg_ltc_load_gating_prod = | ||
87 | ltc_gp10b_slcg_ltc_load_gating_prod, | ||
88 | .slcg_perf_load_gating_prod = | ||
89 | gp10b_slcg_perf_load_gating_prod, | ||
90 | .slcg_priring_load_gating_prod = | ||
91 | gp10b_slcg_priring_load_gating_prod, | ||
92 | .slcg_pmu_load_gating_prod = | ||
93 | gp10b_slcg_pmu_load_gating_prod, | ||
94 | .slcg_therm_load_gating_prod = | ||
95 | gp10b_slcg_therm_load_gating_prod, | ||
96 | .slcg_xbar_load_gating_prod = | ||
97 | gp10b_slcg_xbar_load_gating_prod, | ||
98 | .blcg_bus_load_gating_prod = | ||
99 | gp10b_blcg_bus_load_gating_prod, | ||
100 | .blcg_ce_load_gating_prod = | ||
101 | gp10b_blcg_ce_load_gating_prod, | ||
102 | .blcg_ctxsw_firmware_load_gating_prod = | ||
103 | gp10b_blcg_ctxsw_firmware_load_gating_prod, | ||
104 | .blcg_fb_load_gating_prod = | ||
105 | gp10b_blcg_fb_load_gating_prod, | ||
106 | .blcg_fifo_load_gating_prod = | ||
107 | gp10b_blcg_fifo_load_gating_prod, | ||
108 | .blcg_gr_load_gating_prod = | ||
109 | gp10b_blcg_gr_load_gating_prod, | ||
110 | .blcg_ltc_load_gating_prod = | ||
111 | gp10b_blcg_ltc_load_gating_prod, | ||
112 | .blcg_pwr_csb_load_gating_prod = | ||
113 | gp10b_blcg_pwr_csb_load_gating_prod, | ||
114 | .blcg_pmu_load_gating_prod = | ||
115 | gp10b_blcg_pmu_load_gating_prod, | ||
116 | .blcg_xbar_load_gating_prod = | ||
117 | gp10b_blcg_xbar_load_gating_prod, | ||
118 | .pg_gr_load_gating_prod = | ||
119 | gr_gp10b_pg_gr_load_gating_prod, | ||
120 | } | ||
121 | }; | ||
122 | |||
123 | static int gp10b_get_litter_value(struct gk20a *g, int value) | 55 | static int gp10b_get_litter_value(struct gk20a *g, int value) |
124 | { | 56 | { |
125 | int ret = EINVAL; | 57 | int ret = EINVAL; |
@@ -209,6 +141,76 @@ static int gp10b_get_litter_value(struct gk20a *g, int value) | |||
209 | return ret; | 141 | return ret; |
210 | } | 142 | } |
211 | 143 | ||
144 | static const struct gpu_ops gp10b_ops = { | ||
145 | .ltc = { | ||
146 | .determine_L2_size_bytes = gp10b_determine_L2_size_bytes, | ||
147 | .set_zbc_color_entry = gm20b_ltc_set_zbc_color_entry, | ||
148 | .set_zbc_depth_entry = gm20b_ltc_set_zbc_depth_entry, | ||
149 | .init_cbc = gm20b_ltc_init_cbc, | ||
150 | .init_fs_state = gp10b_ltc_init_fs_state, | ||
151 | .init_comptags = gp10b_ltc_init_comptags, | ||
152 | .cbc_ctrl = gm20b_ltc_cbc_ctrl, | ||
153 | .isr = gp10b_ltc_isr, | ||
154 | .cbc_fix_config = gm20b_ltc_cbc_fix_config, | ||
155 | .flush = gm20b_flush_ltc, | ||
156 | #ifdef CONFIG_DEBUG_FS | ||
157 | .sync_debugfs = gp10b_ltc_sync_debugfs, | ||
158 | #endif | ||
159 | }, | ||
160 | .clock_gating = { | ||
161 | .slcg_bus_load_gating_prod = | ||
162 | gp10b_slcg_bus_load_gating_prod, | ||
163 | .slcg_ce2_load_gating_prod = | ||
164 | gp10b_slcg_ce2_load_gating_prod, | ||
165 | .slcg_chiplet_load_gating_prod = | ||
166 | gp10b_slcg_chiplet_load_gating_prod, | ||
167 | .slcg_ctxsw_firmware_load_gating_prod = | ||
168 | gp10b_slcg_ctxsw_firmware_load_gating_prod, | ||
169 | .slcg_fb_load_gating_prod = | ||
170 | gp10b_slcg_fb_load_gating_prod, | ||
171 | .slcg_fifo_load_gating_prod = | ||
172 | gp10b_slcg_fifo_load_gating_prod, | ||
173 | .slcg_gr_load_gating_prod = | ||
174 | gr_gp10b_slcg_gr_load_gating_prod, | ||
175 | .slcg_ltc_load_gating_prod = | ||
176 | ltc_gp10b_slcg_ltc_load_gating_prod, | ||
177 | .slcg_perf_load_gating_prod = | ||
178 | gp10b_slcg_perf_load_gating_prod, | ||
179 | .slcg_priring_load_gating_prod = | ||
180 | gp10b_slcg_priring_load_gating_prod, | ||
181 | .slcg_pmu_load_gating_prod = | ||
182 | gp10b_slcg_pmu_load_gating_prod, | ||
183 | .slcg_therm_load_gating_prod = | ||
184 | gp10b_slcg_therm_load_gating_prod, | ||
185 | .slcg_xbar_load_gating_prod = | ||
186 | gp10b_slcg_xbar_load_gating_prod, | ||
187 | .blcg_bus_load_gating_prod = | ||
188 | gp10b_blcg_bus_load_gating_prod, | ||
189 | .blcg_ce_load_gating_prod = | ||
190 | gp10b_blcg_ce_load_gating_prod, | ||
191 | .blcg_ctxsw_firmware_load_gating_prod = | ||
192 | gp10b_blcg_ctxsw_firmware_load_gating_prod, | ||
193 | .blcg_fb_load_gating_prod = | ||
194 | gp10b_blcg_fb_load_gating_prod, | ||
195 | .blcg_fifo_load_gating_prod = | ||
196 | gp10b_blcg_fifo_load_gating_prod, | ||
197 | .blcg_gr_load_gating_prod = | ||
198 | gp10b_blcg_gr_load_gating_prod, | ||
199 | .blcg_ltc_load_gating_prod = | ||
200 | gp10b_blcg_ltc_load_gating_prod, | ||
201 | .blcg_pwr_csb_load_gating_prod = | ||
202 | gp10b_blcg_pwr_csb_load_gating_prod, | ||
203 | .blcg_pmu_load_gating_prod = | ||
204 | gp10b_blcg_pmu_load_gating_prod, | ||
205 | .blcg_xbar_load_gating_prod = | ||
206 | gp10b_blcg_xbar_load_gating_prod, | ||
207 | .pg_gr_load_gating_prod = | ||
208 | gr_gp10b_pg_gr_load_gating_prod, | ||
209 | }, | ||
210 | .chip_init_gpu_characteristics = gp10b_init_gpu_characteristics, | ||
211 | .get_litter_value = gp10b_get_litter_value, | ||
212 | }; | ||
213 | |||
212 | int gp10b_init_hal(struct gk20a *g) | 214 | int gp10b_init_hal(struct gk20a *g) |
213 | { | 215 | { |
214 | struct gpu_ops *gops = &g->ops; | 216 | struct gpu_ops *gops = &g->ops; |
@@ -217,6 +219,12 @@ int gp10b_init_hal(struct gk20a *g) | |||
217 | 219 | ||
218 | gops->ltc = gp10b_ops.ltc; | 220 | gops->ltc = gp10b_ops.ltc; |
219 | gops->clock_gating = gp10b_ops.clock_gating; | 221 | gops->clock_gating = gp10b_ops.clock_gating; |
222 | |||
223 | /* Lone Functions */ | ||
224 | gops->chip_init_gpu_characteristics = | ||
225 | gp10b_ops.chip_init_gpu_characteristics; | ||
226 | gops->get_litter_value = gp10b_ops.get_litter_value; | ||
227 | |||
220 | gops->pmupstate = false; | 228 | gops->pmupstate = false; |
221 | #ifdef CONFIG_TEGRA_ACR | 229 | #ifdef CONFIG_TEGRA_ACR |
222 | if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL)) { | 230 | if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL)) { |
@@ -278,8 +286,6 @@ int gp10b_init_hal(struct gk20a *g) | |||
278 | gk20a_init_css_ops(gops); | 286 | gk20a_init_css_ops(gops); |
279 | #endif | 287 | #endif |
280 | g->name = "gp10b"; | 288 | g->name = "gp10b"; |
281 | gops->chip_init_gpu_characteristics = gp10b_init_gpu_characteristics; | ||
282 | gops->get_litter_value = gp10b_get_litter_value; | ||
283 | 289 | ||
284 | c->twod_class = FERMI_TWOD_A; | 290 | c->twod_class = FERMI_TWOD_A; |
285 | c->threed_class = PASCAL_A; | 291 | c->threed_class = PASCAL_A; |