gpu: nvgpu: remove default verbose in pbus isr

And reduce pri timeout to match PCIE specs

bug 200246808

Change-Id: I0225ae964b5635665fe774c43f773d0ce86650ab
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1264179
(cherry picked from commit 1c3dbf8324b7ec5d06bd0e57e7deee9a1c8e9411)
Reviewed-on: http://git-master/r/1280328
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 files changed, 17 insertions, 8 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c
index 77d708dd..246338d4 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.c
@@ -662,28 +662,28 @@ void gk20a_pbus_isr(struct gk20a *g)
         if (val & (bus_intr_0_pri_squash_m() |
                         bus_intr_0_pri_fecserr_m() |
                         bus_intr_0_pri_timeout_m())) {
-                gk20a_err(dev_from_gk20a(g), "pmc_enable : 0x%x",
+                gk20a_dbg(gpu_dbg_intr, "pmc_enable : 0x%x",
                         gk20a_readl(g, mc_enable_r()));
-                gk20a_err(dev_from_gk20a(g), "NV_PBUS_INTR_0 : 0x%x", val);
-                gk20a_err(g->dev,
+                gk20a_dbg(gpu_dbg_intr, "NV_PBUS_INTR_0 : 0x%x", val);
+                gk20a_dbg(gpu_dbg_intr,
                         "NV_PTIMER_PRI_TIMEOUT_SAVE_0: 0x%x\n",
                         gk20a_readl(g, timer_pri_timeout_save_0_r()));
-                gk20a_err(g->dev,
+                gk20a_dbg(gpu_dbg_intr,
                         "NV_PTIMER_PRI_TIMEOUT_SAVE_1: 0x%x\n",
                         gk20a_readl(g, timer_pri_timeout_save_1_r()));
                 err_code = gk20a_readl(g, timer_pri_timeout_fecs_errcode_r());
-                gk20a_err(g->dev,
+                gk20a_dbg(gpu_dbg_intr,
                         "NV_PTIMER_PRI_TIMEOUT_FECS_ERRCODE: 0x%x\n",
                         err_code);
                 if (err_code == 0xbadf13)
-                        gk20a_err(g->dev,
+                        gk20a_dbg(gpu_dbg_intr,
                         "NV_PGRAPH_PRI_GPC0_GPCCS_FS_GPC: 0x%x\n",
                         gk20a_readl(g, gr_gpc0_fs_gpc_r()));
 
         }
 
         if (val)
-                gk20a_err(g->dev,
+                gk20a_dbg(gpu_dbg_intr,
                         "Unhandled pending pbus interrupt\n");
 
         gk20a_writel(g, bus_intr_0_r(), val);
@@ -939,7 +939,10 @@ int gk20a_pm_finalize_poweron(struct device *dev)
         if (tegra_platform_is_silicon()) {
                 gk20a_writel(g,
                         timer_pri_timeout_r(),
-                        timer_pri_timeout_period_f(0x186A0) |
+                        timer_pri_timeout_period_f(
+                                platform->default_pri_timeout ?
+                                        platform->default_pri_timeout :
+                                                                0x186A0) |
                         timer_pri_timeout_en_en_enabled_f());
         } else {
                 gk20a_writel(g,
diff --git a/drivers/gpu/nvgpu/gk20a/platform_gk20a.h b/drivers/gpu/nvgpu/gk20a/platform_gk20a.h
index c2aec6e3..6966394f 100644
--- a/drivers/gpu/nvgpu/gk20a/platform_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/platform_gk20a.h
@@ -117,6 +117,11 @@ struct gk20a_platform {
         /* Default big page size 64K or 128K */
         u32 default_big_page_size;
 
+        /* default pri timeout, on PCIe it should be lower than timeout
+         * detection
+         */
+        u32 default_pri_timeout;
+
         /* Initialize the platform interface of the gk20a driver.
          *
          * The platform implementation of this function must
diff --git a/drivers/gpu/nvgpu/pci.c b/drivers/gpu/nvgpu/pci.c
index 7dd5ce03..80fe5342 100644
--- a/drivers/gpu/nvgpu/pci.c
+++ b/drivers/gpu/nvgpu/pci.c
@@ -65,6 +65,7 @@ static struct gk20a_platform nvgpu_pci_device[] = {
         .enable_elcg = false,
         .enable_slcg = true,
         .enable_blcg = true,
+        .default_pri_timeout = 0x3ff,
 
         .disable_aspm = true,