gpu: nvgpu: verify channel status while closing per-platform

We right now call gk20a_fifo_tsg_unbind_channel_verify_status() to verify
channel status while unbinding a channel from TSG while closing

Add support to do this verification per-platform and keep this disabled
for vgpu platforms

Bug 200327095

Change-Id: I19fab41c74d10d528d22bd9b3982a4ed73c3b4ca
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1572368
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

6 files changed, 11 insertions, 4 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
index 7fc773f8..8e78b95e 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
@@ -1908,7 +1908,7 @@ int gk20a_fifo_force_reset_ch(struct channel_gk20a *ch,
         return 0;
 }
 
-static int gk20a_fifo_tsg_unbind_channel_verify_status(struct channel_gk20a *ch)
+int gk20a_fifo_tsg_unbind_channel_verify_status(struct channel_gk20a *ch)
 {
         struct gk20a *g = ch->g;
 
@@ -1939,9 +1939,11 @@ int gk20a_fifo_tsg_unbind_channel(struct channel_gk20a *ch)
         if (err)
                 goto fail_enable_tsg;
 
-        err = gk20a_fifo_tsg_unbind_channel_verify_status(ch);
-        if (err)
-                goto fail_enable_tsg;
+        if (g->ops.fifo.tsg_verify_channel_status) {
+                err = g->ops.fifo.tsg_verify_channel_status(ch);
+                if (err)
+                        goto fail_enable_tsg;
+        }
 
         /* Channel should be seen as TSG channel while updating runlist */
         err = channel_gk20a_update_runlist(ch, false);
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
index ceea21fa..68f53316 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
@@ -373,6 +373,7 @@ void gk20a_fifo_disable_channel(struct channel_gk20a *ch);
 
 bool gk20a_fifo_channel_status_is_next(struct gk20a *g, u32 chid);
 bool gk20a_fifo_channel_status_is_ctx_reload(struct gk20a *g, u32 chid);
+int gk20a_fifo_tsg_unbind_channel_verify_status(struct channel_gk20a *ch);
 
 struct channel_gk20a *gk20a_refch_from_inst_ptr(struct gk20a *g, u64 inst_ptr);
 void gk20a_fifo_channel_unbind(struct channel_gk20a *ch_gk20a);
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index db38fae4..97b40474 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -491,6 +491,7 @@ struct gpu_ops {
                 int (*preempt_tsg)(struct gk20a *g, u32 tsgid);
                 int (*enable_tsg)(struct tsg_gk20a *tsg);
                 int (*disable_tsg)(struct tsg_gk20a *tsg);
+                int (*tsg_verify_channel_status)(struct channel_gk20a *ch);
                 void (*tsg_verify_status_ctx_reload)(struct channel_gk20a *ch);
                 void (*tsg_verify_status_faulted)(struct channel_gk20a *ch);
                 int (*reschedule_runlist)(struct gk20a *g, u32 runlist_id);
diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
index 98c4ddfb..76c87c00 100644
--- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
@@ -379,6 +379,7 @@ static const struct gpu_ops gm20b_ops = {
                 .preempt_tsg = gk20a_fifo_preempt_tsg,
                 .enable_tsg = gk20a_enable_tsg,
                 .disable_tsg = gk20a_disable_tsg,
+                .tsg_verify_channel_status = gk20a_fifo_tsg_unbind_channel_verify_status,
                 .tsg_verify_status_ctx_reload = gm20b_fifo_tsg_verify_status_ctx_reload,
                 .update_runlist = gk20a_fifo_update_runlist,
                 .trigger_mmu_fault = gm20b_fifo_trigger_mmu_fault,
diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c
index 89fe66c9..1c423785 100644
--- a/drivers/gpu/nvgpu/gp106/hal_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c
@@ -438,6 +438,7 @@ static const struct gpu_ops gp106_ops = {
                 .preempt_tsg = gk20a_fifo_preempt_tsg,
                 .enable_tsg = gk20a_enable_tsg,
                 .disable_tsg = gk20a_disable_tsg,
+                .tsg_verify_channel_status = gk20a_fifo_tsg_unbind_channel_verify_status,
                 .tsg_verify_status_ctx_reload = gm20b_fifo_tsg_verify_status_ctx_reload,
                 .update_runlist = gk20a_fifo_update_runlist,
                 .trigger_mmu_fault = gm20b_fifo_trigger_mmu_fault,
diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
index 0db6b3f7..f298f26c 100644
--- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c
@@ -400,6 +400,7 @@ static const struct gpu_ops gp10b_ops = {
                 .preempt_tsg = gk20a_fifo_preempt_tsg,
                 .enable_tsg = gk20a_enable_tsg,
                 .disable_tsg = gk20a_disable_tsg,
+                .tsg_verify_channel_status = gk20a_fifo_tsg_unbind_channel_verify_status,
                 .tsg_verify_status_ctx_reload = gm20b_fifo_tsg_verify_status_ctx_reload,
                 .reschedule_runlist = gk20a_fifo_reschedule_runlist,
                 .update_runlist = gk20a_fifo_update_runlist,