gpu: nvgpu: set correct timeslice value

Scale timeslice register value based on platform
specific ptimer scale koefficient.

Expose timeslice values through debugfs to simplify performance
tuning.

bug 1605552
bug 1603226

Change-Id: I49f86f22d58d26a366ee1b5f5a9ab9d7f896ad25
Signed-off-by: Kirill Artamonov <kartamonov@nvidia.com>
Reviewed-on: http://git-master/r/800007
(cherry picked from commit 00c85ef24cf28ffaa81eb53fff7edef1c699220a)
Reviewed-on: http://git-master/r/808251
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

3 files changed, 38 insertions, 7 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
index 2dc8e9a0..29fec4fe 100644
--- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
@@ -136,8 +136,10 @@ static int channel_gk20a_set_schedule_params(struct channel_gk20a *c,
                                 u32 timeslice_timeout)
 {
         void *inst_ptr;
+        struct gk20a_platform *platform = platform_get_drvdata(c->g->dev);
         int shift = 3;
-        int value = timeslice_timeout;
+        int value = scale_ptimer(timeslice_timeout,
+                        platform->ptimerscaling10x);
 
         inst_ptr = c->inst_block.cpu_va;
         if (!inst_ptr)
@@ -2339,16 +2341,13 @@ static int gk20a_channel_set_priority(struct channel_gk20a *ch,
         /* set priority of graphics channel */
         switch (priority) {
         case NVGPU_PRIORITY_LOW:
-                /* 64 << 3 = 512us */
-                timeslice_timeout = 64;
+                timeslice_timeout = ch->g->timeslice_low_priority_us;
                 break;
         case NVGPU_PRIORITY_MEDIUM:
-                /* 128 << 3 = 1024us */
-                timeslice_timeout = 128;
+                timeslice_timeout = ch->g->timeslice_medium_priority_us;
                 break;
         case NVGPU_PRIORITY_HIGH:
-                /* 255 << 3 = 2048us */
-                timeslice_timeout = 255;
+                timeslice_timeout = ch->g->timeslice_high_priority_us;
                 break;
         default:
                 pr_err("Unsupported priority");
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c
index 6f650a3b..0cc29026 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.c
@@ -1460,6 +1460,10 @@ static int gk20a_probe(struct platform_device *dev)
                 gk20a->timeouts_enabled = true;
         gk20a->ch_wdt_enabled = true;
 
+        gk20a->timeslice_low_priority_us = 1300;
+        gk20a->timeslice_medium_priority_us = 2600;
+        gk20a->timeslice_high_priority_us = 5200;
+
         /* Set up initial power settings. For non-slicon platforms, disable *
          * power features and for silicon platforms, read from platform data */
         gk20a->slcg_enabled =
@@ -1512,6 +1516,25 @@ static int gk20a_probe(struct platform_device *dev)
                                         S_IRUGO|S_IWUSR,
                                         platform->debugfs,
                                         &gk20a->mm.disable_bigpage);
+
+        gk20a->debugfs_timeslice_low_priority_us =
+                        debugfs_create_u32("timeslice_low_priority_us",
+                                        S_IRUGO|S_IWUSR,
+                                        platform->debugfs,
+                                        &gk20a->timeslice_low_priority_us);
+
+        gk20a->debugfs_timeslice_medium_priority_us =
+                        debugfs_create_u32("timeslice_medium_priority_us",
+                                        S_IRUGO|S_IWUSR,
+                                        platform->debugfs,
+                                        &gk20a->timeslice_medium_priority_us);
+
+        gk20a->debugfs_timeslice_high_priority_us =
+                        debugfs_create_u32("timeslice_high_priority_us",
+                                        S_IRUGO|S_IWUSR,
+                                        platform->debugfs,
+                                        &gk20a->timeslice_high_priority_us);
+
         gr_gk20a_debugfs_init(gk20a);
         gk20a_pmu_debugfs_init(dev);
         gk20a_cde_debugfs_init(dev);
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 8290e7e7..bec2d2a0 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -491,6 +491,11 @@ struct gk20a {
         u32 ch_wdt_enabled;
         struct mutex ch_wdt_lock;
 
+        /* Channel priorities */
+        u32 timeslice_low_priority_us;
+        u32 timeslice_medium_priority_us;
+        u32 timeslice_high_priority_us;
+
         bool slcg_enabled;
         bool blcg_enabled;
         bool elcg_enabled;
@@ -510,6 +515,10 @@ struct gk20a {
         struct dentry *debugfs_bypass_smmu;
         struct dentry *debugfs_disable_bigpage;
         struct dentry *debugfs_gr_default_attrib_cb_size;
+
+        struct dentry * debugfs_timeslice_low_priority_us;
+        struct dentry * debugfs_timeslice_medium_priority_us;
+        struct dentry * debugfs_timeslice_high_priority_us;
 #endif
         struct gk20a_ctxsw_ucode_info ctxsw_ucode_info;