diff options
author | Konsta Holtta <kholtta@nvidia.com> | 2018-08-31 05:59:37 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-09-05 23:40:32 -0400 |
commit | 34d552957dd0e3e3363067fc9b9af64281d29396 (patch) | |
tree | 2f3689c84156f9980561e9554ce5d945d3820fb9 /drivers | |
parent | cf7850ee33a5a9ffc32f584c7c3beefe286ceed2 (diff) |
gpu: nvgpu: move channel header to common
channel_gk20a is clear from chip specifics and from most dependencies,
so move it under the common directory.
Jira NVGPU-967
Change-Id: I41f2160b96d4ec84064288ecc22bb360e82352df
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1810578
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers')
60 files changed, 473 insertions, 464 deletions
diff --git a/drivers/gpu/nvgpu/common/fb/fb_gv11b.c b/drivers/gpu/nvgpu/common/fb/fb_gv11b.c index c46d3976..b3d8cdb9 100644 --- a/drivers/gpu/nvgpu/common/fb/fb_gv11b.c +++ b/drivers/gpu/nvgpu/common/fb/fb_gv11b.c | |||
@@ -33,6 +33,7 @@ | |||
33 | #include <nvgpu/io.h> | 33 | #include <nvgpu/io.h> |
34 | #include <nvgpu/utils.h> | 34 | #include <nvgpu/utils.h> |
35 | #include <nvgpu/timers.h> | 35 | #include <nvgpu/timers.h> |
36 | #include <nvgpu/channel.h> | ||
36 | 37 | ||
37 | #include "gk20a/gk20a.h" | 38 | #include "gk20a/gk20a.h" |
38 | #include "gk20a/mm_gk20a.h" | 39 | #include "gk20a/mm_gk20a.h" |
diff --git a/drivers/gpu/nvgpu/common/fifo/channel.c b/drivers/gpu/nvgpu/common/fifo/channel.c index a11d9562..58b62ce7 100644 --- a/drivers/gpu/nvgpu/common/fifo/channel.c +++ b/drivers/gpu/nvgpu/common/fifo/channel.c | |||
@@ -43,6 +43,7 @@ | |||
43 | #include <nvgpu/os_sched.h> | 43 | #include <nvgpu/os_sched.h> |
44 | #include <nvgpu/log2.h> | 44 | #include <nvgpu/log2.h> |
45 | #include <nvgpu/ptimer.h> | 45 | #include <nvgpu/ptimer.h> |
46 | #include <nvgpu/channel.h> | ||
46 | 47 | ||
47 | #include "gk20a/gk20a.h" | 48 | #include "gk20a/gk20a.h" |
48 | #include "gk20a/dbg_gpu_gk20a.h" | 49 | #include "gk20a/dbg_gpu_gk20a.h" |
diff --git a/drivers/gpu/nvgpu/common/fifo/submit.c b/drivers/gpu/nvgpu/common/fifo/submit.c index 56512894..1f7a04a2 100644 --- a/drivers/gpu/nvgpu/common/fifo/submit.c +++ b/drivers/gpu/nvgpu/common/fifo/submit.c | |||
@@ -28,7 +28,6 @@ | |||
28 | #include <nvgpu/hw/gk20a/hw_pbdma_gk20a.h> | 28 | #include <nvgpu/hw/gk20a/hw_pbdma_gk20a.h> |
29 | 29 | ||
30 | #include "gk20a/gk20a.h" | 30 | #include "gk20a/gk20a.h" |
31 | #include "gk20a/channel_gk20a.h" | ||
32 | #include "gk20a/fence_gk20a.h" | 31 | #include "gk20a/fence_gk20a.h" |
33 | #include "gk20a/channel_sync_gk20a.h" | 32 | #include "gk20a/channel_sync_gk20a.h" |
34 | 33 | ||
diff --git a/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c index 4cc6c8ca..436d3205 100644 --- a/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c | |||
@@ -29,6 +29,7 @@ | |||
29 | #include <nvgpu/enabled.h> | 29 | #include <nvgpu/enabled.h> |
30 | #include <nvgpu/io.h> | 30 | #include <nvgpu/io.h> |
31 | #include <nvgpu/utils.h> | 31 | #include <nvgpu/utils.h> |
32 | #include <nvgpu/channel.h> | ||
32 | 33 | ||
33 | #include "gk20a.h" | 34 | #include "gk20a.h" |
34 | #include "gk20a/fence_gk20a.h" | 35 | #include "gk20a/fence_gk20a.h" |
diff --git a/drivers/gpu/nvgpu/gk20a/ce2_gk20a.h b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.h index 19a169da..f46d0d9d 100644 --- a/drivers/gpu/nvgpu/gk20a/ce2_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.h | |||
@@ -26,8 +26,8 @@ | |||
26 | #ifndef __CE2_GK20A_H__ | 26 | #ifndef __CE2_GK20A_H__ |
27 | #define __CE2_GK20A_H__ | 27 | #define __CE2_GK20A_H__ |
28 | 28 | ||
29 | #include "channel_gk20a.h" | 29 | struct channel_gk20a; |
30 | #include "tsg_gk20a.h" | 30 | struct tsg_gk20a; |
31 | 31 | ||
32 | void gk20a_ce2_isr(struct gk20a *g, u32 inst_id, u32 pri_base); | 32 | void gk20a_ce2_isr(struct gk20a *g, u32 inst_id, u32 pri_base); |
33 | u32 gk20a_ce2_nonstall_isr(struct gk20a *g, u32 inst_id, u32 pri_base); | 33 | u32 gk20a_ce2_nonstall_isr(struct gk20a *g, u32 inst_id, u32 pri_base); |
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.h b/drivers/gpu/nvgpu/gk20a/channel_gk20a.h deleted file mode 100644 index 51207552..00000000 --- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.h +++ /dev/null | |||
@@ -1,439 +0,0 @@ | |||
1 | /* | ||
2 | * GK20A graphics channel | ||
3 | * | ||
4 | * Copyright (c) 2011-2018, NVIDIA CORPORATION. All rights reserved. | ||
5 | * | ||
6 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
7 | * copy of this software and associated documentation files (the "Software"), | ||
8 | * to deal in the Software without restriction, including without limitation | ||
9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
10 | * and/or sell copies of the Software, and to permit persons to whom the | ||
11 | * Software is furnished to do so, subject to the following conditions: | ||
12 | * | ||
13 | * The above copyright notice and this permission notice shall be included in | ||
14 | * all copies or substantial portions of the Software. | ||
15 | * | ||
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | ||
21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
22 | * DEALINGS IN THE SOFTWARE. | ||
23 | */ | ||
24 | #ifndef CHANNEL_GK20A_H | ||
25 | #define CHANNEL_GK20A_H | ||
26 | |||
27 | #include <nvgpu/list.h> | ||
28 | #include <nvgpu/lock.h> | ||
29 | #include <nvgpu/timers.h> | ||
30 | #include <nvgpu/cond.h> | ||
31 | #include <nvgpu/atomic.h> | ||
32 | #include <nvgpu/nvgpu_mem.h> | ||
33 | #include <nvgpu/allocator.h> | ||
34 | |||
35 | struct gk20a; | ||
36 | struct dbg_session_gk20a; | ||
37 | struct gk20a_fence; | ||
38 | struct fifo_profile_gk20a; | ||
39 | struct gk20a_channel_sync; | ||
40 | |||
41 | /* Flags to be passed to gk20a_channel_alloc_gpfifo() */ | ||
42 | #define NVGPU_GPFIFO_FLAGS_SUPPORT_VPR (1U << 0U) | ||
43 | #define NVGPU_GPFIFO_FLAGS_SUPPORT_DETERMINISTIC (1U << 1U) | ||
44 | #define NVGPU_GPFIFO_FLAGS_REPLAYABLE_FAULTS_ENABLE (1U << 2U) | ||
45 | #define NVGPU_GPFIFO_FLAGS_USERMODE_SUPPORT (1U << 3U) | ||
46 | |||
47 | /* Flags to be passed to nvgpu_submit_channel_gpfifo() */ | ||
48 | #define NVGPU_SUBMIT_FLAGS_FENCE_WAIT (1U << 0U) | ||
49 | #define NVGPU_SUBMIT_FLAGS_FENCE_GET (1U << 1U) | ||
50 | #define NVGPU_SUBMIT_FLAGS_HW_FORMAT (1U << 2U) | ||
51 | #define NVGPU_SUBMIT_FLAGS_SYNC_FENCE (1U << 3U) | ||
52 | #define NVGPU_SUBMIT_FLAGS_SUPPRESS_WFI (1U << 4U) | ||
53 | #define NVGPU_SUBMIT_FLAGS_SKIP_BUFFER_REFCOUNTING (1U << 5U) | ||
54 | |||
55 | /* | ||
56 | * The binary format of 'struct nvgpu_channel_fence' introduced here | ||
57 | * should match that of 'struct nvgpu_fence' defined in uapi header, since | ||
58 | * this struct is intended to be a mirror copy of the uapi struct. This is | ||
59 | * not a hard requirement though because of nvgpu_get_fence_args conversion | ||
60 | * function. | ||
61 | */ | ||
62 | struct nvgpu_channel_fence { | ||
63 | u32 id; | ||
64 | u32 value; | ||
65 | }; | ||
66 | |||
67 | /* | ||
68 | * The binary format of 'struct nvgpu_gpfifo_entry' introduced here | ||
69 | * should match that of 'struct nvgpu_gpfifo' defined in uapi header, since | ||
70 | * this struct is intended to be a mirror copy of the uapi struct. This is | ||
71 | * a rigid requirement because there's no conversion function and there are | ||
72 | * memcpy's present between the user gpfifo (of type nvgpu_gpfifo) and the | ||
73 | * kern gpfifo (of type nvgpu_gpfifo_entry). | ||
74 | */ | ||
75 | struct nvgpu_gpfifo_entry { | ||
76 | u32 entry0; | ||
77 | u32 entry1; | ||
78 | }; | ||
79 | |||
80 | struct gpfifo_desc { | ||
81 | struct nvgpu_mem mem; | ||
82 | u32 entry_num; | ||
83 | |||
84 | u32 get; | ||
85 | u32 put; | ||
86 | |||
87 | bool wrap; | ||
88 | |||
89 | /* if gpfifo lives in vidmem or is forced to go via PRAMIN, first copy | ||
90 | * from userspace to pipe and then from pipe to gpu buffer */ | ||
91 | void *pipe; | ||
92 | }; | ||
93 | |||
94 | struct nvgpu_gpfifo_args { | ||
95 | u32 num_entries; | ||
96 | u32 num_inflight_jobs; | ||
97 | u32 userd_dmabuf_fd; | ||
98 | u32 gpfifo_dmabuf_fd; | ||
99 | u32 work_submit_token; | ||
100 | u32 flags; | ||
101 | }; | ||
102 | |||
103 | struct notification { | ||
104 | struct { | ||
105 | u32 nanoseconds[2]; | ||
106 | } timestamp; | ||
107 | u32 info32; | ||
108 | u16 info16; | ||
109 | u16 status; | ||
110 | }; | ||
111 | |||
112 | struct priv_cmd_queue { | ||
113 | struct nvgpu_mem mem; | ||
114 | u32 size; /* num of entries in words */ | ||
115 | u32 put; /* put for priv cmd queue */ | ||
116 | u32 get; /* get for priv cmd queue */ | ||
117 | }; | ||
118 | |||
119 | struct priv_cmd_entry { | ||
120 | bool valid; | ||
121 | struct nvgpu_mem *mem; | ||
122 | u32 off; /* offset in mem, in u32 entries */ | ||
123 | u64 gva; | ||
124 | u32 get; /* start of entry in queue */ | ||
125 | u32 size; /* in words */ | ||
126 | }; | ||
127 | |||
128 | struct channel_gk20a_job { | ||
129 | struct nvgpu_mapped_buf **mapped_buffers; | ||
130 | int num_mapped_buffers; | ||
131 | struct gk20a_fence *post_fence; | ||
132 | struct priv_cmd_entry *wait_cmd; | ||
133 | struct priv_cmd_entry *incr_cmd; | ||
134 | struct nvgpu_list_node list; | ||
135 | }; | ||
136 | |||
137 | static inline struct channel_gk20a_job * | ||
138 | channel_gk20a_job_from_list(struct nvgpu_list_node *node) | ||
139 | { | ||
140 | return (struct channel_gk20a_job *) | ||
141 | ((uintptr_t)node - offsetof(struct channel_gk20a_job, list)); | ||
142 | }; | ||
143 | |||
144 | struct channel_gk20a_joblist { | ||
145 | struct { | ||
146 | bool enabled; | ||
147 | unsigned int length; | ||
148 | unsigned int put; | ||
149 | unsigned int get; | ||
150 | struct channel_gk20a_job *jobs; | ||
151 | struct nvgpu_mutex read_lock; | ||
152 | } pre_alloc; | ||
153 | |||
154 | struct { | ||
155 | struct nvgpu_list_node jobs; | ||
156 | struct nvgpu_spinlock lock; | ||
157 | } dynamic; | ||
158 | |||
159 | /* | ||
160 | * Synchronize abort cleanup (when closing a channel) and job cleanup | ||
161 | * (asynchronously from worker) - protect from concurrent access when | ||
162 | * job resources are being freed. | ||
163 | */ | ||
164 | struct nvgpu_mutex cleanup_lock; | ||
165 | }; | ||
166 | |||
167 | struct channel_gk20a_timeout { | ||
168 | /* lock protects the running timer state */ | ||
169 | struct nvgpu_raw_spinlock lock; | ||
170 | struct nvgpu_timeout timer; | ||
171 | bool running; | ||
172 | u32 gp_get; | ||
173 | u64 pb_get; | ||
174 | |||
175 | /* lock not needed */ | ||
176 | u32 limit_ms; | ||
177 | bool enabled; | ||
178 | bool debug_dump; | ||
179 | }; | ||
180 | |||
181 | /* | ||
182 | * Track refcount actions, saving their stack traces. This number specifies how | ||
183 | * many most recent actions are stored in a buffer. Set to 0 to disable. 128 | ||
184 | * should be enough to track moderately hard problems from the start. | ||
185 | */ | ||
186 | #define GK20A_CHANNEL_REFCOUNT_TRACKING 0 | ||
187 | /* Stack depth for the saved actions. */ | ||
188 | #define GK20A_CHANNEL_REFCOUNT_TRACKING_STACKLEN 8 | ||
189 | |||
190 | /* | ||
191 | * Because the puts and gets are not linked together explicitly (although they | ||
192 | * should always come in pairs), it's not possible to tell which ref holder to | ||
193 | * delete from the list when doing a put. So, just store some number of most | ||
194 | * recent gets and puts in a ring buffer, to obtain a history. | ||
195 | * | ||
196 | * These are zeroed when a channel is closed, so a new one starts fresh. | ||
197 | */ | ||
198 | |||
199 | enum channel_gk20a_ref_action_type { | ||
200 | channel_gk20a_ref_action_get, | ||
201 | channel_gk20a_ref_action_put | ||
202 | }; | ||
203 | |||
204 | #if GK20A_CHANNEL_REFCOUNT_TRACKING | ||
205 | |||
206 | #include <linux/stacktrace.h> | ||
207 | |||
208 | struct channel_gk20a_ref_action { | ||
209 | enum channel_gk20a_ref_action_type type; | ||
210 | s64 timestamp_ms; | ||
211 | /* | ||
212 | * Many of these traces will be similar. Simpler to just capture | ||
213 | * duplicates than to have a separate database for the entries. | ||
214 | */ | ||
215 | struct stack_trace trace; | ||
216 | unsigned long trace_entries[GK20A_CHANNEL_REFCOUNT_TRACKING_STACKLEN]; | ||
217 | }; | ||
218 | #endif | ||
219 | |||
220 | /* this is the priv element of struct nvhost_channel */ | ||
221 | struct channel_gk20a { | ||
222 | struct gk20a *g; /* set only when channel is active */ | ||
223 | |||
224 | struct nvgpu_list_node free_chs; | ||
225 | |||
226 | struct nvgpu_spinlock ref_obtain_lock; | ||
227 | nvgpu_atomic_t ref_count; | ||
228 | struct nvgpu_cond ref_count_dec_wq; | ||
229 | #if GK20A_CHANNEL_REFCOUNT_TRACKING | ||
230 | /* | ||
231 | * Ring buffer for most recent refcount gets and puts. Protected by | ||
232 | * ref_actions_lock when getting or putting refs (i.e., adding | ||
233 | * entries), and when reading entries. | ||
234 | */ | ||
235 | struct channel_gk20a_ref_action ref_actions[ | ||
236 | GK20A_CHANNEL_REFCOUNT_TRACKING]; | ||
237 | size_t ref_actions_put; /* index of next write */ | ||
238 | struct nvgpu_spinlock ref_actions_lock; | ||
239 | #endif | ||
240 | |||
241 | struct nvgpu_semaphore_int *hw_sema; | ||
242 | |||
243 | nvgpu_atomic_t bound; | ||
244 | |||
245 | int chid; | ||
246 | int tsgid; | ||
247 | pid_t pid; | ||
248 | pid_t tgid; | ||
249 | struct nvgpu_mutex ioctl_lock; | ||
250 | |||
251 | struct nvgpu_list_node ch_entry; /* channel's entry in TSG */ | ||
252 | |||
253 | struct channel_gk20a_joblist joblist; | ||
254 | struct nvgpu_allocator fence_allocator; | ||
255 | |||
256 | struct vm_gk20a *vm; | ||
257 | |||
258 | struct gpfifo_desc gpfifo; | ||
259 | |||
260 | struct nvgpu_mem usermode_userd; /* Used for Usermode Submission */ | ||
261 | struct nvgpu_mem usermode_gpfifo; | ||
262 | struct nvgpu_mem inst_block; | ||
263 | |||
264 | u64 userd_iova; | ||
265 | u64 userd_gpu_va; | ||
266 | |||
267 | struct priv_cmd_queue priv_cmd_q; | ||
268 | |||
269 | struct nvgpu_cond notifier_wq; | ||
270 | struct nvgpu_cond semaphore_wq; | ||
271 | |||
272 | /* kernel watchdog to kill stuck jobs */ | ||
273 | struct channel_gk20a_timeout timeout; | ||
274 | |||
275 | /* for job cleanup handling in the background worker */ | ||
276 | struct nvgpu_list_node worker_item; | ||
277 | |||
278 | #if defined(CONFIG_GK20A_CYCLE_STATS) | ||
279 | struct { | ||
280 | void *cyclestate_buffer; | ||
281 | u32 cyclestate_buffer_size; | ||
282 | struct nvgpu_mutex cyclestate_buffer_mutex; | ||
283 | } cyclestate; | ||
284 | |||
285 | struct nvgpu_mutex cs_client_mutex; | ||
286 | struct gk20a_cs_snapshot_client *cs_client; | ||
287 | #endif | ||
288 | struct nvgpu_mutex dbg_s_lock; | ||
289 | struct nvgpu_list_node dbg_s_list; | ||
290 | |||
291 | struct nvgpu_mutex sync_lock; | ||
292 | struct gk20a_channel_sync *sync; | ||
293 | struct gk20a_channel_sync *user_sync; | ||
294 | |||
295 | #ifdef CONFIG_TEGRA_GR_VIRTUALIZATION | ||
296 | u64 virt_ctx; | ||
297 | #endif | ||
298 | |||
299 | struct nvgpu_mem ctx_header; | ||
300 | |||
301 | /* Any operating system specific data. */ | ||
302 | void *os_priv; | ||
303 | |||
304 | u32 obj_class; /* we support only one obj per channel */ | ||
305 | |||
306 | u32 timeout_accumulated_ms; | ||
307 | u32 timeout_gpfifo_get; | ||
308 | |||
309 | u32 subctx_id; | ||
310 | u32 runqueue_sel; | ||
311 | |||
312 | u32 timeout_ms_max; | ||
313 | u32 runlist_id; | ||
314 | |||
315 | bool mmu_nack_handled; | ||
316 | bool has_timedout; | ||
317 | bool referenceable; | ||
318 | bool vpr; | ||
319 | bool deterministic; | ||
320 | /* deterministic, but explicitly idle and submits disallowed */ | ||
321 | bool deterministic_railgate_allowed; | ||
322 | bool cde; | ||
323 | bool usermode_submit_enabled; | ||
324 | bool timeout_debug_dump; | ||
325 | bool has_os_fence_framework_support; | ||
326 | |||
327 | bool is_privileged_channel; | ||
328 | }; | ||
329 | |||
330 | static inline struct channel_gk20a * | ||
331 | channel_gk20a_from_free_chs(struct nvgpu_list_node *node) | ||
332 | { | ||
333 | return (struct channel_gk20a *) | ||
334 | ((uintptr_t)node - offsetof(struct channel_gk20a, free_chs)); | ||
335 | }; | ||
336 | |||
337 | static inline struct channel_gk20a * | ||
338 | channel_gk20a_from_ch_entry(struct nvgpu_list_node *node) | ||
339 | { | ||
340 | return (struct channel_gk20a *) | ||
341 | ((uintptr_t)node - offsetof(struct channel_gk20a, ch_entry)); | ||
342 | }; | ||
343 | |||
344 | static inline struct channel_gk20a * | ||
345 | channel_gk20a_from_worker_item(struct nvgpu_list_node *node) | ||
346 | { | ||
347 | return (struct channel_gk20a *) | ||
348 | ((uintptr_t)node - offsetof(struct channel_gk20a, worker_item)); | ||
349 | }; | ||
350 | |||
351 | static inline bool gk20a_channel_as_bound(struct channel_gk20a *ch) | ||
352 | { | ||
353 | return !!ch->vm; | ||
354 | } | ||
355 | int channel_gk20a_commit_va(struct channel_gk20a *c); | ||
356 | int gk20a_init_channel_support(struct gk20a *, u32 chid); | ||
357 | |||
358 | /* must be inside gk20a_busy()..gk20a_idle() */ | ||
359 | void gk20a_channel_close(struct channel_gk20a *ch); | ||
360 | void __gk20a_channel_kill(struct channel_gk20a *ch); | ||
361 | |||
362 | bool gk20a_channel_update_and_check_timeout(struct channel_gk20a *ch, | ||
363 | u32 timeout_delta_ms, bool *progress); | ||
364 | void gk20a_disable_channel(struct channel_gk20a *ch); | ||
365 | void gk20a_channel_abort(struct channel_gk20a *ch, bool channel_preempt); | ||
366 | void gk20a_channel_abort_clean_up(struct channel_gk20a *ch); | ||
367 | void gk20a_channel_semaphore_wakeup(struct gk20a *g, bool post_events); | ||
368 | int gk20a_channel_alloc_priv_cmdbuf(struct channel_gk20a *c, u32 size, | ||
369 | struct priv_cmd_entry *entry); | ||
370 | int gk20a_free_priv_cmdbuf(struct channel_gk20a *c, struct priv_cmd_entry *e); | ||
371 | |||
372 | int gk20a_enable_channel_tsg(struct gk20a *g, struct channel_gk20a *ch); | ||
373 | int gk20a_disable_channel_tsg(struct gk20a *g, struct channel_gk20a *ch); | ||
374 | |||
375 | int gk20a_channel_suspend(struct gk20a *g); | ||
376 | int gk20a_channel_resume(struct gk20a *g); | ||
377 | |||
378 | void gk20a_channel_deterministic_idle(struct gk20a *g); | ||
379 | void gk20a_channel_deterministic_unidle(struct gk20a *g); | ||
380 | |||
381 | int nvgpu_channel_worker_init(struct gk20a *g); | ||
382 | void nvgpu_channel_worker_deinit(struct gk20a *g); | ||
383 | |||
384 | struct channel_gk20a *gk20a_get_channel_from_file(int fd); | ||
385 | void gk20a_channel_update(struct channel_gk20a *c); | ||
386 | |||
387 | /* returns ch if reference was obtained */ | ||
388 | struct channel_gk20a *__must_check _gk20a_channel_get(struct channel_gk20a *ch, | ||
389 | const char *caller); | ||
390 | #define gk20a_channel_get(ch) _gk20a_channel_get(ch, __func__) | ||
391 | |||
392 | |||
393 | void _gk20a_channel_put(struct channel_gk20a *ch, const char *caller); | ||
394 | #define gk20a_channel_put(ch) _gk20a_channel_put(ch, __func__) | ||
395 | |||
396 | int gk20a_wait_channel_idle(struct channel_gk20a *ch); | ||
397 | |||
398 | /* runlist_id -1 is synonym for ENGINE_GR_GK20A runlist id */ | ||
399 | struct channel_gk20a *gk20a_open_new_channel(struct gk20a *g, | ||
400 | s32 runlist_id, | ||
401 | bool is_privileged_channel, | ||
402 | pid_t pid, pid_t tid); | ||
403 | |||
404 | int gk20a_channel_alloc_gpfifo(struct channel_gk20a *c, | ||
405 | struct nvgpu_gpfifo_args *gpfifo_args); | ||
406 | |||
407 | void gk20a_channel_timeout_restart_all_channels(struct gk20a *g); | ||
408 | |||
409 | bool channel_gk20a_is_prealloc_enabled(struct channel_gk20a *c); | ||
410 | void channel_gk20a_joblist_lock(struct channel_gk20a *c); | ||
411 | void channel_gk20a_joblist_unlock(struct channel_gk20a *c); | ||
412 | bool channel_gk20a_joblist_is_empty(struct channel_gk20a *c); | ||
413 | |||
414 | int channel_gk20a_update_runlist(struct channel_gk20a *c, bool add); | ||
415 | int gk20a_channel_get_timescale_from_timeslice(struct gk20a *g, | ||
416 | unsigned int timeslice_period, | ||
417 | unsigned int *__timeslice_timeout, unsigned int *__timeslice_scale); | ||
418 | |||
419 | void gk20a_wait_until_counter_is_N( | ||
420 | struct channel_gk20a *ch, nvgpu_atomic_t *counter, int wait_value, | ||
421 | struct nvgpu_cond *c, const char *caller, const char *counter_name); | ||
422 | int channel_gk20a_alloc_job(struct channel_gk20a *c, | ||
423 | struct channel_gk20a_job **job_out); | ||
424 | void channel_gk20a_free_job(struct channel_gk20a *c, | ||
425 | struct channel_gk20a_job *job); | ||
426 | u32 nvgpu_get_gp_free_count(struct channel_gk20a *c); | ||
427 | u32 nvgpu_gp_free_count(struct channel_gk20a *c); | ||
428 | int gk20a_channel_add_job(struct channel_gk20a *c, | ||
429 | struct channel_gk20a_job *job, | ||
430 | bool skip_buffer_refcounting); | ||
431 | void free_priv_cmdbuf(struct channel_gk20a *c, | ||
432 | struct priv_cmd_entry *e); | ||
433 | void gk20a_channel_clean_up_jobs(struct channel_gk20a *c, | ||
434 | bool clean_all); | ||
435 | |||
436 | void gk20a_channel_free_usermode_buffers(struct channel_gk20a *c); | ||
437 | u32 nvgpu_get_gpfifo_entry_size(void); | ||
438 | |||
439 | #endif /* CHANNEL_GK20A_H */ | ||
diff --git a/drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c index f6134460..f78df0b5 100644 --- a/drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c | |||
@@ -30,6 +30,7 @@ | |||
30 | #include <nvgpu/list.h> | 30 | #include <nvgpu/list.h> |
31 | #include <nvgpu/nvhost.h> | 31 | #include <nvgpu/nvhost.h> |
32 | #include <nvgpu/os_fence.h> | 32 | #include <nvgpu/os_fence.h> |
33 | #include <nvgpu/channel.h> | ||
33 | 34 | ||
34 | #include "channel_sync_gk20a.h" | 35 | #include "channel_sync_gk20a.h" |
35 | #include "gk20a.h" | 36 | #include "gk20a.h" |
diff --git a/drivers/gpu/nvgpu/gk20a/css_gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/css_gr_gk20a.c index 4aeeec1c..00d1b196 100644 --- a/drivers/gpu/nvgpu/gk20a/css_gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/css_gr_gk20a.c | |||
@@ -33,6 +33,7 @@ | |||
33 | #include <nvgpu/bug.h> | 33 | #include <nvgpu/bug.h> |
34 | #include <nvgpu/io.h> | 34 | #include <nvgpu/io.h> |
35 | #include <nvgpu/utils.h> | 35 | #include <nvgpu/utils.h> |
36 | #include <nvgpu/channel.h> | ||
36 | 37 | ||
37 | #include "gk20a.h" | 38 | #include "gk20a.h" |
38 | #include "css_gr_gk20a.h" | 39 | #include "css_gr_gk20a.h" |
diff --git a/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c b/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c index e7f95245..ef505425 100644 --- a/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c | |||
@@ -30,6 +30,7 @@ | |||
30 | #include <nvgpu/bug.h> | 30 | #include <nvgpu/bug.h> |
31 | #include <nvgpu/io.h> | 31 | #include <nvgpu/io.h> |
32 | #include <nvgpu/utils.h> | 32 | #include <nvgpu/utils.h> |
33 | #include <nvgpu/channel.h> | ||
33 | 34 | ||
34 | #include "gk20a.h" | 35 | #include "gk20a.h" |
35 | #include "gr_gk20a.h" | 36 | #include "gr_gk20a.h" |
diff --git a/drivers/gpu/nvgpu/gk20a/fecs_trace_gk20a.c b/drivers/gpu/nvgpu/gk20a/fecs_trace_gk20a.c index 453d5b2f..3134df4d 100644 --- a/drivers/gpu/nvgpu/gk20a/fecs_trace_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fecs_trace_gk20a.c | |||
@@ -38,6 +38,7 @@ | |||
38 | #include <nvgpu/io.h> | 38 | #include <nvgpu/io.h> |
39 | #include <nvgpu/utils.h> | 39 | #include <nvgpu/utils.h> |
40 | #include <nvgpu/timers.h> | 40 | #include <nvgpu/timers.h> |
41 | #include <nvgpu/channel.h> | ||
41 | 42 | ||
42 | #include "fecs_trace_gk20a.h" | 43 | #include "fecs_trace_gk20a.h" |
43 | #include "gk20a.h" | 44 | #include "gk20a.h" |
diff --git a/drivers/gpu/nvgpu/gk20a/fence_gk20a.c b/drivers/gpu/nvgpu/gk20a/fence_gk20a.c index 0df73278..af421304 100644 --- a/drivers/gpu/nvgpu/gk20a/fence_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fence_gk20a.c | |||
@@ -28,9 +28,9 @@ | |||
28 | #include <nvgpu/nvhost.h> | 28 | #include <nvgpu/nvhost.h> |
29 | #include <nvgpu/barrier.h> | 29 | #include <nvgpu/barrier.h> |
30 | #include <nvgpu/os_fence.h> | 30 | #include <nvgpu/os_fence.h> |
31 | #include <nvgpu/channel.h> | ||
31 | 32 | ||
32 | #include "gk20a.h" | 33 | #include "gk20a.h" |
33 | #include "channel_gk20a.h" | ||
34 | 34 | ||
35 | struct gk20a_fence_ops { | 35 | struct gk20a_fence_ops { |
36 | int (*wait)(struct gk20a_fence *, long timeout); | 36 | int (*wait)(struct gk20a_fence *, long timeout); |
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index 9dfe3083..e1702bd7 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | |||
@@ -43,6 +43,7 @@ | |||
43 | #include <nvgpu/ptimer.h> | 43 | #include <nvgpu/ptimer.h> |
44 | #include <nvgpu/io.h> | 44 | #include <nvgpu/io.h> |
45 | #include <nvgpu/utils.h> | 45 | #include <nvgpu/utils.h> |
46 | #include <nvgpu/channel.h> | ||
46 | 47 | ||
47 | #include "gk20a.h" | 48 | #include "gk20a.h" |
48 | #include "mm_gk20a.h" | 49 | #include "mm_gk20a.h" |
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h index 3ff1b088..21922426 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h | |||
@@ -24,14 +24,13 @@ | |||
24 | #ifndef FIFO_GK20A_H | 24 | #ifndef FIFO_GK20A_H |
25 | #define FIFO_GK20A_H | 25 | #define FIFO_GK20A_H |
26 | 26 | ||
27 | #include "channel_gk20a.h" | ||
28 | #include "tsg_gk20a.h" | ||
29 | |||
30 | #include <nvgpu/kref.h> | 27 | #include <nvgpu/kref.h> |
31 | 28 | ||
32 | struct gk20a_debug_output; | 29 | struct gk20a_debug_output; |
33 | struct mmu_fault_info; | 30 | struct mmu_fault_info; |
34 | struct nvgpu_semaphore; | 31 | struct nvgpu_semaphore; |
32 | struct channel_gk20a; | ||
33 | struct tsg_gk20a; | ||
35 | 34 | ||
36 | enum { | 35 | enum { |
37 | NVGPU_FIFO_RUNLIST_INTERLEAVE_LEVEL_LOW = 0, | 36 | NVGPU_FIFO_RUNLIST_INTERLEAVE_LEVEL_LOW = 0, |
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 898dfec8..34d08b65 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -47,6 +47,7 @@ struct nvgpu_clk_arb; | |||
47 | struct nvgpu_gpu_ctxsw_trace_filter; | 47 | struct nvgpu_gpu_ctxsw_trace_filter; |
48 | #endif | 48 | #endif |
49 | struct priv_cmd_entry; | 49 | struct priv_cmd_entry; |
50 | struct nvgpu_gpfifo_args; | ||
50 | 51 | ||
51 | #include <nvgpu/lock.h> | 52 | #include <nvgpu/lock.h> |
52 | #include <nvgpu/thread.h> | 53 | #include <nvgpu/thread.h> |
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 2969743b..7bfc48ad 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -41,6 +41,7 @@ | |||
41 | #include <nvgpu/ecc.h> | 41 | #include <nvgpu/ecc.h> |
42 | #include <nvgpu/io.h> | 42 | #include <nvgpu/io.h> |
43 | #include <nvgpu/utils.h> | 43 | #include <nvgpu/utils.h> |
44 | #include <nvgpu/channel.h> | ||
44 | 45 | ||
45 | #include "gk20a.h" | 46 | #include "gk20a.h" |
46 | #include "gr_gk20a.h" | 47 | #include "gr_gk20a.h" |
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c index 9fcaebff..5b76f166 100644 --- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c | |||
@@ -42,6 +42,7 @@ | |||
42 | #include <nvgpu/sizes.h> | 42 | #include <nvgpu/sizes.h> |
43 | #include <nvgpu/io.h> | 43 | #include <nvgpu/io.h> |
44 | #include <nvgpu/utils.h> | 44 | #include <nvgpu/utils.h> |
45 | #include <nvgpu/channel.h> | ||
45 | 46 | ||
46 | #include "gk20a.h" | 47 | #include "gk20a.h" |
47 | #include "mm_gk20a.h" | 48 | #include "mm_gk20a.h" |
diff --git a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c index 6dc2e282..885ce172 100644 --- a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include <nvgpu/kmem.h> | 23 | #include <nvgpu/kmem.h> |
24 | #include <nvgpu/log.h> | 24 | #include <nvgpu/log.h> |
25 | #include <nvgpu/os_sched.h> | 25 | #include <nvgpu/os_sched.h> |
26 | #include <nvgpu/channel.h> | ||
26 | 27 | ||
27 | #include "gk20a.h" | 28 | #include "gk20a.h" |
28 | #include "tsg_gk20a.h" | 29 | #include "tsg_gk20a.h" |
diff --git a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c index dd11d2c7..19653541 100644 --- a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c | |||
@@ -35,6 +35,7 @@ | |||
35 | #include <nvgpu/enabled.h> | 35 | #include <nvgpu/enabled.h> |
36 | #include <nvgpu/io.h> | 36 | #include <nvgpu/io.h> |
37 | #include <nvgpu/bug.h> | 37 | #include <nvgpu/bug.h> |
38 | #include <nvgpu/channel.h> | ||
38 | 39 | ||
39 | #include <nvgpu/hw/gm20b/hw_ccsr_gm20b.h> | 40 | #include <nvgpu/hw/gm20b/hw_ccsr_gm20b.h> |
40 | #include <nvgpu/hw/gm20b/hw_ram_gm20b.h> | 41 | #include <nvgpu/hw/gm20b/hw_ram_gm20b.h> |
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c index 101f4211..32e98e53 100644 --- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c | |||
@@ -29,6 +29,7 @@ | |||
29 | #include <nvgpu/fuse.h> | 29 | #include <nvgpu/fuse.h> |
30 | #include <nvgpu/io.h> | 30 | #include <nvgpu/io.h> |
31 | #include <nvgpu/utils.h> | 31 | #include <nvgpu/utils.h> |
32 | #include <nvgpu/channel.h> | ||
32 | 33 | ||
33 | #include "gk20a/gk20a.h" | 34 | #include "gk20a/gk20a.h" |
34 | #include "gk20a/gr_gk20a.h" | 35 | #include "gk20a/gr_gk20a.h" |
diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c index 512da9df..2f90512e 100644 --- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c | |||
@@ -61,6 +61,7 @@ | |||
61 | #include <nvgpu/enabled.h> | 61 | #include <nvgpu/enabled.h> |
62 | #include <nvgpu/ptimer.h> | 62 | #include <nvgpu/ptimer.h> |
63 | #include <nvgpu/error_notifier.h> | 63 | #include <nvgpu/error_notifier.h> |
64 | #include <nvgpu/channel.h> | ||
64 | 65 | ||
65 | #include <nvgpu/hw/gm20b/hw_proj_gm20b.h> | 66 | #include <nvgpu/hw/gm20b/hw_proj_gm20b.h> |
66 | #include <nvgpu/hw/gm20b/hw_fifo_gm20b.h> | 67 | #include <nvgpu/hw/gm20b/hw_fifo_gm20b.h> |
diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index 24c4191d..3408cdfa 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c | |||
@@ -96,6 +96,7 @@ | |||
96 | #include <nvgpu/ctxsw_trace.h> | 96 | #include <nvgpu/ctxsw_trace.h> |
97 | #include <nvgpu/error_notifier.h> | 97 | #include <nvgpu/error_notifier.h> |
98 | #include <nvgpu/clk_arb.h> | 98 | #include <nvgpu/clk_arb.h> |
99 | #include <nvgpu/channel.h> | ||
99 | 100 | ||
100 | #include <nvgpu/hw/gp106/hw_proj_gp106.h> | 101 | #include <nvgpu/hw/gp106/hw_proj_gp106.h> |
101 | #include <nvgpu/hw/gp106/hw_fifo_gp106.h> | 102 | #include <nvgpu/hw/gp106/hw_fifo_gp106.h> |
diff --git a/drivers/gpu/nvgpu/gp10b/ce_gp10b.h b/drivers/gpu/nvgpu/gp10b/ce_gp10b.h index fbf5e6f8..525599af 100644 --- a/drivers/gpu/nvgpu/gp10b/ce_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/ce_gp10b.h | |||
@@ -24,8 +24,9 @@ | |||
24 | #ifndef __CE_GP10B_H__ | 24 | #ifndef __CE_GP10B_H__ |
25 | #define __CE_GP10B_H__ | 25 | #define __CE_GP10B_H__ |
26 | 26 | ||
27 | #include "gk20a/channel_gk20a.h" | 27 | #include <nvgpu/types.h> |
28 | #include "gk20a/tsg_gk20a.h" | 28 | |
29 | struct gk20a; | ||
29 | 30 | ||
30 | void gp10b_ce_isr(struct gk20a *g, u32 inst_id, u32 pri_base); | 31 | void gp10b_ce_isr(struct gk20a *g, u32 inst_id, u32 pri_base); |
31 | u32 gp10b_ce_nonstall_isr(struct gk20a *g, u32 inst_id, u32 pri_base); | 32 | u32 gp10b_ce_nonstall_isr(struct gk20a *g, u32 inst_id, u32 pri_base); |
diff --git a/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c b/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c index c10e389c..7bf6e769 100644 --- a/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c | |||
@@ -28,6 +28,7 @@ | |||
28 | #include <nvgpu/enabled.h> | 28 | #include <nvgpu/enabled.h> |
29 | #include <nvgpu/io.h> | 29 | #include <nvgpu/io.h> |
30 | #include <nvgpu/utils.h> | 30 | #include <nvgpu/utils.h> |
31 | #include <nvgpu/channel.h> | ||
31 | 32 | ||
32 | #include "fifo_gp10b.h" | 33 | #include "fifo_gp10b.h" |
33 | 34 | ||
diff --git a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c index 0aa32f8a..92e0165f 100644 --- a/drivers/gpu/nvgpu/gp10b/gr_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/gr_gp10b.c | |||
@@ -32,6 +32,7 @@ | |||
32 | #include <nvgpu/enabled.h> | 32 | #include <nvgpu/enabled.h> |
33 | #include <nvgpu/io.h> | 33 | #include <nvgpu/io.h> |
34 | #include <nvgpu/utils.h> | 34 | #include <nvgpu/utils.h> |
35 | #include <nvgpu/channel.h> | ||
35 | 36 | ||
36 | #include "gk20a/gk20a.h" | 37 | #include "gk20a/gk20a.h" |
37 | #include "gk20a/gr_gk20a.h" | 38 | #include "gk20a/gr_gk20a.h" |
diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c index 25466e7b..321a89fd 100644 --- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c | |||
@@ -78,6 +78,7 @@ | |||
78 | #include <nvgpu/ptimer.h> | 78 | #include <nvgpu/ptimer.h> |
79 | #include <nvgpu/ctxsw_trace.h> | 79 | #include <nvgpu/ctxsw_trace.h> |
80 | #include <nvgpu/error_notifier.h> | 80 | #include <nvgpu/error_notifier.h> |
81 | #include <nvgpu/channel.h> | ||
81 | 82 | ||
82 | #include <nvgpu/hw/gp10b/hw_proj_gp10b.h> | 83 | #include <nvgpu/hw/gp10b/hw_proj_gp10b.h> |
83 | #include <nvgpu/hw/gp10b/hw_fifo_gp10b.h> | 84 | #include <nvgpu/hw/gp10b/hw_fifo_gp10b.h> |
diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.c b/drivers/gpu/nvgpu/gv100/hal_gv100.c index 6a4f874d..1bc5d091 100644 --- a/drivers/gpu/nvgpu/gv100/hal_gv100.c +++ b/drivers/gpu/nvgpu/gv100/hal_gv100.c | |||
@@ -113,6 +113,7 @@ | |||
113 | #include <nvgpu/ctxsw_trace.h> | 113 | #include <nvgpu/ctxsw_trace.h> |
114 | #include <nvgpu/error_notifier.h> | 114 | #include <nvgpu/error_notifier.h> |
115 | #include <nvgpu/clk_arb.h> | 115 | #include <nvgpu/clk_arb.h> |
116 | #include <nvgpu/channel.h> | ||
116 | 117 | ||
117 | #include <nvgpu/hw/gv100/hw_proj_gv100.h> | 118 | #include <nvgpu/hw/gv100/hw_proj_gv100.h> |
118 | #include <nvgpu/hw/gv100/hw_fifo_gv100.h> | 119 | #include <nvgpu/hw/gv100/hw_fifo_gv100.h> |
diff --git a/drivers/gpu/nvgpu/gv11b/css_gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/css_gr_gv11b.c index 17d9e051..4707ab31 100644 --- a/drivers/gpu/nvgpu/gv11b/css_gr_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/css_gr_gv11b.c | |||
@@ -35,6 +35,7 @@ | |||
35 | #include <nvgpu/dma.h> | 35 | #include <nvgpu/dma.h> |
36 | #include <nvgpu/io.h> | 36 | #include <nvgpu/io.h> |
37 | #include <nvgpu/utils.h> | 37 | #include <nvgpu/utils.h> |
38 | #include <nvgpu/channel.h> | ||
38 | 39 | ||
39 | #include "gk20a/gk20a.h" | 40 | #include "gk20a/gk20a.h" |
40 | #include "gk20a/css_gr_gk20a.h" | 41 | #include "gk20a/css_gr_gk20a.h" |
diff --git a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c index 893835a4..0119c215 100644 --- a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c | |||
@@ -39,10 +39,10 @@ | |||
39 | #include <nvgpu/ptimer.h> | 39 | #include <nvgpu/ptimer.h> |
40 | #include <nvgpu/io.h> | 40 | #include <nvgpu/io.h> |
41 | #include <nvgpu/utils.h> | 41 | #include <nvgpu/utils.h> |
42 | #include <nvgpu/channel.h> | ||
42 | 43 | ||
43 | #include "gk20a/gk20a.h" | 44 | #include "gk20a/gk20a.h" |
44 | #include "gk20a/fifo_gk20a.h" | 45 | #include "gk20a/fifo_gk20a.h" |
45 | #include "gk20a/channel_gk20a.h" | ||
46 | 46 | ||
47 | #include "gp10b/fifo_gp10b.h" | 47 | #include "gp10b/fifo_gp10b.h" |
48 | 48 | ||
diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c index 0fbba3a0..0938e2ed 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c | |||
@@ -35,6 +35,7 @@ | |||
35 | #include <nvgpu/io.h> | 35 | #include <nvgpu/io.h> |
36 | #include <nvgpu/utils.h> | 36 | #include <nvgpu/utils.h> |
37 | #include <nvgpu/bitops.h> | 37 | #include <nvgpu/bitops.h> |
38 | #include <nvgpu/channel.h> | ||
38 | 39 | ||
39 | #include "gk20a/gk20a.h" | 40 | #include "gk20a/gk20a.h" |
40 | #include "gk20a/gr_gk20a.h" | 41 | #include "gk20a/gr_gk20a.h" |
diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index 8d3fb86b..e5d7e632 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c | |||
@@ -94,6 +94,7 @@ | |||
94 | #include <nvgpu/ctxsw_trace.h> | 94 | #include <nvgpu/ctxsw_trace.h> |
95 | #include <nvgpu/error_notifier.h> | 95 | #include <nvgpu/error_notifier.h> |
96 | #include <nvgpu/bug.h> | 96 | #include <nvgpu/bug.h> |
97 | #include <nvgpu/channel.h> | ||
97 | 98 | ||
98 | #include <nvgpu/hw/gv11b/hw_proj_gv11b.h> | 99 | #include <nvgpu/hw/gv11b/hw_proj_gv11b.h> |
99 | #include <nvgpu/hw/gv11b/hw_fifo_gv11b.h> | 100 | #include <nvgpu/hw/gv11b/hw_fifo_gv11b.h> |
diff --git a/drivers/gpu/nvgpu/gv11b/subctx_gv11b.c b/drivers/gpu/nvgpu/gv11b/subctx_gv11b.c index 4e429567..25626cd4 100644 --- a/drivers/gpu/nvgpu/gv11b/subctx_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/subctx_gv11b.c | |||
@@ -30,6 +30,7 @@ | |||
30 | #include <nvgpu/log.h> | 30 | #include <nvgpu/log.h> |
31 | #include <nvgpu/gmmu.h> | 31 | #include <nvgpu/gmmu.h> |
32 | #include <nvgpu/utils.h> | 32 | #include <nvgpu/utils.h> |
33 | #include <nvgpu/channel.h> | ||
33 | 34 | ||
34 | #include <nvgpu/hw/gv11b/hw_ram_gv11b.h> | 35 | #include <nvgpu/hw/gv11b/hw_ram_gv11b.h> |
35 | #include <nvgpu/hw/gv11b/hw_ctxsw_prog_gv11b.h> | 36 | #include <nvgpu/hw/gv11b/hw_ctxsw_prog_gv11b.h> |
diff --git a/drivers/gpu/nvgpu/include/nvgpu/channel.h b/drivers/gpu/nvgpu/include/nvgpu/channel.h index 7434f0e7..6cca843e 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/channel.h +++ b/drivers/gpu/nvgpu/include/nvgpu/channel.h | |||
@@ -23,13 +23,418 @@ | |||
23 | #ifndef NVGPU_CHANNEL_H | 23 | #ifndef NVGPU_CHANNEL_H |
24 | #define NVGPU_CHANNEL_H | 24 | #define NVGPU_CHANNEL_H |
25 | 25 | ||
26 | #include <nvgpu/types.h> | 26 | #include <nvgpu/list.h> |
27 | #include <nvgpu/lock.h> | ||
28 | #include <nvgpu/timers.h> | ||
29 | #include <nvgpu/cond.h> | ||
30 | #include <nvgpu/atomic.h> | ||
31 | #include <nvgpu/nvgpu_mem.h> | ||
32 | #include <nvgpu/allocator.h> | ||
27 | 33 | ||
28 | #include "gk20a/gk20a.h" | 34 | struct gk20a; |
29 | 35 | struct dbg_session_gk20a; | |
30 | struct nvgpu_channel_fence; | ||
31 | struct gk20a_fence; | 36 | struct gk20a_fence; |
32 | struct fifo_profile_gk20a; | 37 | struct fifo_profile_gk20a; |
38 | struct gk20a_channel_sync; | ||
39 | struct nvgpu_gpfifo_userdata; | ||
40 | |||
41 | /* Flags to be passed to gk20a_channel_alloc_gpfifo() */ | ||
42 | #define NVGPU_GPFIFO_FLAGS_SUPPORT_VPR (1U << 0U) | ||
43 | #define NVGPU_GPFIFO_FLAGS_SUPPORT_DETERMINISTIC (1U << 1U) | ||
44 | #define NVGPU_GPFIFO_FLAGS_REPLAYABLE_FAULTS_ENABLE (1U << 2U) | ||
45 | #define NVGPU_GPFIFO_FLAGS_USERMODE_SUPPORT (1U << 3U) | ||
46 | |||
47 | /* Flags to be passed to nvgpu_submit_channel_gpfifo() */ | ||
48 | #define NVGPU_SUBMIT_FLAGS_FENCE_WAIT (1U << 0U) | ||
49 | #define NVGPU_SUBMIT_FLAGS_FENCE_GET (1U << 1U) | ||
50 | #define NVGPU_SUBMIT_FLAGS_HW_FORMAT (1U << 2U) | ||
51 | #define NVGPU_SUBMIT_FLAGS_SYNC_FENCE (1U << 3U) | ||
52 | #define NVGPU_SUBMIT_FLAGS_SUPPRESS_WFI (1U << 4U) | ||
53 | #define NVGPU_SUBMIT_FLAGS_SKIP_BUFFER_REFCOUNTING (1U << 5U) | ||
54 | |||
55 | /* | ||
56 | * The binary format of 'struct nvgpu_channel_fence' introduced here | ||
57 | * should match that of 'struct nvgpu_fence' defined in uapi header, since | ||
58 | * this struct is intended to be a mirror copy of the uapi struct. This is | ||
59 | * not a hard requirement though because of nvgpu_get_fence_args conversion | ||
60 | * function. | ||
61 | */ | ||
62 | struct nvgpu_channel_fence { | ||
63 | u32 id; | ||
64 | u32 value; | ||
65 | }; | ||
66 | |||
67 | /* | ||
68 | * The binary format of 'struct nvgpu_gpfifo_entry' introduced here | ||
69 | * should match that of 'struct nvgpu_gpfifo' defined in uapi header, since | ||
70 | * this struct is intended to be a mirror copy of the uapi struct. This is | ||
71 | * a rigid requirement because there's no conversion function and there are | ||
72 | * memcpy's present between the user gpfifo (of type nvgpu_gpfifo) and the | ||
73 | * kern gpfifo (of type nvgpu_gpfifo_entry). | ||
74 | */ | ||
75 | struct nvgpu_gpfifo_entry { | ||
76 | u32 entry0; | ||
77 | u32 entry1; | ||
78 | }; | ||
79 | |||
80 | struct gpfifo_desc { | ||
81 | struct nvgpu_mem mem; | ||
82 | u32 entry_num; | ||
83 | |||
84 | u32 get; | ||
85 | u32 put; | ||
86 | |||
87 | bool wrap; | ||
88 | |||
89 | /* if gpfifo lives in vidmem or is forced to go via PRAMIN, first copy | ||
90 | * from userspace to pipe and then from pipe to gpu buffer */ | ||
91 | void *pipe; | ||
92 | }; | ||
93 | |||
94 | struct nvgpu_gpfifo_args { | ||
95 | u32 num_entries; | ||
96 | u32 num_inflight_jobs; | ||
97 | u32 userd_dmabuf_fd; | ||
98 | u32 gpfifo_dmabuf_fd; | ||
99 | u32 work_submit_token; | ||
100 | u32 flags; | ||
101 | }; | ||
102 | |||
103 | struct notification { | ||
104 | struct { | ||
105 | u32 nanoseconds[2]; | ||
106 | } timestamp; | ||
107 | u32 info32; | ||
108 | u16 info16; | ||
109 | u16 status; | ||
110 | }; | ||
111 | |||
112 | struct priv_cmd_queue { | ||
113 | struct nvgpu_mem mem; | ||
114 | u32 size; /* num of entries in words */ | ||
115 | u32 put; /* put for priv cmd queue */ | ||
116 | u32 get; /* get for priv cmd queue */ | ||
117 | }; | ||
118 | |||
119 | struct priv_cmd_entry { | ||
120 | bool valid; | ||
121 | struct nvgpu_mem *mem; | ||
122 | u32 off; /* offset in mem, in u32 entries */ | ||
123 | u64 gva; | ||
124 | u32 get; /* start of entry in queue */ | ||
125 | u32 size; /* in words */ | ||
126 | }; | ||
127 | |||
128 | struct channel_gk20a_job { | ||
129 | struct nvgpu_mapped_buf **mapped_buffers; | ||
130 | int num_mapped_buffers; | ||
131 | struct gk20a_fence *post_fence; | ||
132 | struct priv_cmd_entry *wait_cmd; | ||
133 | struct priv_cmd_entry *incr_cmd; | ||
134 | struct nvgpu_list_node list; | ||
135 | }; | ||
136 | |||
137 | static inline struct channel_gk20a_job * | ||
138 | channel_gk20a_job_from_list(struct nvgpu_list_node *node) | ||
139 | { | ||
140 | return (struct channel_gk20a_job *) | ||
141 | ((uintptr_t)node - offsetof(struct channel_gk20a_job, list)); | ||
142 | }; | ||
143 | |||
144 | struct channel_gk20a_joblist { | ||
145 | struct { | ||
146 | bool enabled; | ||
147 | unsigned int length; | ||
148 | unsigned int put; | ||
149 | unsigned int get; | ||
150 | struct channel_gk20a_job *jobs; | ||
151 | struct nvgpu_mutex read_lock; | ||
152 | } pre_alloc; | ||
153 | |||
154 | struct { | ||
155 | struct nvgpu_list_node jobs; | ||
156 | struct nvgpu_spinlock lock; | ||
157 | } dynamic; | ||
158 | |||
159 | /* | ||
160 | * Synchronize abort cleanup (when closing a channel) and job cleanup | ||
161 | * (asynchronously from worker) - protect from concurrent access when | ||
162 | * job resources are being freed. | ||
163 | */ | ||
164 | struct nvgpu_mutex cleanup_lock; | ||
165 | }; | ||
166 | |||
167 | struct channel_gk20a_timeout { | ||
168 | /* lock protects the running timer state */ | ||
169 | struct nvgpu_raw_spinlock lock; | ||
170 | struct nvgpu_timeout timer; | ||
171 | bool running; | ||
172 | u32 gp_get; | ||
173 | u64 pb_get; | ||
174 | |||
175 | /* lock not needed */ | ||
176 | u32 limit_ms; | ||
177 | bool enabled; | ||
178 | bool debug_dump; | ||
179 | }; | ||
180 | |||
181 | /* | ||
182 | * Track refcount actions, saving their stack traces. This number specifies how | ||
183 | * many most recent actions are stored in a buffer. Set to 0 to disable. 128 | ||
184 | * should be enough to track moderately hard problems from the start. | ||
185 | */ | ||
186 | #define GK20A_CHANNEL_REFCOUNT_TRACKING 0 | ||
187 | /* Stack depth for the saved actions. */ | ||
188 | #define GK20A_CHANNEL_REFCOUNT_TRACKING_STACKLEN 8 | ||
189 | |||
190 | /* | ||
191 | * Because the puts and gets are not linked together explicitly (although they | ||
192 | * should always come in pairs), it's not possible to tell which ref holder to | ||
193 | * delete from the list when doing a put. So, just store some number of most | ||
194 | * recent gets and puts in a ring buffer, to obtain a history. | ||
195 | * | ||
196 | * These are zeroed when a channel is closed, so a new one starts fresh. | ||
197 | */ | ||
198 | |||
199 | enum channel_gk20a_ref_action_type { | ||
200 | channel_gk20a_ref_action_get, | ||
201 | channel_gk20a_ref_action_put | ||
202 | }; | ||
203 | |||
204 | #if GK20A_CHANNEL_REFCOUNT_TRACKING | ||
205 | |||
206 | #include <linux/stacktrace.h> | ||
207 | |||
208 | struct channel_gk20a_ref_action { | ||
209 | enum channel_gk20a_ref_action_type type; | ||
210 | s64 timestamp_ms; | ||
211 | /* | ||
212 | * Many of these traces will be similar. Simpler to just capture | ||
213 | * duplicates than to have a separate database for the entries. | ||
214 | */ | ||
215 | struct stack_trace trace; | ||
216 | unsigned long trace_entries[GK20A_CHANNEL_REFCOUNT_TRACKING_STACKLEN]; | ||
217 | }; | ||
218 | #endif | ||
219 | |||
220 | /* this is the priv element of struct nvhost_channel */ | ||
221 | struct channel_gk20a { | ||
222 | struct gk20a *g; /* set only when channel is active */ | ||
223 | |||
224 | struct nvgpu_list_node free_chs; | ||
225 | |||
226 | struct nvgpu_spinlock ref_obtain_lock; | ||
227 | nvgpu_atomic_t ref_count; | ||
228 | struct nvgpu_cond ref_count_dec_wq; | ||
229 | #if GK20A_CHANNEL_REFCOUNT_TRACKING | ||
230 | /* | ||
231 | * Ring buffer for most recent refcount gets and puts. Protected by | ||
232 | * ref_actions_lock when getting or putting refs (i.e., adding | ||
233 | * entries), and when reading entries. | ||
234 | */ | ||
235 | struct channel_gk20a_ref_action ref_actions[ | ||
236 | GK20A_CHANNEL_REFCOUNT_TRACKING]; | ||
237 | size_t ref_actions_put; /* index of next write */ | ||
238 | struct nvgpu_spinlock ref_actions_lock; | ||
239 | #endif | ||
240 | |||
241 | struct nvgpu_semaphore_int *hw_sema; | ||
242 | |||
243 | nvgpu_atomic_t bound; | ||
244 | |||
245 | int chid; | ||
246 | int tsgid; | ||
247 | pid_t pid; | ||
248 | pid_t tgid; | ||
249 | struct nvgpu_mutex ioctl_lock; | ||
250 | |||
251 | struct nvgpu_list_node ch_entry; /* channel's entry in TSG */ | ||
252 | |||
253 | struct channel_gk20a_joblist joblist; | ||
254 | struct nvgpu_allocator fence_allocator; | ||
255 | |||
256 | struct vm_gk20a *vm; | ||
257 | |||
258 | struct gpfifo_desc gpfifo; | ||
259 | |||
260 | struct nvgpu_mem usermode_userd; /* Used for Usermode Submission */ | ||
261 | struct nvgpu_mem usermode_gpfifo; | ||
262 | struct nvgpu_mem inst_block; | ||
263 | |||
264 | u64 userd_iova; | ||
265 | u64 userd_gpu_va; | ||
266 | |||
267 | struct priv_cmd_queue priv_cmd_q; | ||
268 | |||
269 | struct nvgpu_cond notifier_wq; | ||
270 | struct nvgpu_cond semaphore_wq; | ||
271 | |||
272 | /* kernel watchdog to kill stuck jobs */ | ||
273 | struct channel_gk20a_timeout timeout; | ||
274 | |||
275 | /* for job cleanup handling in the background worker */ | ||
276 | struct nvgpu_list_node worker_item; | ||
277 | |||
278 | #if defined(CONFIG_GK20A_CYCLE_STATS) | ||
279 | struct { | ||
280 | void *cyclestate_buffer; | ||
281 | u32 cyclestate_buffer_size; | ||
282 | struct nvgpu_mutex cyclestate_buffer_mutex; | ||
283 | } cyclestate; | ||
284 | |||
285 | struct nvgpu_mutex cs_client_mutex; | ||
286 | struct gk20a_cs_snapshot_client *cs_client; | ||
287 | #endif | ||
288 | struct nvgpu_mutex dbg_s_lock; | ||
289 | struct nvgpu_list_node dbg_s_list; | ||
290 | |||
291 | struct nvgpu_mutex sync_lock; | ||
292 | struct gk20a_channel_sync *sync; | ||
293 | struct gk20a_channel_sync *user_sync; | ||
294 | |||
295 | #ifdef CONFIG_TEGRA_GR_VIRTUALIZATION | ||
296 | u64 virt_ctx; | ||
297 | #endif | ||
298 | |||
299 | struct nvgpu_mem ctx_header; | ||
300 | |||
301 | /* Any operating system specific data. */ | ||
302 | void *os_priv; | ||
303 | |||
304 | u32 obj_class; /* we support only one obj per channel */ | ||
305 | |||
306 | u32 timeout_accumulated_ms; | ||
307 | u32 timeout_gpfifo_get; | ||
308 | |||
309 | u32 subctx_id; | ||
310 | u32 runqueue_sel; | ||
311 | |||
312 | u32 timeout_ms_max; | ||
313 | u32 runlist_id; | ||
314 | |||
315 | bool mmu_nack_handled; | ||
316 | bool has_timedout; | ||
317 | bool referenceable; | ||
318 | bool vpr; | ||
319 | bool deterministic; | ||
320 | /* deterministic, but explicitly idle and submits disallowed */ | ||
321 | bool deterministic_railgate_allowed; | ||
322 | bool cde; | ||
323 | bool usermode_submit_enabled; | ||
324 | bool timeout_debug_dump; | ||
325 | bool has_os_fence_framework_support; | ||
326 | |||
327 | bool is_privileged_channel; | ||
328 | }; | ||
329 | |||
330 | static inline struct channel_gk20a * | ||
331 | channel_gk20a_from_free_chs(struct nvgpu_list_node *node) | ||
332 | { | ||
333 | return (struct channel_gk20a *) | ||
334 | ((uintptr_t)node - offsetof(struct channel_gk20a, free_chs)); | ||
335 | }; | ||
336 | |||
337 | static inline struct channel_gk20a * | ||
338 | channel_gk20a_from_ch_entry(struct nvgpu_list_node *node) | ||
339 | { | ||
340 | return (struct channel_gk20a *) | ||
341 | ((uintptr_t)node - offsetof(struct channel_gk20a, ch_entry)); | ||
342 | }; | ||
343 | |||
344 | static inline struct channel_gk20a * | ||
345 | channel_gk20a_from_worker_item(struct nvgpu_list_node *node) | ||
346 | { | ||
347 | return (struct channel_gk20a *) | ||
348 | ((uintptr_t)node - offsetof(struct channel_gk20a, worker_item)); | ||
349 | }; | ||
350 | |||
351 | static inline bool gk20a_channel_as_bound(struct channel_gk20a *ch) | ||
352 | { | ||
353 | return !!ch->vm; | ||
354 | } | ||
355 | int channel_gk20a_commit_va(struct channel_gk20a *c); | ||
356 | int gk20a_init_channel_support(struct gk20a *, u32 chid); | ||
357 | |||
358 | /* must be inside gk20a_busy()..gk20a_idle() */ | ||
359 | void gk20a_channel_close(struct channel_gk20a *ch); | ||
360 | void __gk20a_channel_kill(struct channel_gk20a *ch); | ||
361 | |||
362 | bool gk20a_channel_update_and_check_timeout(struct channel_gk20a *ch, | ||
363 | u32 timeout_delta_ms, bool *progress); | ||
364 | void gk20a_disable_channel(struct channel_gk20a *ch); | ||
365 | void gk20a_channel_abort(struct channel_gk20a *ch, bool channel_preempt); | ||
366 | void gk20a_channel_abort_clean_up(struct channel_gk20a *ch); | ||
367 | void gk20a_channel_semaphore_wakeup(struct gk20a *g, bool post_events); | ||
368 | int gk20a_channel_alloc_priv_cmdbuf(struct channel_gk20a *c, u32 size, | ||
369 | struct priv_cmd_entry *entry); | ||
370 | int gk20a_free_priv_cmdbuf(struct channel_gk20a *c, struct priv_cmd_entry *e); | ||
371 | |||
372 | int gk20a_enable_channel_tsg(struct gk20a *g, struct channel_gk20a *ch); | ||
373 | int gk20a_disable_channel_tsg(struct gk20a *g, struct channel_gk20a *ch); | ||
374 | |||
375 | int gk20a_channel_suspend(struct gk20a *g); | ||
376 | int gk20a_channel_resume(struct gk20a *g); | ||
377 | |||
378 | void gk20a_channel_deterministic_idle(struct gk20a *g); | ||
379 | void gk20a_channel_deterministic_unidle(struct gk20a *g); | ||
380 | |||
381 | int nvgpu_channel_worker_init(struct gk20a *g); | ||
382 | void nvgpu_channel_worker_deinit(struct gk20a *g); | ||
383 | |||
384 | struct channel_gk20a *gk20a_get_channel_from_file(int fd); | ||
385 | void gk20a_channel_update(struct channel_gk20a *c); | ||
386 | |||
387 | /* returns ch if reference was obtained */ | ||
388 | struct channel_gk20a *__must_check _gk20a_channel_get(struct channel_gk20a *ch, | ||
389 | const char *caller); | ||
390 | #define gk20a_channel_get(ch) _gk20a_channel_get(ch, __func__) | ||
391 | |||
392 | |||
393 | void _gk20a_channel_put(struct channel_gk20a *ch, const char *caller); | ||
394 | #define gk20a_channel_put(ch) _gk20a_channel_put(ch, __func__) | ||
395 | |||
396 | int gk20a_wait_channel_idle(struct channel_gk20a *ch); | ||
397 | |||
398 | /* runlist_id -1 is synonym for ENGINE_GR_GK20A runlist id */ | ||
399 | struct channel_gk20a *gk20a_open_new_channel(struct gk20a *g, | ||
400 | s32 runlist_id, | ||
401 | bool is_privileged_channel, | ||
402 | pid_t pid, pid_t tid); | ||
403 | |||
404 | int gk20a_channel_alloc_gpfifo(struct channel_gk20a *c, | ||
405 | struct nvgpu_gpfifo_args *gpfifo_args); | ||
406 | |||
407 | void gk20a_channel_timeout_restart_all_channels(struct gk20a *g); | ||
408 | |||
409 | bool channel_gk20a_is_prealloc_enabled(struct channel_gk20a *c); | ||
410 | void channel_gk20a_joblist_lock(struct channel_gk20a *c); | ||
411 | void channel_gk20a_joblist_unlock(struct channel_gk20a *c); | ||
412 | bool channel_gk20a_joblist_is_empty(struct channel_gk20a *c); | ||
413 | |||
414 | int channel_gk20a_update_runlist(struct channel_gk20a *c, bool add); | ||
415 | int gk20a_channel_get_timescale_from_timeslice(struct gk20a *g, | ||
416 | unsigned int timeslice_period, | ||
417 | unsigned int *__timeslice_timeout, unsigned int *__timeslice_scale); | ||
418 | |||
419 | void gk20a_wait_until_counter_is_N( | ||
420 | struct channel_gk20a *ch, nvgpu_atomic_t *counter, int wait_value, | ||
421 | struct nvgpu_cond *c, const char *caller, const char *counter_name); | ||
422 | int channel_gk20a_alloc_job(struct channel_gk20a *c, | ||
423 | struct channel_gk20a_job **job_out); | ||
424 | void channel_gk20a_free_job(struct channel_gk20a *c, | ||
425 | struct channel_gk20a_job *job); | ||
426 | u32 nvgpu_get_gp_free_count(struct channel_gk20a *c); | ||
427 | u32 nvgpu_gp_free_count(struct channel_gk20a *c); | ||
428 | int gk20a_channel_add_job(struct channel_gk20a *c, | ||
429 | struct channel_gk20a_job *job, | ||
430 | bool skip_buffer_refcounting); | ||
431 | void free_priv_cmdbuf(struct channel_gk20a *c, | ||
432 | struct priv_cmd_entry *e); | ||
433 | void gk20a_channel_clean_up_jobs(struct channel_gk20a *c, | ||
434 | bool clean_all); | ||
435 | |||
436 | void gk20a_channel_free_usermode_buffers(struct channel_gk20a *c); | ||
437 | u32 nvgpu_get_gpfifo_entry_size(void); | ||
33 | 438 | ||
34 | int nvgpu_submit_channel_gpfifo_user(struct channel_gk20a *c, | 439 | int nvgpu_submit_channel_gpfifo_user(struct channel_gk20a *c, |
35 | struct nvgpu_gpfifo_userdata userdata, | 440 | struct nvgpu_gpfifo_userdata userdata, |
@@ -47,9 +452,9 @@ int nvgpu_submit_channel_gpfifo_kernel(struct channel_gk20a *c, | |||
47 | struct gk20a_fence **fence_out); | 452 | struct gk20a_fence **fence_out); |
48 | 453 | ||
49 | #ifdef CONFIG_DEBUG_FS | 454 | #ifdef CONFIG_DEBUG_FS |
50 | void trace_write_pushbuffers(struct channel_gk20a *c, int count); | 455 | void trace_write_pushbuffers(struct channel_gk20a *c, u32 count); |
51 | #else | 456 | #else |
52 | static inline void trace_write_pushbuffers(struct channel_gk20a *c, int count) | 457 | static inline void trace_write_pushbuffers(struct channel_gk20a *c, u32 count) |
53 | { | 458 | { |
54 | } | 459 | } |
55 | #endif | 460 | #endif |
diff --git a/drivers/gpu/nvgpu/os/linux/cde.c b/drivers/gpu/nvgpu/os/linux/cde.c index 30cd0bff..7aac8e01 100644 --- a/drivers/gpu/nvgpu/os/linux/cde.c +++ b/drivers/gpu/nvgpu/os/linux/cde.c | |||
@@ -38,7 +38,6 @@ | |||
38 | #include <nvgpu/linux/vm.h> | 38 | #include <nvgpu/linux/vm.h> |
39 | 39 | ||
40 | #include "gk20a/gk20a.h" | 40 | #include "gk20a/gk20a.h" |
41 | #include "gk20a/channel_gk20a.h" | ||
42 | #include "gk20a/mm_gk20a.h" | 41 | #include "gk20a/mm_gk20a.h" |
43 | #include "gk20a/fence_gk20a.h" | 42 | #include "gk20a/fence_gk20a.h" |
44 | #include "gk20a/gr_gk20a.h" | 43 | #include "gk20a/gr_gk20a.h" |
diff --git a/drivers/gpu/nvgpu/os/linux/ctxsw_trace.c b/drivers/gpu/nvgpu/os/linux/ctxsw_trace.c index 16b040da..aa5ed250 100644 --- a/drivers/gpu/nvgpu/os/linux/ctxsw_trace.c +++ b/drivers/gpu/nvgpu/os/linux/ctxsw_trace.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <trace/events/gk20a.h> | 21 | #include <trace/events/gk20a.h> |
22 | #include <uapi/linux/nvgpu.h> | 22 | #include <uapi/linux/nvgpu.h> |
23 | #include <nvgpu/ctxsw_trace.h> | 23 | #include <nvgpu/ctxsw_trace.h> |
24 | #include <nvgpu/channel.h> | ||
24 | 25 | ||
25 | #include "gk20a/gk20a.h" | 26 | #include "gk20a/gk20a.h" |
26 | #include "gk20a/gr_gk20a.h" | 27 | #include "gk20a/gr_gk20a.h" |
diff --git a/drivers/gpu/nvgpu/os/linux/debug_fifo.c b/drivers/gpu/nvgpu/os/linux/debug_fifo.c index 2b5674c0..0c791a42 100644 --- a/drivers/gpu/nvgpu/os/linux/debug_fifo.c +++ b/drivers/gpu/nvgpu/os/linux/debug_fifo.c | |||
@@ -20,6 +20,7 @@ | |||
20 | 20 | ||
21 | #include <nvgpu/sort.h> | 21 | #include <nvgpu/sort.h> |
22 | #include <nvgpu/timers.h> | 22 | #include <nvgpu/timers.h> |
23 | #include <nvgpu/channel.h> | ||
23 | 24 | ||
24 | void __gk20a_fifo_profile_free(struct nvgpu_ref *ref); | 25 | void __gk20a_fifo_profile_free(struct nvgpu_ref *ref); |
25 | 26 | ||
diff --git a/drivers/gpu/nvgpu/os/linux/ioctl_as.c b/drivers/gpu/nvgpu/os/linux/ioctl_as.c index 7d1d618e..4e479e8e 100644 --- a/drivers/gpu/nvgpu/os/linux/ioctl_as.c +++ b/drivers/gpu/nvgpu/os/linux/ioctl_as.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <nvgpu/gmmu.h> | 24 | #include <nvgpu/gmmu.h> |
25 | #include <nvgpu/vm_area.h> | 25 | #include <nvgpu/vm_area.h> |
26 | #include <nvgpu/log2.h> | 26 | #include <nvgpu/log2.h> |
27 | #include <nvgpu/channel.h> | ||
27 | 28 | ||
28 | #include <nvgpu/linux/vm.h> | 29 | #include <nvgpu/linux/vm.h> |
29 | 30 | ||
diff --git a/drivers/gpu/nvgpu/os/linux/ioctl_ctrl.c b/drivers/gpu/nvgpu/os/linux/ioctl_ctrl.c index 2f013029..19b4286d 100644 --- a/drivers/gpu/nvgpu/os/linux/ioctl_ctrl.c +++ b/drivers/gpu/nvgpu/os/linux/ioctl_ctrl.c | |||
@@ -31,6 +31,7 @@ | |||
31 | #include <nvgpu/sizes.h> | 31 | #include <nvgpu/sizes.h> |
32 | #include <nvgpu/list.h> | 32 | #include <nvgpu/list.h> |
33 | #include <nvgpu/clk_arb.h> | 33 | #include <nvgpu/clk_arb.h> |
34 | #include <nvgpu/channel.h> | ||
34 | 35 | ||
35 | #include "ioctl_ctrl.h" | 36 | #include "ioctl_ctrl.h" |
36 | #include "ioctl_dbg.h" | 37 | #include "ioctl_dbg.h" |
diff --git a/drivers/gpu/nvgpu/os/linux/ioctl_dbg.c b/drivers/gpu/nvgpu/os/linux/ioctl_dbg.c index 3931ab12..e4e7394e 100644 --- a/drivers/gpu/nvgpu/os/linux/ioctl_dbg.c +++ b/drivers/gpu/nvgpu/os/linux/ioctl_dbg.c | |||
@@ -30,6 +30,7 @@ | |||
30 | #include <nvgpu/atomic.h> | 30 | #include <nvgpu/atomic.h> |
31 | #include <nvgpu/cond.h> | 31 | #include <nvgpu/cond.h> |
32 | #include <nvgpu/utils.h> | 32 | #include <nvgpu/utils.h> |
33 | #include <nvgpu/channel.h> | ||
33 | 34 | ||
34 | #include <nvgpu/linux/vm.h> | 35 | #include <nvgpu/linux/vm.h> |
35 | 36 | ||
diff --git a/drivers/gpu/nvgpu/os/linux/ioctl_tsg.c b/drivers/gpu/nvgpu/os/linux/ioctl_tsg.c index 6c68ca58..6dd96d6b 100644 --- a/drivers/gpu/nvgpu/os/linux/ioctl_tsg.c +++ b/drivers/gpu/nvgpu/os/linux/ioctl_tsg.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <nvgpu/kmem.h> | 25 | #include <nvgpu/kmem.h> |
26 | #include <nvgpu/log.h> | 26 | #include <nvgpu/log.h> |
27 | #include <nvgpu/os_sched.h> | 27 | #include <nvgpu/os_sched.h> |
28 | #include <nvgpu/channel.h> | ||
28 | 29 | ||
29 | #include "gk20a/gk20a.h" | 30 | #include "gk20a/gk20a.h" |
30 | #include "gk20a/tsg_gk20a.h" | 31 | #include "gk20a/tsg_gk20a.h" |
diff --git a/drivers/gpu/nvgpu/os/linux/linux-channel.c b/drivers/gpu/nvgpu/os/linux/linux-channel.c index fef44f2b..77c14b56 100644 --- a/drivers/gpu/nvgpu/os/linux/linux-channel.c +++ b/drivers/gpu/nvgpu/os/linux/linux-channel.c | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <nvgpu/debug.h> | 18 | #include <nvgpu/debug.h> |
19 | #include <nvgpu/error_notifier.h> | 19 | #include <nvgpu/error_notifier.h> |
20 | #include <nvgpu/os_sched.h> | 20 | #include <nvgpu/os_sched.h> |
21 | #include <nvgpu/channel.h> | ||
21 | 22 | ||
22 | /* | 23 | /* |
23 | * This is required for nvgpu_vm_find_buf() which is used in the tracing | 24 | * This is required for nvgpu_vm_find_buf() which is used in the tracing |
diff --git a/drivers/gpu/nvgpu/os/linux/module.c b/drivers/gpu/nvgpu/os/linux/module.c index 55f55f00..85439b88 100644 --- a/drivers/gpu/nvgpu/os/linux/module.c +++ b/drivers/gpu/nvgpu/os/linux/module.c | |||
@@ -44,6 +44,7 @@ | |||
44 | #include <nvgpu/sim.h> | 44 | #include <nvgpu/sim.h> |
45 | #include <nvgpu/clk_arb.h> | 45 | #include <nvgpu/clk_arb.h> |
46 | #include <nvgpu/timers.h> | 46 | #include <nvgpu/timers.h> |
47 | #include <nvgpu/channel.h> | ||
47 | 48 | ||
48 | #include "platform_gk20a.h" | 49 | #include "platform_gk20a.h" |
49 | #include "sysfs.h" | 50 | #include "sysfs.h" |
diff --git a/drivers/gpu/nvgpu/os/linux/os_fence_android.c b/drivers/gpu/nvgpu/os/linux/os_fence_android.c index 9be8c6c0..297b3b20 100644 --- a/drivers/gpu/nvgpu/os/linux/os_fence_android.c +++ b/drivers/gpu/nvgpu/os/linux/os_fence_android.c | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <nvgpu/types.h> | 16 | #include <nvgpu/types.h> |
17 | #include <nvgpu/os_fence.h> | 17 | #include <nvgpu/os_fence.h> |
18 | #include <nvgpu/linux/os_fence_android.h> | 18 | #include <nvgpu/linux/os_fence_android.h> |
19 | #include <nvgpu/channel.h> | ||
19 | 20 | ||
20 | #include "gk20a/gk20a.h" | 21 | #include "gk20a/gk20a.h" |
21 | 22 | ||
diff --git a/drivers/gpu/nvgpu/os/linux/os_fence_android_sema.c b/drivers/gpu/nvgpu/os/linux/os_fence_android_sema.c index e7070612..ec3ccf0d 100644 --- a/drivers/gpu/nvgpu/os/linux/os_fence_android_sema.c +++ b/drivers/gpu/nvgpu/os/linux/os_fence_android_sema.c | |||
@@ -20,6 +20,7 @@ | |||
20 | #include <nvgpu/os_fence.h> | 20 | #include <nvgpu/os_fence.h> |
21 | #include <nvgpu/linux/os_fence_android.h> | 21 | #include <nvgpu/linux/os_fence_android.h> |
22 | #include <nvgpu/semaphore.h> | 22 | #include <nvgpu/semaphore.h> |
23 | #include <nvgpu/channel.h> | ||
23 | 24 | ||
24 | #include "gk20a/channel_sync_gk20a.h" | 25 | #include "gk20a/channel_sync_gk20a.h" |
25 | #include "gk20a/mm_gk20a.h" | 26 | #include "gk20a/mm_gk20a.h" |
diff --git a/drivers/gpu/nvgpu/os/linux/os_fence_android_syncpt.c b/drivers/gpu/nvgpu/os/linux/os_fence_android_syncpt.c index 103ad243..b15dba19 100644 --- a/drivers/gpu/nvgpu/os/linux/os_fence_android_syncpt.c +++ b/drivers/gpu/nvgpu/os/linux/os_fence_android_syncpt.c | |||
@@ -22,9 +22,9 @@ | |||
22 | #include <nvgpu/linux/os_fence_android.h> | 22 | #include <nvgpu/linux/os_fence_android.h> |
23 | #include <nvgpu/nvhost.h> | 23 | #include <nvgpu/nvhost.h> |
24 | #include <nvgpu/atomic.h> | 24 | #include <nvgpu/atomic.h> |
25 | #include <nvgpu/channel.h> | ||
25 | 26 | ||
26 | #include "gk20a/gk20a.h" | 27 | #include "gk20a/gk20a.h" |
27 | #include "gk20a/channel_gk20a.h" | ||
28 | #include "gk20a/channel_sync_gk20a.h" | 28 | #include "gk20a/channel_sync_gk20a.h" |
29 | #include "gk20a/mm_gk20a.h" | 29 | #include "gk20a/mm_gk20a.h" |
30 | 30 | ||
@@ -120,4 +120,4 @@ int nvgpu_os_fence_syncpt_fdget(struct nvgpu_os_fence *fence_out, | |||
120 | nvgpu_os_fence_init(fence_out, c->g, &syncpt_ops, fence); | 120 | nvgpu_os_fence_init(fence_out, c->g, &syncpt_ops, fence); |
121 | 121 | ||
122 | return 0; | 122 | return 0; |
123 | } \ No newline at end of file | 123 | } |
diff --git a/drivers/gpu/nvgpu/os/linux/sync_sema_android.c b/drivers/gpu/nvgpu/os/linux/sync_sema_android.c index 9598f2df..50465d0c 100644 --- a/drivers/gpu/nvgpu/os/linux/sync_sema_android.c +++ b/drivers/gpu/nvgpu/os/linux/sync_sema_android.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <nvgpu/semaphore.h> | 25 | #include <nvgpu/semaphore.h> |
26 | #include <nvgpu/bug.h> | 26 | #include <nvgpu/bug.h> |
27 | #include <nvgpu/kref.h> | 27 | #include <nvgpu/kref.h> |
28 | #include <nvgpu/channel.h> | ||
28 | #include "../linux/channel.h" | 29 | #include "../linux/channel.h" |
29 | 30 | ||
30 | #include "../drivers/staging/android/sync.h" | 31 | #include "../drivers/staging/android/sync.h" |
diff --git a/drivers/gpu/nvgpu/os/linux/vgpu/vgpu_linux.c b/drivers/gpu/nvgpu/os/linux/vgpu/vgpu_linux.c index 33c067c6..5b7a5c07 100644 --- a/drivers/gpu/nvgpu/os/linux/vgpu/vgpu_linux.c +++ b/drivers/gpu/nvgpu/os/linux/vgpu/vgpu_linux.c | |||
@@ -31,12 +31,12 @@ | |||
31 | #include <nvgpu/ctxsw_trace.h> | 31 | #include <nvgpu/ctxsw_trace.h> |
32 | #include <nvgpu/defaults.h> | 32 | #include <nvgpu/defaults.h> |
33 | #include <nvgpu/ltc.h> | 33 | #include <nvgpu/ltc.h> |
34 | #include <nvgpu/channel.h> | ||
34 | 35 | ||
35 | #include "vgpu_linux.h" | 36 | #include "vgpu_linux.h" |
36 | #include "vgpu/fecs_trace_vgpu.h" | 37 | #include "vgpu/fecs_trace_vgpu.h" |
37 | #include "clk_vgpu.h" | 38 | #include "clk_vgpu.h" |
38 | #include "gk20a/tsg_gk20a.h" | 39 | #include "gk20a/tsg_gk20a.h" |
39 | #include "gk20a/channel_gk20a.h" | ||
40 | #include "gk20a/regops_gk20a.h" | 40 | #include "gk20a/regops_gk20a.h" |
41 | #include "gm20b/hal_gm20b.h" | 41 | #include "gm20b/hal_gm20b.h" |
42 | 42 | ||
diff --git a/drivers/gpu/nvgpu/os/posix/posix-channel.c b/drivers/gpu/nvgpu/os/posix/posix-channel.c index 05697159..5e10b1ee 100644 --- a/drivers/gpu/nvgpu/os/posix/posix-channel.c +++ b/drivers/gpu/nvgpu/os/posix/posix-channel.c | |||
@@ -20,7 +20,7 @@ | |||
20 | * DEALINGS IN THE SOFTWARE. | 20 | * DEALINGS IN THE SOFTWARE. |
21 | */ | 21 | */ |
22 | 22 | ||
23 | #include "gk20a/channel_gk20a.h" | 23 | #include <nvgpu/channel.h> |
24 | 24 | ||
25 | u32 nvgpu_get_gpfifo_entry_size(void) | 25 | u32 nvgpu_get_gpfifo_entry_size(void) |
26 | { | 26 | { |
diff --git a/drivers/gpu/nvgpu/vgpu/css_vgpu.c b/drivers/gpu/nvgpu/vgpu/css_vgpu.c index 40ff8f90..1c97d03a 100644 --- a/drivers/gpu/nvgpu/vgpu/css_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/css_vgpu.c | |||
@@ -26,9 +26,9 @@ | |||
26 | #include <nvgpu/vgpu/tegra_vgpu.h> | 26 | #include <nvgpu/vgpu/tegra_vgpu.h> |
27 | #include <nvgpu/dt.h> | 27 | #include <nvgpu/dt.h> |
28 | #include <nvgpu/bug.h> | 28 | #include <nvgpu/bug.h> |
29 | #include <nvgpu/channel.h> | ||
29 | 30 | ||
30 | #include "gk20a/gk20a.h" | 31 | #include "gk20a/gk20a.h" |
31 | #include "gk20a/channel_gk20a.h" | ||
32 | #include "gk20a/css_gr_gk20a.h" | 32 | #include "gk20a/css_gr_gk20a.h" |
33 | 33 | ||
34 | #include "vgpu/css_vgpu.h" | 34 | #include "vgpu/css_vgpu.h" |
diff --git a/drivers/gpu/nvgpu/vgpu/dbg_vgpu.c b/drivers/gpu/nvgpu/vgpu/dbg_vgpu.c index 2bb3b205..d188f540 100644 --- a/drivers/gpu/nvgpu/vgpu/dbg_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/dbg_vgpu.c | |||
@@ -24,9 +24,9 @@ | |||
24 | #include <nvgpu/vgpu/tegra_vgpu.h> | 24 | #include <nvgpu/vgpu/tegra_vgpu.h> |
25 | #include <nvgpu/vgpu/vgpu.h> | 25 | #include <nvgpu/vgpu/vgpu.h> |
26 | #include <nvgpu/bug.h> | 26 | #include <nvgpu/bug.h> |
27 | #include <nvgpu/channel.h> | ||
27 | 28 | ||
28 | #include "gk20a/gk20a.h" | 29 | #include "gk20a/gk20a.h" |
29 | #include "gk20a/channel_gk20a.h" | ||
30 | #include "gk20a/dbg_gpu_gk20a.h" | 30 | #include "gk20a/dbg_gpu_gk20a.h" |
31 | #include "gk20a/regops_gk20a.h" | 31 | #include "gk20a/regops_gk20a.h" |
32 | #include "dbg_vgpu.h" | 32 | #include "dbg_vgpu.h" |
diff --git a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c index 98c7b9ce..aa5abec9 100644 --- a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c | |||
@@ -33,6 +33,7 @@ | |||
33 | #include <nvgpu/error_notifier.h> | 33 | #include <nvgpu/error_notifier.h> |
34 | #include <nvgpu/vgpu/vgpu_ivc.h> | 34 | #include <nvgpu/vgpu/vgpu_ivc.h> |
35 | #include <nvgpu/vgpu/vgpu.h> | 35 | #include <nvgpu/vgpu/vgpu.h> |
36 | #include <nvgpu/channel.h> | ||
36 | 37 | ||
37 | #include "gk20a/gk20a.h" | 38 | #include "gk20a/gk20a.h" |
38 | #include "fifo_vgpu.h" | 39 | #include "fifo_vgpu.h" |
diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.c b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.c index 86184336..8110902f 100644 --- a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.c +++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_gr_gp10b.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <nvgpu/dma.h> | 24 | #include <nvgpu/dma.h> |
25 | #include <nvgpu/bug.h> | 25 | #include <nvgpu/bug.h> |
26 | #include <nvgpu/vgpu/vgpu.h> | 26 | #include <nvgpu/vgpu/vgpu.h> |
27 | #include <nvgpu/channel.h> | ||
27 | 28 | ||
28 | #include "vgpu/gm20b/vgpu_gr_gm20b.h" | 29 | #include "vgpu/gm20b/vgpu_gr_gm20b.h" |
29 | 30 | ||
diff --git a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c index 7500e92e..0b6a5cb5 100644 --- a/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c +++ b/drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c | |||
@@ -71,6 +71,7 @@ | |||
71 | #include <nvgpu/enabled.h> | 71 | #include <nvgpu/enabled.h> |
72 | #include <nvgpu/vgpu/vgpu.h> | 72 | #include <nvgpu/vgpu/vgpu.h> |
73 | #include <nvgpu/error_notifier.h> | 73 | #include <nvgpu/error_notifier.h> |
74 | #include <nvgpu/channel.h> | ||
74 | 75 | ||
75 | #include <nvgpu/hw/gp10b/hw_fifo_gp10b.h> | 76 | #include <nvgpu/hw/gp10b/hw_fifo_gp10b.h> |
76 | #include <nvgpu/hw/gp10b/hw_ram_gp10b.h> | 77 | #include <nvgpu/hw/gp10b/hw_ram_gp10b.h> |
diff --git a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c index 9ee57fb4..4b1cf212 100644 --- a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c | |||
@@ -29,11 +29,11 @@ | |||
29 | #include <nvgpu/dma.h> | 29 | #include <nvgpu/dma.h> |
30 | #include <nvgpu/vgpu/vgpu_ivc.h> | 30 | #include <nvgpu/vgpu/vgpu_ivc.h> |
31 | #include <nvgpu/vgpu/vgpu.h> | 31 | #include <nvgpu/vgpu/vgpu.h> |
32 | #include <nvgpu/channel.h> | ||
32 | 33 | ||
33 | #include "gr_vgpu.h" | 34 | #include "gr_vgpu.h" |
34 | #include "gk20a/gk20a.h" | 35 | #include "gk20a/gk20a.h" |
35 | #include "gk20a/dbg_gpu_gk20a.h" | 36 | #include "gk20a/dbg_gpu_gk20a.h" |
36 | #include "gk20a/channel_gk20a.h" | ||
37 | #include "gk20a/tsg_gk20a.h" | 37 | #include "gk20a/tsg_gk20a.h" |
38 | #include "gk20a/fecs_trace_gk20a.h" | 38 | #include "gk20a/fecs_trace_gk20a.h" |
39 | 39 | ||
diff --git a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_fifo_gv11b.c b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_fifo_gv11b.c index 43cff1c0..3042ad12 100644 --- a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_fifo_gv11b.c +++ b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_fifo_gv11b.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <nvgpu/vgpu/vgpu.h> | 25 | #include <nvgpu/vgpu/vgpu.h> |
26 | #include <nvgpu/nvhost.h> | 26 | #include <nvgpu/nvhost.h> |
27 | #include <nvgpu/vgpu/tegra_vgpu.h> | 27 | #include <nvgpu/vgpu/tegra_vgpu.h> |
28 | #include <nvgpu/channel.h> | ||
28 | 29 | ||
29 | #include "gv11b/fifo_gv11b.h" | 30 | #include "gv11b/fifo_gv11b.h" |
30 | #include "vgpu_fifo_gv11b.h" | 31 | #include "vgpu_fifo_gv11b.h" |
diff --git a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c index fb118f16..85835cee 100644 --- a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c +++ b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c | |||
@@ -85,6 +85,7 @@ | |||
85 | #include <gv11b/gr_gv11b.h> | 85 | #include <gv11b/gr_gv11b.h> |
86 | 86 | ||
87 | #include <nvgpu/enabled.h> | 87 | #include <nvgpu/enabled.h> |
88 | #include <nvgpu/channel.h> | ||
88 | 89 | ||
89 | #include "vgpu_gv11b.h" | 90 | #include "vgpu_gv11b.h" |
90 | #include "vgpu_gr_gv11b.h" | 91 | #include "vgpu_gr_gv11b.h" |
diff --git a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_subctx_gv11b.c b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_subctx_gv11b.c index b5272ae1..14d10847 100644 --- a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_subctx_gv11b.c +++ b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_subctx_gv11b.c | |||
@@ -25,6 +25,8 @@ | |||
25 | 25 | ||
26 | #include <nvgpu/vgpu/vgpu.h> | 26 | #include <nvgpu/vgpu/vgpu.h> |
27 | #include <nvgpu/vgpu/tegra_vgpu.h> | 27 | #include <nvgpu/vgpu/tegra_vgpu.h> |
28 | #include <nvgpu/channel.h> | ||
29 | |||
28 | #include <nvgpu/hw/gv11b/hw_ctxsw_prog_gv11b.h> | 30 | #include <nvgpu/hw/gv11b/hw_ctxsw_prog_gv11b.h> |
29 | 31 | ||
30 | int vgpu_gv11b_alloc_subctx_header(struct channel_gk20a *c) | 32 | int vgpu_gv11b_alloc_subctx_header(struct channel_gk20a *c) |
diff --git a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_tsg_gv11b.c b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_tsg_gv11b.c index e42bea1f..8c999161 100644 --- a/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_tsg_gv11b.c +++ b/drivers/gpu/nvgpu/vgpu/gv11b/vgpu_tsg_gv11b.c | |||
@@ -22,6 +22,7 @@ | |||
22 | 22 | ||
23 | #include <nvgpu/vgpu/tegra_vgpu.h> | 23 | #include <nvgpu/vgpu/tegra_vgpu.h> |
24 | #include <nvgpu/vgpu/vgpu.h> | 24 | #include <nvgpu/vgpu/vgpu.h> |
25 | #include <nvgpu/channel.h> | ||
25 | 26 | ||
26 | #include "gk20a/gk20a.h" | 27 | #include "gk20a/gk20a.h" |
27 | #include "vgpu_tsg_gv11b.h" | 28 | #include "vgpu_tsg_gv11b.h" |
diff --git a/drivers/gpu/nvgpu/vgpu/mm_vgpu.c b/drivers/gpu/nvgpu/vgpu/mm_vgpu.c index 229a9767..837508bb 100644 --- a/drivers/gpu/nvgpu/vgpu/mm_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/mm_vgpu.c | |||
@@ -27,6 +27,7 @@ | |||
27 | #include <nvgpu/bug.h> | 27 | #include <nvgpu/bug.h> |
28 | #include <nvgpu/vm.h> | 28 | #include <nvgpu/vm.h> |
29 | #include <nvgpu/vm_area.h> | 29 | #include <nvgpu/vm_area.h> |
30 | #include <nvgpu/channel.h> | ||
30 | 31 | ||
31 | #include <nvgpu/vgpu/vm.h> | 32 | #include <nvgpu/vgpu/vm.h> |
32 | #include <nvgpu/vgpu/vgpu.h> | 33 | #include <nvgpu/vgpu/vgpu.h> |
diff --git a/drivers/gpu/nvgpu/vgpu/tsg_vgpu.c b/drivers/gpu/nvgpu/vgpu/tsg_vgpu.c index 7bb8f671..a81b5022 100644 --- a/drivers/gpu/nvgpu/vgpu/tsg_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/tsg_vgpu.c | |||
@@ -21,9 +21,9 @@ | |||
21 | */ | 21 | */ |
22 | 22 | ||
23 | #include "gk20a/gk20a.h" | 23 | #include "gk20a/gk20a.h" |
24 | #include "gk20a/channel_gk20a.h" | ||
25 | #include "gk20a/tsg_gk20a.h" | 24 | #include "gk20a/tsg_gk20a.h" |
26 | #include "fifo_vgpu.h" | 25 | #include "fifo_vgpu.h" |
26 | #include <nvgpu/channel.h> | ||
27 | 27 | ||
28 | #include <nvgpu/bug.h> | 28 | #include <nvgpu/bug.h> |
29 | #include <nvgpu/vgpu/tegra_vgpu.h> | 29 | #include <nvgpu/vgpu/tegra_vgpu.h> |
diff --git a/drivers/gpu/nvgpu/vgpu/vgpu.c b/drivers/gpu/nvgpu/vgpu/vgpu.c index 8e20e4fc..bcd352e7 100644 --- a/drivers/gpu/nvgpu/vgpu/vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/vgpu.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <nvgpu/vgpu/vgpu_ivc.h> | 25 | #include <nvgpu/vgpu/vgpu_ivc.h> |
26 | #include <nvgpu/vgpu/vgpu.h> | 26 | #include <nvgpu/vgpu/vgpu.h> |
27 | #include <nvgpu/timers.h> | 27 | #include <nvgpu/timers.h> |
28 | #include <nvgpu/channel.h> | ||
28 | 29 | ||
29 | #include "gk20a/gk20a.h" | 30 | #include "gk20a/gk20a.h" |
30 | #include "fecs_trace_vgpu.h" | 31 | #include "fecs_trace_vgpu.h" |