summaryrefslogtreecommitdiffstats
path: root/drivers
diff options
context:
space:
mode:
authorAlex Waterman <alexw@nvidia.com>2018-08-08 17:21:46 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-08-10 21:12:15 -0400
commit33bad6f0126d785a9bbfd2862a9b6b9dba43e8af (patch)
tree0e36019b6c9c69ec8397211144f78b800a502291 /drivers
parentc9f8f1ea05f089567f497379ce372450c14895f8 (diff)
gpu: nvgpu: Add U64() and U32() macros
These macros exist to make integer literals used in certain arithmetic operations explicitly large enough to hold the results of that operation. The following is an example of this. In MISRA the destination for a bitwise shift must be able to hold the number of bits shifted. Otherwise the results are undefined. For example: 256U << 20U This is valid C code but the results of this _may_ be undefined if the size of an unsigned by default is less than 24 bits (i.e 16 bits). The MISRA misra checker sees the 256U and determines that the 256U fits in a 16 bit data type (i.e a u16). Since a u16 has 16 bits, which is less than 20, this is an issue. Of course most compilers these days use 32 bits for the default unsigned type this is not a requirement. Moreover this name problem could exist like so: 0xfffffU << 40U The 0xfffffU is a 32 bit unsigned type; but we are shifting 40 bits which overflows the 32 bit data type. So in this case we need an explicit cast to 64 bits in order to prevent undefined behavior. Change-Id: If2433fb8c44df0c714487fa3b6b056fc84570df7 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1795391 GVS: Gerrit_Virtual_Submit Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/nvgpu/include/nvgpu/types.h28
1 files changed, 28 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/include/nvgpu/types.h b/drivers/gpu/nvgpu/include/nvgpu/types.h
index 1e243e53..dfa95557 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/types.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/types.h
@@ -30,4 +30,32 @@
30#include <nvgpu_rmos/include/types.h> 30#include <nvgpu_rmos/include/types.h>
31#endif 31#endif
32 32
33/*
34 * These macros exist to make integer literals used in certain arithmetic
35 * operations explicitly large enough to hold the results of that operation.
36 * The following is an example of this.
37 *
38 * In MISRA the destination for a bitwise shift must be able to hold the number
39 * of bits shifted. Otherwise the results are undefined. For example:
40 *
41 * 256U << 20U
42 *
43 * This is valid C code but the results of this _may_ be undefined if the size
44 * of an unsigned by default is less than 24 bits (i.e 16 bits). The MISRA
45 * checker sees the 256U and determines that the 256U fits in a 16 bit data type
46 * (i.e a u16). Since a u16 has 16 bits, which is less than 20, this is an
47 * issue.
48 *
49 * Of course most compilers these days use 32 bits for the default unsigned type
50 * this is not a requirement. Moreover this same problem could exist like so:
51 *
52 * 0xfffffU << 40U
53 *
54 * The 0xfffffU is a 32 bit unsigned type; but we are shifting 40 bits which
55 * overflows the 32 bit data type. So in this case we need an explicit cast to
56 * 64 bits in order to prevent undefined behavior.
57 */
58#define U32(x) ((u32)(x))
59#define U64(x) ((u64)(x))
60
33#endif 61#endif