gpu: nvgpu: vgpu: support reduced BAR1 range

Going forward, only the guest-accessible BAR1 range will be
contained in the DT. Full-range BAR1 support is maintained for
backwards-compatibility.

JIRA VFND-1373

Change-Id: I5c46d670fe65a333fbef7745d1e886d53af39d73
Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-on: http://git-master/r/1122107
GVS: Gerrit_Virtual_Submit
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>

1 files changed, 6 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c
index ac506a34..fe231003 100644
--- a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c
+++ b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c
@@ -233,6 +233,7 @@ clean_up:
 static int vgpu_init_fifo_setup_sw(struct gk20a *g)
 {
         struct gk20a_platform *platform = gk20a_get_platform(g->dev);
+        struct resource *r = platform_get_resource(g->dev, IORESOURCE_MEM, 0);
         struct fifo_gk20a *f = &g->fifo;
         struct device *d = dev_from_gk20a(g);
         int chid, err = 0;
@@ -270,6 +271,11 @@ static int vgpu_init_fifo_setup_sw(struct gk20a *g)
                 goto clean_up;
         }
 
+        /* if reduced BAR1 range is specified, use offset of 0
+           (server returns offset assuming full BAR1 range) */
+        if (resource_size(r) == (resource_size_t)f->userd.size)
+                f->userd.gpu_va = 0;
+
         gk20a_dbg(gpu_dbg_map, "userd bar1 va = 0x%llx", f->userd.gpu_va);
 
         f->channel = kzalloc(f->num_channels * sizeof(*f->channel),