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authorDebarshi Dutta <ddutta@nvidia.com>2019-05-13 07:17:04 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2019-05-15 19:14:30 -0400
commit1f867543daece1ec529211d6d66c9799eab6220f (patch)
treee56b479d9807526a7c689c6d585329363e3e87e9 /drivers
parent543a904e630dfe78b193803ad04d2bd12380c2b0 (diff)
gpu: nvgpu: Add DT support for TPC_PG_POWERGATE
Added support for TPC_PG_POWERGATE during probe for nvgpu via DT. A new DT binding GV11B_FUSE_OPT_TPC_DISABLE is supported by nvgpu driver that checks for valid masks and updates the global tpc_pg_mask flag. Bug 200518434 Change-Id: Ia65ae518b48e36d28de5e9375bc994232f6a9438 Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2117783 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Deepak Goyal <dgoyal@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/nvgpu/os/linux/module.c6
-rw-r--r--drivers/gpu/nvgpu/os/linux/platform_gk20a.h3
-rw-r--r--drivers/gpu/nvgpu/os/linux/platform_gv11b_tegra.c24
3 files changed, 33 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/os/linux/module.c b/drivers/gpu/nvgpu/os/linux/module.c
index 955481c8..c453bced 100644
--- a/drivers/gpu/nvgpu/os/linux/module.c
+++ b/drivers/gpu/nvgpu/os/linux/module.c
@@ -32,6 +32,7 @@
32#include <uapi/linux/nvgpu.h> 32#include <uapi/linux/nvgpu.h>
33#include <dt-bindings/soc/gm20b-fuse.h> 33#include <dt-bindings/soc/gm20b-fuse.h>
34#include <dt-bindings/soc/gp10b-fuse.h> 34#include <dt-bindings/soc/gp10b-fuse.h>
35#include <dt-bindings/soc/gv11b-fuse.h>
35 36
36#include <soc/tegra/fuse.h> 37#include <soc/tegra/fuse.h>
37 38
@@ -1165,6 +1166,7 @@ static inline void set_gk20a(struct platform_device *pdev, struct gk20a *gk20a)
1165static int nvgpu_read_fuse_overrides(struct gk20a *g) 1166static int nvgpu_read_fuse_overrides(struct gk20a *g)
1166{ 1167{
1167 struct device_node *np = nvgpu_get_node(g); 1168 struct device_node *np = nvgpu_get_node(g);
1169 struct gk20a_platform *platform = dev_get_drvdata(dev_from_gk20a(g));
1168 u32 *fuses; 1170 u32 *fuses;
1169 int count, i; 1171 int count, i;
1170 1172
@@ -1191,6 +1193,10 @@ static int nvgpu_read_fuse_overrides(struct gk20a *g)
1191 case GP10B_FUSE_OPT_ECC_EN: 1193 case GP10B_FUSE_OPT_ECC_EN:
1192 g->gr.fecs_feature_override_ecc_val = value; 1194 g->gr.fecs_feature_override_ecc_val = value;
1193 break; 1195 break;
1196 case GV11B_FUSE_OPT_TPC_DISABLE:
1197 if (platform->set_tpc_pg_mask != NULL)
1198 platform->set_tpc_pg_mask(dev_from_gk20a(g), value);
1199 break;
1194 default: 1200 default:
1195 nvgpu_err(g, "ignore unknown fuse override %08x", fuse); 1201 nvgpu_err(g, "ignore unknown fuse override %08x", fuse);
1196 break; 1202 break;
diff --git a/drivers/gpu/nvgpu/os/linux/platform_gk20a.h b/drivers/gpu/nvgpu/os/linux/platform_gk20a.h
index 1331c941..2ddadd2e 100644
--- a/drivers/gpu/nvgpu/os/linux/platform_gk20a.h
+++ b/drivers/gpu/nvgpu/os/linux/platform_gk20a.h
@@ -196,6 +196,9 @@ struct gk20a_platform {
196 /* Pre callback is called before frequency change */ 196 /* Pre callback is called before frequency change */
197 void (*prescale)(struct device *dev); 197 void (*prescale)(struct device *dev);
198 198
199 /* Set TPC_PG during probe */
200 void (*set_tpc_pg_mask)(struct device *dev, u32 tpc_mask);
201
199 /* Devfreq governor name. If scaling is enabled, we request 202 /* Devfreq governor name. If scaling is enabled, we request
200 * this governor to be used in scaling */ 203 * this governor to be used in scaling */
201 const char *devfreq_governor; 204 const char *devfreq_governor;
diff --git a/drivers/gpu/nvgpu/os/linux/platform_gv11b_tegra.c b/drivers/gpu/nvgpu/os/linux/platform_gv11b_tegra.c
index dafa05e5..4a94c1cd 100644
--- a/drivers/gpu/nvgpu/os/linux/platform_gv11b_tegra.c
+++ b/drivers/gpu/nvgpu/os/linux/platform_gv11b_tegra.c
@@ -218,6 +218,28 @@ static int gv11b_tegra_suspend(struct device *dev)
218 return 0; 218 return 0;
219} 219}
220 220
221static bool is_tpc_mask_valid(struct gk20a_platform *platform, u32 tpc_mask)
222{
223 u32 i;
224 bool valid = false;
225
226 for (i = 0; i < MAX_TPC_PG_CONFIGS; i++) {
227 if (tpc_mask == platform->valid_tpc_mask[i])
228 valid = true;
229 }
230 return valid;
231}
232
233static void gv11b_tegra_set_tpc_pg_mask(struct device *dev, u32 tpc_mask)
234{
235 struct gk20a_platform *platform = gk20a_get_platform(dev);
236 struct gk20a *g = get_gk20a(dev);
237
238 if (is_tpc_mask_valid(platform, tpc_mask)) {
239 g->tpc_pg_mask = tpc_mask;
240 }
241}
242
221struct gk20a_platform gv11b_tegra_platform = { 243struct gk20a_platform gv11b_tegra_platform = {
222 .has_syncpoints = true, 244 .has_syncpoints = true,
223 245
@@ -237,6 +259,8 @@ struct gk20a_platform gv11b_tegra_platform = {
237 .valid_tpc_mask[1] = 0x1, 259 .valid_tpc_mask[1] = 0x1,
238 .valid_tpc_mask[2] = 0x5, 260 .valid_tpc_mask[2] = 0x5,
239 261
262 .set_tpc_pg_mask = gv11b_tegra_set_tpc_pg_mask,
263
240 .can_slcg = true, 264 .can_slcg = true,
241 .can_blcg = true, 265 .can_blcg = true,
242 .can_elcg = true, 266 .can_elcg = true,