diff options
author | Seshendra Gadagottu <sgadagottu@nvidia.com> | 2015-02-25 20:38:05 -0500 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2015-04-04 21:57:28 -0400 |
commit | 182730599e3636b337b76fa49adbc1a5b243667f (patch) | |
tree | dcb44fbcdb0ebcd55066f661ba826849b07fd2e2 /drivers | |
parent | ced17a2d31a49b771b0cc9715f15330a408f8e69 (diff) |
gpu: nvgpu: support for dumping vpr/wpr info
Added support for dumping vpr/wpr info for gm20b.
This dump info called when ever gk20a_mm_fb_flush
is timed-out.
Bug 200082817
Change-Id: I21b0372d0e3f976a189c9c428c015165b715bf88
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/711439
(cherry picked from commit b69897d71c8f6119b49ceb8d3273cdb354178cc5)
Reviewed-on: http://git-master/r/712675
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/mm_gk20a.c | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/fb_gm20b.c | 32 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/hw_fb_gm20b.h | 62 |
4 files changed, 95 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 441ea7cc..4fac3cc5 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -176,6 +176,7 @@ struct gpu_ops { | |||
176 | void (*init_kind_attr)(struct gk20a *g); | 176 | void (*init_kind_attr)(struct gk20a *g); |
177 | void (*set_mmu_page_size)(struct gk20a *g); | 177 | void (*set_mmu_page_size)(struct gk20a *g); |
178 | int (*compression_page_size)(struct gk20a *g); | 178 | int (*compression_page_size)(struct gk20a *g); |
179 | void (*dump_vpr_wpr_info)(struct gk20a *g); | ||
179 | } fb; | 180 | } fb; |
180 | struct { | 181 | struct { |
181 | void (*slcg_bus_load_gating_prod)(struct gk20a *g, bool prod); | 182 | void (*slcg_bus_load_gating_prod)(struct gk20a *g, bool prod); |
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c index 67680c4c..b53d53a3 100644 --- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c | |||
@@ -2805,6 +2805,8 @@ int gk20a_mm_fb_flush(struct gk20a *g) | |||
2805 | if (tegra_platform_is_silicon() && retry < 0) { | 2805 | if (tegra_platform_is_silicon() && retry < 0) { |
2806 | gk20a_warn(dev_from_gk20a(g), | 2806 | gk20a_warn(dev_from_gk20a(g), |
2807 | "fb_flush too many retries"); | 2807 | "fb_flush too many retries"); |
2808 | if (g->ops.fb.dump_vpr_wpr_info) | ||
2809 | g->ops.fb.dump_vpr_wpr_info(g); | ||
2808 | ret = -EBUSY; | 2810 | ret = -EBUSY; |
2809 | } | 2811 | } |
2810 | 2812 | ||
diff --git a/drivers/gpu/nvgpu/gm20b/fb_gm20b.c b/drivers/gpu/nvgpu/gm20b/fb_gm20b.c index deef7896..666d27e9 100644 --- a/drivers/gpu/nvgpu/gm20b/fb_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/fb_gm20b.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GM20B GPC MMU | 2 | * GM20B GPC MMU |
3 | * | 3 | * |
4 | * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | 6 | * This program is free software; you can redistribute it and/or modify it |
7 | * under the terms and conditions of the GNU General Public License, | 7 | * under the terms and conditions of the GNU General Public License, |
@@ -95,11 +95,41 @@ static int gm20b_fb_compression_page_size(struct gk20a *g) | |||
95 | return SZ_128K; | 95 | return SZ_128K; |
96 | } | 96 | } |
97 | 97 | ||
98 | static void gm20b_fb_dump_vpr_wpr_info(struct gk20a *g) | ||
99 | { | ||
100 | u32 val; | ||
101 | |||
102 | /* print vpr and wpr info */ | ||
103 | val = gk20a_readl(g, fb_mmu_vpr_info_r()); | ||
104 | val &= ~0x3; | ||
105 | val |= fb_mmu_vpr_info_index_addr_lo_v(); | ||
106 | gk20a_writel(g, fb_mmu_vpr_info_r(), val); | ||
107 | gk20a_err(dev_from_gk20a(g), "VPR: %08x %08x %08x %08x", | ||
108 | gk20a_readl(g, fb_mmu_vpr_info_r()), | ||
109 | gk20a_readl(g, fb_mmu_vpr_info_r()), | ||
110 | gk20a_readl(g, fb_mmu_vpr_info_r()), | ||
111 | gk20a_readl(g, fb_mmu_vpr_info_r())); | ||
112 | |||
113 | val = gk20a_readl(g, fb_mmu_wpr_info_r()); | ||
114 | val &= ~0xf; | ||
115 | val |= (fb_mmu_wpr_info_index_allow_read_v()); | ||
116 | gk20a_writel(g, fb_mmu_wpr_info_r(), val); | ||
117 | gk20a_err(dev_from_gk20a(g), "WPR: %08x %08x %08x %08x %08x %08x", | ||
118 | gk20a_readl(g, fb_mmu_wpr_info_r()), | ||
119 | gk20a_readl(g, fb_mmu_wpr_info_r()), | ||
120 | gk20a_readl(g, fb_mmu_wpr_info_r()), | ||
121 | gk20a_readl(g, fb_mmu_wpr_info_r()), | ||
122 | gk20a_readl(g, fb_mmu_wpr_info_r()), | ||
123 | gk20a_readl(g, fb_mmu_wpr_info_r())); | ||
124 | |||
125 | } | ||
126 | |||
98 | void gm20b_init_fb(struct gpu_ops *gops) | 127 | void gm20b_init_fb(struct gpu_ops *gops) |
99 | { | 128 | { |
100 | gops->fb.init_fs_state = fb_gm20b_init_fs_state; | 129 | gops->fb.init_fs_state = fb_gm20b_init_fs_state; |
101 | gops->fb.set_mmu_page_size = gm20b_fb_set_mmu_page_size; | 130 | gops->fb.set_mmu_page_size = gm20b_fb_set_mmu_page_size; |
102 | gops->fb.compression_page_size = gm20b_fb_compression_page_size; | 131 | gops->fb.compression_page_size = gm20b_fb_compression_page_size; |
132 | gops->fb.dump_vpr_wpr_info = gm20b_fb_dump_vpr_wpr_info; | ||
103 | gm20b_init_uncompressed_kind_map(); | 133 | gm20b_init_uncompressed_kind_map(); |
104 | gm20b_init_kind_attr(); | 134 | gm20b_init_kind_attr(); |
105 | } | 135 | } |
diff --git a/drivers/gpu/nvgpu/gm20b/hw_fb_gm20b.h b/drivers/gpu/nvgpu/gm20b/hw_fb_gm20b.h index 91b998ca..a753074e 100644 --- a/drivers/gpu/nvgpu/gm20b/hw_fb_gm20b.h +++ b/drivers/gpu/nvgpu/gm20b/hw_fb_gm20b.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * This program is free software; you can redistribute it and/or modify it | 4 | * This program is free software; you can redistribute it and/or modify it |
5 | * under the terms and conditions of the GNU General Public License, | 5 | * under the terms and conditions of the GNU General Public License, |
@@ -222,6 +222,34 @@ static inline u32 fb_mmu_vpr_info_r(void) | |||
222 | { | 222 | { |
223 | return 0x00100cd0; | 223 | return 0x00100cd0; |
224 | } | 224 | } |
225 | static inline u32 fb_mmu_vpr_info_index_f(u32 v) | ||
226 | { | ||
227 | return (v & 0x3) << 0; | ||
228 | } | ||
229 | static inline u32 fb_mmu_vpr_info_index_v(u32 r) | ||
230 | { | ||
231 | return (r >> 0) & 0x3; | ||
232 | } | ||
233 | static inline u32 fb_mmu_vpr_info_index_addr_lo_v(void) | ||
234 | { | ||
235 | return 0x00000000; | ||
236 | } | ||
237 | static inline u32 fb_mmu_vpr_info_index_addr_hi_v(void) | ||
238 | { | ||
239 | return 0x00000001; | ||
240 | } | ||
241 | static inline u32 fb_mmu_vpr_info_index_cya_lo_v(void) | ||
242 | { | ||
243 | return 0x00000002; | ||
244 | } | ||
245 | static inline u32 fb_mmu_vpr_info_index_cya_hi_v(void) | ||
246 | { | ||
247 | return 0x00000003; | ||
248 | } | ||
249 | static inline u32 fb_mmu_vpr_info_fetch_f(u32 v) | ||
250 | { | ||
251 | return (v & 0x1) << 2; | ||
252 | } | ||
225 | static inline u32 fb_mmu_vpr_info_fetch_v(u32 r) | 253 | static inline u32 fb_mmu_vpr_info_fetch_v(u32 r) |
226 | { | 254 | { |
227 | return (r >> 2) & 0x1; | 255 | return (r >> 2) & 0x1; |
@@ -234,4 +262,36 @@ static inline u32 fb_mmu_vpr_info_fetch_true_v(void) | |||
234 | { | 262 | { |
235 | return 0x00000001; | 263 | return 0x00000001; |
236 | } | 264 | } |
265 | static inline u32 fb_mmu_wpr_info_r(void) | ||
266 | { | ||
267 | return 0x00100cd4; | ||
268 | } | ||
269 | static inline u32 fb_mmu_wpr_info_index_f(u32 v) | ||
270 | { | ||
271 | return (v & 0xf) << 0; | ||
272 | } | ||
273 | static inline u32 fb_mmu_wpr_info_index_allow_read_v(void) | ||
274 | { | ||
275 | return 0x00000000; | ||
276 | } | ||
277 | static inline u32 fb_mmu_wpr_info_index_allow_write_v(void) | ||
278 | { | ||
279 | return 0x00000001; | ||
280 | } | ||
281 | static inline u32 fb_mmu_wpr_info_index_wpr1_addr_lo_v(void) | ||
282 | { | ||
283 | return 0x00000002; | ||
284 | } | ||
285 | static inline u32 fb_mmu_wpr_info_index_wpr1_addr_hi_v(void) | ||
286 | { | ||
287 | return 0x00000003; | ||
288 | } | ||
289 | static inline u32 fb_mmu_wpr_info_index_wpr2_addr_lo_v(void) | ||
290 | { | ||
291 | return 0x00000004; | ||
292 | } | ||
293 | static inline u32 fb_mmu_wpr_info_index_wpr2_addr_hi_v(void) | ||
294 | { | ||
295 | return 0x00000005; | ||
296 | } | ||
237 | #endif | 297 | #endif |