gpu: nvgpu: gv11b: disable skedcheck18_l1_config_too_small

SKED_HWW_ESR_EN_SKEDCHECK18_L1_CONFIG_TOO_SMALL disabled

Bug 200315442

Change-Id: I6d5c5f2fe6255d480350e01959c3c340579646e2
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1499568
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

2 files changed, 42 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c
index a703e72c..542ed1ff 100644
--- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c
@@ -285,6 +285,27 @@ static int gr_gv11b_handle_lrf_exception(struct gk20a *g, u32 gpc, u32 tpc,
 
 }
 
+static void gr_gv11b_enable_hww_exceptions(struct gk20a *g)
+{
+        u32 val;
+
+        /* enable exceptions */
+        gk20a_writel(g, gr_fe_hww_esr_r(),
+                     gr_fe_hww_esr_en_enable_f() |
+                     gr_fe_hww_esr_reset_active_f());
+        gk20a_writel(g, gr_memfmt_hww_esr_r(),
+                     gr_memfmt_hww_esr_en_enable_f() |
+                     gr_memfmt_hww_esr_reset_active_f());
+        /* WAR for 200315442 */
+        val = gk20a_readl(g, gr_sked_hww_esr_en_r());
+        val = set_field(val,
+                gr_sked_hww_esr_en_skedcheck18_l1_config_too_small_m(),
+                gr_sked_hww_esr_en_skedcheck18_l1_config_too_small_disabled_f()
+                );
+        nvgpu_log_info(g, "sked_hww_esr_en = 0x%x", val);
+        gk20a_writel(g, gr_sked_hww_esr_en_r(), val);
+}
+
 static void gr_gv11b_enable_exceptions(struct gk20a *g)
 {
         struct gr_gk20a *gr = &g->gr;
@@ -2518,6 +2539,7 @@ void gv11b_init_gr(struct gpu_ops *gops)
         gops->gr.handle_tex_exception = gr_gv11b_handle_tex_exception;
         gops->gr.enable_gpc_exceptions = gr_gv11b_enable_gpc_exceptions;
         gops->gr.enable_exceptions = gr_gv11b_enable_exceptions;
+        gops->gr.enable_hww_exceptions = gr_gv11b_enable_hww_exceptions;
         gops->gr.mask_hww_warp_esr = gv11b_mask_hww_warp_esr;
         gops->gr.pre_process_sm_exception =
                 gr_gv11b_pre_process_sm_exception;
diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h
index 62307265..29a8b33c 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gr_gv11b.h
@@ -4634,4 +4634,24 @@ static inline u32 gr_fecs_falcon_ecc_uncorrected_err_count_unique_total_v(u32 r)
 {
         return (r >> 16) & 0xffff;
 }
+static inline u32 gr_sked_hww_esr_en_r(void)
+{
+        return 0x00407024;
+}
+static inline u32 gr_sked_hww_esr_en_skedcheck18_l1_config_too_small_m(void)
+{
+        return 0x1 << 25;
+}
+static inline u32 gr_sked_hww_esr_en_skedcheck18_l1_config_too_small_disabled_f(void)
+{
+        return 0x0;
+}
+static inline u32 gr_sked_hww_esr_en_skedcheck18_l1_config_too_small_enabled_f(void)
+{
+        return 0x2000000;
+}
+static inline u32 gr_exception_sked_m(void)
+{
+        return 0x1 << 8;
+}
 #endif