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authorSrikar Srimath Tirumala <srikars@nvidia.com>2017-01-04 17:34:14 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2017-01-30 19:34:52 -0500
commit0efedacffd28cd3f156b8a1a7764e5d9cda572c6 (patch)
tree1dd5ee20ec435c9f9afe7f247493f163f9aef049 /drivers
parent8aadf311d5a46601cb9d3f0232c90b10ec171994 (diff)
gpu: nvgpu: fix DEVFREQ init on T210 K4.4
Devfreq and gpcclk require GPU v/f tables for registering correctly. Fix this by deferring the nvgpu_probe if GPU-DVFS is not completely initialized. Change applicable to kernels with Common Clock Framework enabled. Bug 200233943 Change-Id: I82dadc1b0970d47e839d6bec935330966402e93b Signed-off-by: Srikar Srimath Tirumala <srikars@nvidia.com> Reviewed-on: http://git-master/r/1280832 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c22
1 files changed, 20 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c b/drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c
index 87c678ea..c18f0230 100644
--- a/drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c
+++ b/drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c
@@ -537,16 +537,16 @@ static int gm20b_tegra_unrailgate(struct device *dev)
537 if (platform->is_fmodel) 537 if (platform->is_fmodel)
538 return 0; 538 return 0;
539 539
540#ifdef CONFIG_TEGRA_CLK_FRAMEWORK
540 if (!platform->gpu_rail) { 541 if (!platform->gpu_rail) {
541 platform->gpu_rail = tegra_dvfs_get_rail_by_name(GPU_RAIL_NAME); 542 platform->gpu_rail = tegra_dvfs_get_rail_by_name(GPU_RAIL_NAME);
542 if (IS_ERR_OR_NULL(platform->gpu_rail)) { 543 if (IS_ERR_OR_NULL(platform->gpu_rail)) {
543 WARN(1, "No GPU regulator?\n"); 544 WARN(1, "No GPU regulator?\n");
544 return -EINVAL; 545 return -EINVAL;
545 } 546 }
546#ifdef CONFIG_TEGRA_CLK_FRAMEWORK
547 first = true; 547 first = true;
548#endif
549 } 548 }
549#endif
550 550
551 ret = tegra_dvfs_rail_power_up(platform->gpu_rail); 551 ret = tegra_dvfs_rail_power_up(platform->gpu_rail);
552 if (ret) 552 if (ret)
@@ -799,6 +799,24 @@ static int gk20a_tegra_probe(struct device *dev)
799 bool joint_xpu_rail = false; 799 bool joint_xpu_rail = false;
800 int ret; 800 int ret;
801 801
802#ifdef CONFIG_COMMON_CLK
803 /* DVFS is not guaranteed to be initialized at the time of probe on
804 * kernels with Common Clock Framework enabled.
805 */
806 if (!platform->gpu_rail) {
807 platform->gpu_rail = tegra_dvfs_get_rail_by_name(GPU_RAIL_NAME);
808 if (!platform->gpu_rail) {
809 gk20a_dbg_info("deferring probe no gpu_rail\n");
810 return -EPROBE_DEFER;
811 }
812 }
813
814 if (!tegra_dvfs_is_rail_ready(platform->gpu_rail)) {
815 gk20a_dbg_info("deferring probe gpu_rail not ready\n");
816 return -EPROBE_DEFER;
817 }
818#endif
819
802 host1x_ptr = of_get_property(np, "nvidia,host1x", NULL); 820 host1x_ptr = of_get_property(np, "nvidia,host1x", NULL);
803 if (host1x_ptr) { 821 if (host1x_ptr) {
804 struct device_node *host1x_node = 822 struct device_node *host1x_node =