summaryrefslogtreecommitdiffstats
path: root/drivers
diff options
context:
space:
mode:
authorTerje Bergstrom <tbergstrom@nvidia.com>2015-06-30 16:35:14 -0400
committerTerje Bergstrom <tbergstrom@nvidia.com>2015-07-06 12:47:33 -0400
commit0c25c820d751f4b2bbaffac15701d7084649d71e (patch)
treed029f3b192a029d4f05b9e18cac9470f8aa9bb9f /drivers
parent417bc8361a6e39ca70ce4f84368d9b41c4e12de1 (diff)
gpu: nvgpu: Update eng_buf_load message for T18x
eng_buf_load message structure for T18x is updated. Update kernel code to follow. Bug 200119744 Change-Id: Ib86c3e54ed60704470b29d9f7de612697cfd54a3 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/764458 Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com> Tested-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/nvgpu/gk20a/pmu_gk20a.c10
-rw-r--r--drivers/gpu/nvgpu/gk20a/pmu_gk20a.h8
2 files changed, 10 insertions, 8 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
index 1f21555c..de44f925 100644
--- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
@@ -839,7 +839,7 @@ static void pg_cmd_eng_buf_load_set_buf_size_v0(struct pmu_pg_cmd *pg,
839static void pg_cmd_eng_buf_load_set_buf_size_v1(struct pmu_pg_cmd *pg, 839static void pg_cmd_eng_buf_load_set_buf_size_v1(struct pmu_pg_cmd *pg,
840 u16 value) 840 u16 value)
841{ 841{
842 pg->eng_buf_load_v1.buf_size = value; 842 pg->eng_buf_load_v1.dma_desc.dma_size = value;
843} 843}
844 844
845static void pg_cmd_eng_buf_load_set_dma_base_v0(struct pmu_pg_cmd *pg, 845static void pg_cmd_eng_buf_load_set_dma_base_v0(struct pmu_pg_cmd *pg,
@@ -850,8 +850,8 @@ static void pg_cmd_eng_buf_load_set_dma_base_v0(struct pmu_pg_cmd *pg,
850static void pg_cmd_eng_buf_load_set_dma_base_v1(struct pmu_pg_cmd *pg, 850static void pg_cmd_eng_buf_load_set_dma_base_v1(struct pmu_pg_cmd *pg,
851 u32 value) 851 u32 value)
852{ 852{
853 pg->eng_buf_load_v1.dma_addr.dma_base = value; 853 pg->eng_buf_load_v1.dma_desc.dma_addr.lo |= u64_lo32(value << 8);
854 pg->eng_buf_load_v1.dma_addr.dma_base1 = 0; 854 pg->eng_buf_load_v1.dma_desc.dma_addr.hi |= u64_hi32(value << 8);
855} 855}
856 856
857static void pg_cmd_eng_buf_load_set_dma_offset_v0(struct pmu_pg_cmd *pg, 857static void pg_cmd_eng_buf_load_set_dma_offset_v0(struct pmu_pg_cmd *pg,
@@ -862,7 +862,7 @@ static void pg_cmd_eng_buf_load_set_dma_offset_v0(struct pmu_pg_cmd *pg,
862static void pg_cmd_eng_buf_load_set_dma_offset_v1(struct pmu_pg_cmd *pg, 862static void pg_cmd_eng_buf_load_set_dma_offset_v1(struct pmu_pg_cmd *pg,
863 u8 value) 863 u8 value)
864{ 864{
865 pg->eng_buf_load_v1.dma_addr.dma_offset = value; 865 pg->eng_buf_load_v1.dma_desc.dma_addr.lo |= value;
866} 866}
867 867
868static void pg_cmd_eng_buf_load_set_dma_idx_v0(struct pmu_pg_cmd *pg, 868static void pg_cmd_eng_buf_load_set_dma_idx_v0(struct pmu_pg_cmd *pg,
@@ -873,7 +873,7 @@ static void pg_cmd_eng_buf_load_set_dma_idx_v0(struct pmu_pg_cmd *pg,
873static void pg_cmd_eng_buf_load_set_dma_idx_v1(struct pmu_pg_cmd *pg, 873static void pg_cmd_eng_buf_load_set_dma_idx_v1(struct pmu_pg_cmd *pg,
874 u8 value) 874 u8 value)
875{ 875{
876 pg->eng_buf_load_v1.dma_idx = value; 876 pg->eng_buf_load_v1.dma_desc.dma_idx = value;
877} 877}
878 878
879 879
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
index 85403767..0682e4b8 100644
--- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
@@ -680,9 +680,11 @@ struct pmu_pg_cmd_eng_buf_load_v1 {
680 u8 engine_id; 680 u8 engine_id;
681 u8 buf_idx; 681 u8 buf_idx;
682 u8 pad; 682 u8 pad;
683 u16 buf_size; 683 struct flcn_mem_desc {
684 struct falc_dma_addr dma_addr; /* 256-byte block address */ 684 struct falc_u64 dma_addr;
685 u8 dma_idx; 685 u16 dma_size;
686 u8 dma_idx;
687 } dma_desc;
686}; 688};
687 689
688enum { 690enum {