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authorSrikar Srimath Tirumala <srikars@nvidia.com>2017-01-04 17:43:01 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2017-01-30 19:34:19 -0500
commit0bce5edd9255d060f0a12a627097b31c5de55a55 (patch)
tree7f52945fd88597fe275fc86d85fd47265a7cfc68 /drivers
parent702ed11f9413e5fbfae40a400594c83b54e16507 (diff)
Revert "gpu: nvgpu: fix round_rate ops for CCF"
This reverts commit 34d8421ab4e9ecd0af09f7fefe71b9a1d8781061. Bug 200233943 Change-Id: Id03b7922c955d252aff54e6bbd8163926bdc65fb Signed-off-by: Srikar Srimath Tirumala <srikars@nvidia.com> Reviewed-on: http://git-master/r/1280828 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/nvgpu/clk/clk_common.c12
-rw-r--r--drivers/gpu/nvgpu/gm20b/clk_gm20b.c4
2 files changed, 0 insertions, 16 deletions
diff --git a/drivers/gpu/nvgpu/clk/clk_common.c b/drivers/gpu/nvgpu/clk/clk_common.c
index 529efa15..346ad12b 100644
--- a/drivers/gpu/nvgpu/clk/clk_common.c
+++ b/drivers/gpu/nvgpu/clk/clk_common.c
@@ -45,7 +45,6 @@ unsigned long gk20a_clk_get_rate(struct gk20a *g)
45 return rate_gpc2clk_to_gpu(clk->gpc_pll.freq); 45 return rate_gpc2clk_to_gpu(clk->gpc_pll.freq);
46} 46}
47 47
48#ifdef CONFIG_TEGRA_CLK_FRAMEWORK
49long gk20a_clk_round_rate(struct gk20a *g, unsigned long rate) 48long gk20a_clk_round_rate(struct gk20a *g, unsigned long rate)
50{ 49{
51 /* make sure the clock is available */ 50 /* make sure the clock is available */
@@ -55,17 +54,6 @@ long gk20a_clk_round_rate(struct gk20a *g, unsigned long rate)
55 return clk_round_rate(clk_get_parent(g->clk.tegra_clk), rate); 54 return clk_round_rate(clk_get_parent(g->clk.tegra_clk), rate);
56} 55}
57 56
58#else
59long gk20a_clk_round_rate(struct gk20a *g, unsigned long rate)
60{
61 /* make sure the clock is available */
62 if (!gk20a_clk_get(g))
63 return rate;
64
65 return clk_round_rate(g->clk.tegra_clk, rate);
66}
67#endif
68
69int gk20a_clk_set_rate(struct gk20a *g, unsigned long rate) 57int gk20a_clk_set_rate(struct gk20a *g, unsigned long rate)
70{ 58{
71 return clk_set_rate(g->clk.tegra_clk, rate); 59 return clk_set_rate(g->clk.tegra_clk, rate);
diff --git a/drivers/gpu/nvgpu/gm20b/clk_gm20b.c b/drivers/gpu/nvgpu/gm20b/clk_gm20b.c
index be194228..e4691588 100644
--- a/drivers/gpu/nvgpu/gm20b/clk_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/clk_gm20b.c
@@ -1264,12 +1264,8 @@ static long gm20b_round_rate(struct clk_hw *hw, unsigned long rate,
1264{ 1264{
1265 struct clk_gk20a *clk = to_clk_gk20a(hw); 1265 struct clk_gk20a *clk = to_clk_gk20a(hw);
1266 u32 freq, old_freq; 1266 u32 freq, old_freq;
1267 unsigned long maxrate;
1268 struct pll tmp_pll; 1267 struct pll tmp_pll;
1269 1268
1270 maxrate = tegra_dvfs_get_maxrate(hw->clk);
1271 gpc_pll_params.max_freq = rate_gpu_to_gpc2clk(maxrate);
1272
1273 mutex_lock(&clk->clk_mutex); 1269 mutex_lock(&clk->clk_mutex);
1274 old_freq = clk->gpc_pll.freq; 1270 old_freq = clk->gpc_pll.freq;
1275 freq = rate_gpu_to_gpc2clk(rate); 1271 freq = rate_gpu_to_gpc2clk(rate);