gpu: nvgpu: remove timeout_rc_type i/p param

-is_preempt_pending hal does not need timeout_rc_type input param as
 for volta, reset_eng_bitmask is saved if preempt times out. For
 legacy chips, recovery triggers mmu fault and mmu fault handler
 takes care of resetting engines.
-For volta, no special input param needed to differentiate between
 preempt polling during normal scenario and preempt polling during
 recovery. Recovery path uses preempt_ch_tsg hal to issue preempt.
 This hal does not issue recovery if preempt times out.

Bug 2125776
Bug 2108544
Bug 2105322
Bug 2092051
Bug 2048824
Bug 2043838
Bug 2039587
Bug 2028993
Bug 2029245
Bug 2065990
Bug 1945121
Bug 200401707
Bug 200393631
Bug 200327596

Change-Id: Ie76a18ae0be880cfbeee615859a08179fb974fa8
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1709799
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

5 files changed, 24 insertions, 32 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
index 00119300..c8789c3a 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
@@ -2704,7 +2704,7 @@ void gk20a_fifo_issue_preempt(struct gk20a *g, u32 id, bool is_tsg)
 }
 
 int gk20a_fifo_is_preempt_pending(struct gk20a *g, u32 id,
-                unsigned int id_type, unsigned int timeout_rc_type)
+                unsigned int id_type)
 {
         struct nvgpu_timeout timeout;
         u32 delay = GR_IDLE_CHECK_DEFAULT;
@@ -2777,8 +2777,8 @@ int __locked_fifo_preempt(struct gk20a *g, u32 id, bool is_tsg)
         id_type = is_tsg ? ID_TYPE_TSG : ID_TYPE_CHANNEL;
 
         /* wait for preempt */
-        ret = g->ops.fifo.is_preempt_pending(g, id, id_type,
-                                         PREEMPT_TIMEOUT_RC);
+        ret = g->ops.fifo.is_preempt_pending(g, id, id_type);
+
         return ret;
 }
 
@@ -3448,8 +3448,7 @@ static int __locked_fifo_reschedule_preempt_next(struct channel_gk20a *ch,
                 gk20a_readl(g, fifo_preempt_r()));
 #endif
         if (wait_preempt) {
-                g->ops.fifo.is_preempt_pending(
-                        g, preempt_id, preempt_type, PREEMPT_TIMEOUT_RC);
+                g->ops.fifo.is_preempt_pending(g, preempt_id, preempt_type);
         }
 #ifdef TRACEPOINTS_ENABLED
         trace_gk20a_reschedule_preempted_next(ch->chid);
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
index bccd15f6..d6e759ac 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
@@ -50,9 +50,6 @@ enum {
 #define ID_TYPE_TSG                     1
 #define ID_TYPE_UNKNOWN                 ((u32)~0)
 
-#define PREEMPT_TIMEOUT_RC              1
-#define PREEMPT_TIMEOUT_NORC            0
-
 #define RC_YES                          1
 #define RC_NO                           0
 
@@ -390,8 +387,8 @@ void gk20a_fifo_channel_unbind(struct channel_gk20a *ch_gk20a);
 
 u32 gk20a_fifo_intr_0_error_mask(struct gk20a *g);
 
-int gk20a_fifo_is_preempt_pending(struct gk20a *g, u32 id, unsigned int id_type,
-                                         unsigned int timeout_rc_type);
+int gk20a_fifo_is_preempt_pending(struct gk20a *g, u32 id,
+                        unsigned int id_type);
 int __locked_fifo_preempt(struct gk20a *g, u32 id, bool is_tsg);
 void gk20a_fifo_preempt_timeout_rc(struct gk20a *g, u32 id,
                                          unsigned int id_type);
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 25146b8b..fac02f68 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -662,9 +662,9 @@ struct gpu_ops {
                                 struct ch_state *ch_state);
                 u32 (*intr_0_error_mask)(struct gk20a *g);
                 int (*is_preempt_pending)(struct gk20a *g, u32 id,
-                        unsigned int id_type, unsigned int timeout_rc_type);
+                        unsigned int id_type);
                 int (*preempt_ch_tsg)(struct gk20a *g, u32 id,
-                        unsigned int id_type, unsigned int timeout_rc_type);
+                        unsigned int id_type);
                 void (*init_pbdma_intr_descs)(struct fifo_gk20a *f);
                 int (*reset_enable_hw)(struct gk20a *g);
                 int (*setup_userd)(struct channel_gk20a *c);
diff --git a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c
index abea39b6..4917f828 100644
--- a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c
+++ b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c
@@ -391,7 +391,7 @@ u32 gv11b_fifo_get_preempt_timeout(struct gk20a *g)
 }
 
 static int gv11b_fifo_poll_pbdma_chan_status(struct gk20a *g, u32 id,
-                                 u32 pbdma_id, unsigned int timeout_rc_type)
+                                 u32 pbdma_id)
 {
         struct nvgpu_timeout timeout;
         unsigned long delay = GR_IDLE_CHECK_DEFAULT; /* in micro seconds */
@@ -476,8 +476,7 @@ static int gv11b_fifo_poll_pbdma_chan_status(struct gk20a *g, u32 id,
 }
 
 static int gv11b_fifo_poll_eng_ctx_status(struct gk20a *g, u32 id,
-                         u32 act_eng_id, u32 *reset_eng_bitmask,
-                         unsigned int timeout_rc_type)
+                         u32 act_eng_id, u32 *reset_eng_bitmask)
 {
         struct nvgpu_timeout timeout;
         unsigned long delay = GR_IDLE_CHECK_DEFAULT; /* in micro seconds */
@@ -775,7 +774,7 @@ static int gv11b_fifo_poll_runlist_preempt_pending(struct gk20a *g,
 }
 
 int gv11b_fifo_is_preempt_pending(struct gk20a *g, u32 id,
-                 unsigned int id_type, unsigned int timeout_rc_type)
+                 unsigned int id_type)
 {
         struct fifo_gk20a *f = &g->fifo;
         unsigned long runlist_served_pbdmas;
@@ -800,14 +799,13 @@ int gv11b_fifo_is_preempt_pending(struct gk20a *g, u32 id,
         runlist_served_engines = f->runlist_info[runlist_id].eng_bitmask;
 
         for_each_set_bit(pbdma_id, &runlist_served_pbdmas, f->num_pbdma)
-                ret |= gv11b_fifo_poll_pbdma_chan_status(g, tsgid, pbdma_id,
-                                                         timeout_rc_type);
+                ret |= gv11b_fifo_poll_pbdma_chan_status(g, tsgid, pbdma_id);
+
         f->runlist_info[runlist_id].reset_eng_bitmask = 0;
 
         for_each_set_bit(act_eng_id, &runlist_served_engines, f->max_engines)
                 ret |= gv11b_fifo_poll_eng_ctx_status(g, tsgid, act_eng_id,
-                                &f->runlist_info[runlist_id].reset_eng_bitmask,
-                                 timeout_rc_type);
+                                &f->runlist_info[runlist_id].reset_eng_bitmask);
         return ret;
 }
 
@@ -944,7 +942,7 @@ static int gv11b_fifo_preempt_runlists(struct gk20a *g, u32 runlists_mask)
 }
 
 static int __locked_fifo_preempt_ch_tsg(struct gk20a *g, u32 id,
-                         unsigned int id_type, unsigned int timeout_rc_type)
+                         unsigned int id_type)
 {
         int ret;
         struct fifo_gk20a *f = &g->fifo;
@@ -958,18 +956,18 @@ static int __locked_fifo_preempt_ch_tsg(struct gk20a *g, u32 id,
                 gk20a_fifo_issue_preempt(g, id, true);
 
         /* wait for preempt */
-        ret = g->ops.fifo.is_preempt_pending(g, id, id_type,
-                                         timeout_rc_type);
+        ret = g->ops.fifo.is_preempt_pending(g, id, id_type);
 
-        if (ret && (timeout_rc_type == PREEMPT_TIMEOUT_RC))
-                gk20a_fifo_preempt_timeout_rc(g, id, id_type);
+        /* No recovery even if preempt timed out since
+         * this is called from recovery path
+         */
 
         return ret;
 }
 
 
 int gv11b_fifo_preempt_ch_tsg(struct gk20a *g, u32 id,
-                         unsigned int id_type, unsigned int timeout_rc_type)
+                         unsigned int id_type)
 {
         struct fifo_gk20a *f = &g->fifo;
         u32 ret = 0;
@@ -995,7 +993,7 @@ int gv11b_fifo_preempt_ch_tsg(struct gk20a *g, u32 id,
 
         mutex_ret = nvgpu_pmu_mutex_acquire(&g->pmu, PMU_MUTEX_ID_FIFO, &token);
 
-        ret = __locked_fifo_preempt_ch_tsg(g, id, id_type, timeout_rc_type);
+        ret = __locked_fifo_preempt_ch_tsg(g, id, id_type);
 
         if (!mutex_ret)
                 nvgpu_pmu_mutex_release(&g->pmu, PMU_MUTEX_ID_FIFO, &token);
@@ -1068,8 +1066,7 @@ void gv11b_fifo_teardown_ch_tsg(struct gk20a *g, u32 act_eng_bitmask,
 
         /* Preempt tsg/ch */
         if (id_type == ID_TYPE_TSG || id_type == ID_TYPE_CHANNEL) {
-                g->ops.fifo.preempt_ch_tsg(g, id, id_type,
-                                         PREEMPT_TIMEOUT_NORC);
+                g->ops.fifo.preempt_ch_tsg(g, id, id_type);
         } else {
                 gv11b_fifo_preempt_runlists(g, runlists_mask);
         }
diff --git a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h
index 66efdd3b..3dfc337c 100644
--- a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h
+++ b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h
@@ -81,12 +81,11 @@ void gv11b_dump_eng_status(struct gk20a *g,
 u32 gv11b_fifo_intr_0_error_mask(struct gk20a *g);
 int gv11b_fifo_reschedule_runlist(struct channel_gk20a *ch, bool preempt_next);
 int gv11b_fifo_is_preempt_pending(struct gk20a *g, u32 id,
-                 unsigned int id_type, unsigned int timeout_rc_type);
+                 unsigned int id_type);
 int gv11b_fifo_preempt_channel(struct gk20a *g, u32 chid);
 int gv11b_fifo_preempt_tsg(struct gk20a *g, u32 tsgid);
 int gv11b_fifo_enable_tsg(struct tsg_gk20a *tsg);
-int gv11b_fifo_preempt_ch_tsg(struct gk20a *g, u32 id,
-                         unsigned int id_type, unsigned int timeout_rc_type);
+int gv11b_fifo_preempt_ch_tsg(struct gk20a *g, u32 id, unsigned int id_type);
 void gv11b_fifo_teardown_ch_tsg(struct gk20a *g, u32 act_eng_bitmask,
                         u32 id, unsigned int id_type, unsigned int rc_type,
                          struct mmu_fault_info *mmfault);