gpu: nvgpu: Clocks params update

- Clocks params update as per r370

JIRA DNVGPU-116

Change-Id: Id709d6b1e49d717a00cec72c9607f28a27f86c1e
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1212840
(cherry picked from commit f3a47a7daf9b3803565958436d6c7475510e641a)
Reviewed-on: http://git-master/r/1229672
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit

1 files changed, 2 insertions, 2 deletions

diff --git a/drivers/gpu/nvgpu/pmuif/gpmuifclk.h b/drivers/gpu/nvgpu/pmuif/gpmuifclk.h
index 36b9aace..d1e5e53e 100644
--- a/drivers/gpu/nvgpu/pmuif/gpmuifclk.h
+++ b/drivers/gpu/nvgpu/pmuif/gpmuifclk.h
@@ -59,6 +59,7 @@ struct nv_pmu_clk_clk_domain_boardobjgrp_set_header {
         bool b_override_o_v_o_c;
         bool b_debug_mode;
         bool b_enforce_vf_monotonicity;
+        bool b_enforce_vf_smoothening;
         u8 volt_rails_max;
         struct ctrl_clk_clk_delta deltas;
 };
@@ -137,6 +138,7 @@ struct nv_pmu_clk_clk_prog_1x_master_boardobj_set {
         bool b_o_c_o_v_enabled;
         struct ctrl_clk_clk_prog_1x_master_vf_entry vf_entries[
                 CTRL_CLK_CLK_PROG_1X_MASTER_VF_ENTRY_MAX_ENTRIES];
+        union ctrl_clk_clk_prog_1x_master_source_data source_data;
         struct ctrl_clk_clk_delta deltas;
 };
 
@@ -245,8 +247,6 @@ struct nv_pmu_clk_clk_vf_point_freq_boardobj_set {
 struct nv_pmu_clk_clk_vf_point_volt_boardobj_set {
         struct nv_pmu_clk_clk_vf_point_boardobj_set super;
         u32 source_voltage_uv;
-        u8 vf_gain_vfe_equ_idx;
-        u8 clk_domain_idx;
         int freq_delta_khz;
 };