diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2015-11-24 18:17:40 -0500 |
---|---|---|
committer | Terje Bergstrom <tbergstrom@nvidia.com> | 2016-03-08 13:50:41 -0500 |
commit | db59525e5973cfbf2eec82fbb82ae0f8a9bdca8b (patch) | |
tree | 2c73772be639d1ef892d1b58d4382e220d392ebf /drivers/gpu | |
parent | 4331166afd7b9969cfbd74847f5961464c970a06 (diff) |
gpu: nvgpu: Use shift instead of div for comptag
Use right shift instead of division for computing the ctag offset.
Bug 1704834
Change-Id: Id57526a08bad34e41b2335a21e299d1c0a2ffba1
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1024467
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/mm_gk20a.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c index 52529c39..738df2af 100644 --- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GK20A memory management | 2 | * GK20A memory management |
3 | * | 3 | * |
4 | * Copyright (c) 2011-2015, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2011-2017, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | 6 | * This program is free software; you can redistribute it and/or modify it |
7 | * under the terms and conditions of the GNU General Public License, | 7 | * under the terms and conditions of the GNU General Public License, |
@@ -1500,8 +1500,8 @@ u64 gk20a_vm_map(struct vm_gk20a *vm, | |||
1500 | u64 buf_addr; | 1500 | u64 buf_addr; |
1501 | u64 ctag_map_win_size = 0; | 1501 | u64 ctag_map_win_size = 0; |
1502 | u32 ctag_map_win_ctagline = 0; | 1502 | u32 ctag_map_win_ctagline = 0; |
1503 | u32 ctag_offset; | ||
1504 | struct vm_reserved_va_node *va_node = NULL; | 1503 | struct vm_reserved_va_node *va_node = NULL; |
1504 | u32 ctag_offset; | ||
1505 | 1505 | ||
1506 | if (user_mapped && vm->userspace_managed && | 1506 | if (user_mapped && vm->userspace_managed && |
1507 | !(flags & NVGPU_AS_MAP_BUFFER_FLAGS_FIXED_OFFSET)) { | 1507 | !(flags & NVGPU_AS_MAP_BUFFER_FLAGS_FIXED_OFFSET)) { |
@@ -1677,8 +1677,8 @@ u64 gk20a_vm_map(struct vm_gk20a *vm, | |||
1677 | */ | 1677 | */ |
1678 | ctag_offset = comptags.offset; | 1678 | ctag_offset = comptags.offset; |
1679 | if (ctag_offset) | 1679 | if (ctag_offset) |
1680 | ctag_offset += buffer_offset / | 1680 | ctag_offset += buffer_offset >> |
1681 | g->ops.fb.compression_page_size(g); | 1681 | ilog2(g->ops.fb.compression_page_size(g)); |
1682 | 1682 | ||
1683 | /* update gmmu ptes */ | 1683 | /* update gmmu ptes */ |
1684 | map_offset = g->ops.mm.gmmu_map(vm, map_offset, | 1684 | map_offset = g->ops.mm.gmmu_map(vm, map_offset, |
@@ -2366,7 +2366,7 @@ static int update_gmmu_pte_locked(struct vm_gk20a *vm, | |||
2366 | int rw_flag, bool sparse, bool priv) | 2366 | int rw_flag, bool sparse, bool priv) |
2367 | { | 2367 | { |
2368 | struct gk20a *g = gk20a_from_vm(vm); | 2368 | struct gk20a *g = gk20a_from_vm(vm); |
2369 | u64 ctag_granularity = g->ops.fb.compression_page_size(g); | 2369 | int ctag_shift = ilog2(g->ops.fb.compression_page_size(g)); |
2370 | u32 page_size = vm->gmmu_page_sizes[gmmu_pgsz_idx]; | 2370 | u32 page_size = vm->gmmu_page_sizes[gmmu_pgsz_idx]; |
2371 | u32 pte_w[2] = {0, 0}; /* invalid pte */ | 2371 | u32 pte_w[2] = {0, 0}; /* invalid pte */ |
2372 | 2372 | ||
@@ -2385,7 +2385,7 @@ static int update_gmmu_pte_locked(struct vm_gk20a *vm, | |||
2385 | 2385 | ||
2386 | pte_w[1] = gmmu_pte_aperture_video_memory_f() | | 2386 | pte_w[1] = gmmu_pte_aperture_video_memory_f() | |
2387 | gmmu_pte_kind_f(kind_v) | | 2387 | gmmu_pte_kind_f(kind_v) | |
2388 | gmmu_pte_comptagline_f((u32)(*ctag / ctag_granularity)); | 2388 | gmmu_pte_comptagline_f((u32)(*ctag >> ctag_shift)); |
2389 | 2389 | ||
2390 | if (vm->mm->use_full_comp_tag_line && *iova & 0x10000) { | 2390 | if (vm->mm->use_full_comp_tag_line && *iova & 0x10000) { |
2391 | pte_w[1] |= gmmu_pte_comptagline_f( | 2391 | pte_w[1] |= gmmu_pte_comptagline_f( |
@@ -2416,7 +2416,7 @@ static int update_gmmu_pte_locked(struct vm_gk20a *vm, | |||
2416 | gk20a_dbg(gpu_dbg_pte, | 2416 | gk20a_dbg(gpu_dbg_pte, |
2417 | "pte=%d iova=0x%llx kind=%d ctag=%d vol=%d [0x%08x, 0x%08x]", | 2417 | "pte=%d iova=0x%llx kind=%d ctag=%d vol=%d [0x%08x, 0x%08x]", |
2418 | i, *iova, | 2418 | i, *iova, |
2419 | kind_v, (u32)(*ctag / ctag_granularity), !cacheable, | 2419 | kind_v, (u32)(*ctag >> ctag_shift), !cacheable, |
2420 | pte_w[1], pte_w[0]); | 2420 | pte_w[1], pte_w[0]); |
2421 | 2421 | ||
2422 | if (*ctag) | 2422 | if (*ctag) |