gpu: nvgpu: use coherent aperture for coherent buffers

Use sysmem_coherent aperture if the buffer mappings are requested
to be IO coherent. Use sysmem_noncoherent aperture otherwise. This
is implemented by adding a new coherent field to the GMMU attrs
struct.

Jira GPUT19X-17
Bug 1651331
Bug 200283998

Change-Id: I5cfb71b5913d4db50ebf10331b19f5a4216456bf
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master/r/1514438
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>

3 files changed, 10 insertions, 3 deletions

diff --git a/drivers/gpu/nvgpu/common/mm/gmmu.c b/drivers/gpu/nvgpu/common/mm/gmmu.c
index 602dfb3b..55fbcd3f 100644
--- a/drivers/gpu/nvgpu/common/mm/gmmu.c
+++ b/drivers/gpu/nvgpu/common/mm/gmmu.c
@@ -747,6 +747,7 @@ u64 gk20a_locked_gmmu_map(struct vm_gk20a *vm,
                 .rw_flag   = rw_flag,
                 .sparse    = sparse,
                 .priv      = priv,
+                .coherent  = flags & NVGPU_AS_MAP_BUFFER_FLAGS_IO_COHERENT,
                 .valid     = !(flags & NVGPU_AS_MAP_BUFFER_FLAGS_UNMAPPED_PTE),
                 .aperture  = aperture
         };
@@ -805,6 +806,7 @@ void gk20a_locked_gmmu_unmap(struct vm_gk20a *vm,
                 .rw_flag   = rw_flag,
                 .sparse    = sparse,
                 .priv      = 0,
+                .coherent  = 0,
                 .valid     = 0,
                 .aperture  = APERTURE_INVALID,
         };
diff --git a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c b/drivers/gpu/nvgpu/gp10b/mm_gp10b.c
index 590dd960..bdc30143 100644
--- a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c
+++ b/drivers/gpu/nvgpu/gp10b/mm_gp10b.c
@@ -230,9 +230,12 @@ static void __update_pte(struct vm_gk20a *vm,
         u32 pte_addr = attrs->aperture == APERTURE_SYSMEM ?
                 gmmu_new_pte_address_sys_f(phys_shifted) :
                 gmmu_new_pte_address_vid_f(phys_shifted);
-        u32 pte_tgt = __nvgpu_aperture_mask(g, attrs->aperture,
-                gmmu_new_pte_aperture_sys_mem_ncoh_f(),
-                gmmu_new_pte_aperture_video_memory_f());
+        u32 pte_tgt = __nvgpu_aperture_mask(g,
+                        attrs->aperture,
+                        attrs->coherent ?
+                                gmmu_new_pte_aperture_sys_mem_coh_f() :
+                                gmmu_new_pte_aperture_sys_mem_ncoh_f(),
+                        gmmu_new_pte_aperture_video_memory_f());
 
         pte_w[0] = pte_valid | pte_addr | pte_tgt;
 
diff --git a/drivers/gpu/nvgpu/include/nvgpu/gmmu.h b/drivers/gpu/nvgpu/include/nvgpu/gmmu.h
index eff87c31..47af2f75 100644
--- a/drivers/gpu/nvgpu/include/nvgpu/gmmu.h
+++ b/drivers/gpu/nvgpu/include/nvgpu/gmmu.h
@@ -149,6 +149,7 @@ struct nvgpu_gmmu_pd {
  *   rw_flag:     Flag from enum gk20a_mem_rw_flag
  *   sparse:      Set if the mapping should be sparse.
  *   priv:        Privilidged mapping.
+ *   coherent:    Set if the mapping should be IO coherent.
  *   valid:       Set if the PTE should be marked valid.
  *   aperture:    VIDMEM or SYSMEM.
  *   debug:       When set print debugging info.
@@ -166,6 +167,7 @@ struct nvgpu_gmmu_attrs {
         int                      rw_flag;
         bool                     sparse;
         bool                     priv;
+        bool                     coherent;
         bool                     valid;
         enum nvgpu_aperture      aperture;
         bool                     debug;