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authorThomas Fleury <tfleury@nvidia.com>2017-06-06 21:58:17 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-06-21 00:43:47 -0400
commitc32c86342e90cf7d85114f3a40853bc9ba0e7540 (patch)
treefa79a5df8dd4f509122709ffcb95adfb606acf10 /drivers/gpu
parent83f8bb225b074bfdf11a2da6c21acf204eecb293 (diff)
gpu: nvgpu: g106 hal for mclk switching
move mclk switching to gp106 hal. Bug 1921082 JIRA EVLR-1269 Change-Id: I97812b871384460bec88fddac0f6a326df12fc45 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: http://git-master/r/1499393 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/nvgpu/Makefile.nvgpu2
-rw-r--r--drivers/gpu/nvgpu/clk/clk_mclk.h7
-rw-r--r--drivers/gpu/nvgpu/common/linux/pci.c1
-rw-r--r--drivers/gpu/nvgpu/gp106/pmu_gp106.c5
-rw-r--r--drivers/gpu/nvgpu/gp106/pmu_mclk_gp106.c (renamed from drivers/gpu/nvgpu/clk/clk_mclk.c)9
-rw-r--r--drivers/gpu/nvgpu/gp106/pmu_mclk_gp106.h24
6 files changed, 34 insertions, 14 deletions
diff --git a/drivers/gpu/nvgpu/Makefile.nvgpu b/drivers/gpu/nvgpu/Makefile.nvgpu
index 250acc15..6dbba4d9 100644
--- a/drivers/gpu/nvgpu/Makefile.nvgpu
+++ b/drivers/gpu/nvgpu/Makefile.nvgpu
@@ -192,6 +192,7 @@ nvgpu-y += \
192 gp106/hal_gp106.o \ 192 gp106/hal_gp106.o \
193 gp106/mm_gp106.o \ 193 gp106/mm_gp106.o \
194 gp106/pmu_gp106.o \ 194 gp106/pmu_gp106.o \
195 gp106/pmu_mclk_gp106.o \
195 gp106/gr_gp106.o \ 196 gp106/gr_gp106.o \
196 gp106/gr_ctx_gp106.o \ 197 gp106/gr_ctx_gp106.o \
197 gp106/acr_gp106.o \ 198 gp106/acr_gp106.o \
@@ -200,7 +201,6 @@ nvgpu-y += \
200 gp106/ltc_gp106.o \ 201 gp106/ltc_gp106.o \
201 gp106/fb_gp106.o \ 202 gp106/fb_gp106.o \
202 gp106/regops_gp106.o \ 203 gp106/regops_gp106.o \
203 clk/clk_mclk.o \
204 pstate/pstate.o \ 204 pstate/pstate.o \
205 clk/clk_vin.o \ 205 clk/clk_vin.o \
206 clk/clk_fll.o \ 206 clk/clk_fll.o \
diff --git a/drivers/gpu/nvgpu/clk/clk_mclk.h b/drivers/gpu/nvgpu/clk/clk_mclk.h
index 4918b917..b235deea 100644
--- a/drivers/gpu/nvgpu/clk/clk_mclk.h
+++ b/drivers/gpu/nvgpu/clk/clk_mclk.h
@@ -21,9 +21,6 @@
21#define GP106_MCLK_HIGH_SPEED 2 21#define GP106_MCLK_HIGH_SPEED 2
22#define GP106_MCLK_NUM_SPEED 3 22#define GP106_MCLK_NUM_SPEED 3
23 23
24#define GP106_MEM_CONFIG_GDDR5_PG418 0
25#define GP106_MEM_CONFIG_GDDR5_PG419 1
26
27enum gk20a_mclk_speed { 24enum gk20a_mclk_speed {
28 gk20a_mclk_low_speed, 25 gk20a_mclk_low_speed,
29 gk20a_mclk_mid_speed, 26 gk20a_mclk_mid_speed,
@@ -51,8 +48,4 @@ struct clk_mclk_state {
51#endif 48#endif
52}; 49};
53 50
54int clk_mclkseq_init_mclk_gddr5(struct gk20a *g);
55void clk_mclkseq_deinit_mclk_gddr5(struct gk20a *g);
56int clk_mclkseq_change_mclk_gddr5(struct gk20a *g, u16 val);
57
58#endif 51#endif
diff --git a/drivers/gpu/nvgpu/common/linux/pci.c b/drivers/gpu/nvgpu/common/linux/pci.c
index 31181808..c0510b72 100644
--- a/drivers/gpu/nvgpu/common/linux/pci.c
+++ b/drivers/gpu/nvgpu/common/linux/pci.c
@@ -28,6 +28,7 @@
28#include "clk/clk_mclk.h" 28#include "clk/clk_mclk.h"
29#include "module.h" 29#include "module.h"
30#include "intr.h" 30#include "intr.h"
31#include "gp106/pmu_mclk_gp106.h"
31 32
32#include "pci.h" 33#include "pci.h"
33 34
diff --git a/drivers/gpu/nvgpu/gp106/pmu_gp106.c b/drivers/gpu/nvgpu/gp106/pmu_gp106.c
index 9c32d7a3..2ecd2ef1 100644
--- a/drivers/gpu/nvgpu/gp106/pmu_gp106.c
+++ b/drivers/gpu/nvgpu/gp106/pmu_gp106.c
@@ -19,6 +19,7 @@
19#include "gm20b/pmu_gm20b.h" 19#include "gm20b/pmu_gm20b.h"
20#include "gp10b/pmu_gp10b.h" 20#include "gp10b/pmu_gp10b.h"
21#include "gp106/pmu_gp106.h" 21#include "gp106/pmu_gp106.h"
22#include "gp106/pmu_mclk_gp106.h"
22#include "gp106/acr_gp106.h" 23#include "gp106/acr_gp106.h"
23 24
24#include "clk/clk_mclk.h" 25#include "clk/clk_mclk.h"
@@ -443,8 +444,8 @@ void gp106_init_pmu_ops(struct gpu_ops *gops)
443 gops->pmu.send_lrf_tex_ltc_dram_overide_en_dis_cmd = NULL; 444 gops->pmu.send_lrf_tex_ltc_dram_overide_en_dis_cmd = NULL;
444 gops->pmu.dump_secure_fuses = NULL; 445 gops->pmu.dump_secure_fuses = NULL;
445 gops->pmu.reset = gp106_falcon_reset; 446 gops->pmu.reset = gp106_falcon_reset;
446 gops->pmu.mclk_init = clk_mclkseq_init_mclk_gddr5; 447 gops->pmu.mclk_init = gp106_mclk_init;
447 gops->pmu.mclk_deinit = clk_mclkseq_deinit_mclk_gddr5; 448 gops->pmu.mclk_deinit = gp106_mclk_deinit;
448 gops->pmu.is_pmu_supported = gp106_is_pmu_supported; 449 gops->pmu.is_pmu_supported = gp106_is_pmu_supported;
449 450
450 gk20a_dbg_fn("done"); 451 gk20a_dbg_fn("done");
diff --git a/drivers/gpu/nvgpu/clk/clk_mclk.c b/drivers/gpu/nvgpu/gp106/pmu_mclk_gp106.c
index b948dcb2..c510a8d7 100644
--- a/drivers/gpu/nvgpu/clk/clk_mclk.c
+++ b/drivers/gpu/nvgpu/gp106/pmu_mclk_gp106.c
@@ -20,6 +20,7 @@
20#ifdef CONFIG_DEBUG_FS 20#ifdef CONFIG_DEBUG_FS
21#include "gk20a/platform_gk20a.h" 21#include "gk20a/platform_gk20a.h"
22#endif 22#endif
23#include "gp106/pmu_mclk_gp106.h"
23 24
24#include <nvgpu/hw/gk20a/hw_pwr_gk20a.h> 25#include <nvgpu/hw/gk20a/hw_pwr_gk20a.h>
25#include <nvgpu/hw/gp106/hw_fb_gp106.h> 26#include <nvgpu/hw/gp106/hw_fb_gp106.h>
@@ -2689,7 +2690,7 @@ done:
2689 return status; 2690 return status;
2690} 2691}
2691 2692
2692void clk_mclkseq_deinit_mclk_gddr5(struct gk20a *g) 2693void gp106_mclk_deinit(struct gk20a *g)
2693{ 2694{
2694 struct clk_mclk_state *mclk = &g->clk_pmu.clk_mclk; 2695 struct clk_mclk_state *mclk = &g->clk_pmu.clk_mclk;
2695 2696
@@ -2697,7 +2698,7 @@ void clk_mclkseq_deinit_mclk_gddr5(struct gk20a *g)
2697 nvgpu_mutex_destroy(&mclk->mclk_lock); 2698 nvgpu_mutex_destroy(&mclk->mclk_lock);
2698} 2699}
2699 2700
2700int clk_mclkseq_init_mclk_gddr5(struct gk20a *g) 2701int gp106_mclk_init(struct gk20a *g)
2701{ 2702{
2702 struct clk_mclk_state *mclk; 2703 struct clk_mclk_state *mclk;
2703 int status; 2704 int status;
@@ -2768,7 +2769,7 @@ int clk_mclkseq_init_mclk_gddr5(struct gk20a *g)
2768 mclk->debugfs_set = true; 2769 mclk->debugfs_set = true;
2769 } 2770 }
2770#endif 2771#endif
2771 g->ops.pmu.mclk_change = clk_mclkseq_change_mclk_gddr5; 2772 g->ops.pmu.mclk_change = gp106_mclk_change;
2772 2773
2773 mclk->init = true; 2774 mclk->init = true;
2774 2775
@@ -2781,7 +2782,7 @@ fail_mclk_mutex:
2781 return err; 2782 return err;
2782} 2783}
2783 2784
2784int clk_mclkseq_change_mclk_gddr5(struct gk20a *g, u16 val) 2785int gp106_mclk_change(struct gk20a *g, u16 val)
2785{ 2786{
2786 struct clk_mclk_state *mclk; 2787 struct clk_mclk_state *mclk;
2787 struct pmu_payload payload; 2788 struct pmu_payload payload;
diff --git a/drivers/gpu/nvgpu/gp106/pmu_mclk_gp106.h b/drivers/gpu/nvgpu/gp106/pmu_mclk_gp106.h
new file mode 100644
index 00000000..bfe4da5a
--- /dev/null
+++ b/drivers/gpu/nvgpu/gp106/pmu_mclk_gp106.h
@@ -0,0 +1,24 @@
1/*
2* Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
3*
4* This program is free software; you can redistribute it and/or modify it
5* under the terms and conditions of the GNU General Public License,
6* version 2, as published by the Free Software Foundation.
7*
8* This program is distributed in the hope it will be useful, but WITHOUT
9* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11* more details.
12*/
13
14#ifndef _PMU_MCLK_GP106_H_
15#define _PMU_MCLK_GP106_H_
16
17#define GP106_MEM_CONFIG_GDDR5_PG418 0
18#define GP106_MEM_CONFIG_GDDR5_PG419 1
19
20extern int gp106_mclk_init(struct gk20a *g);
21extern void gp106_mclk_deinit(struct gk20a *g);
22extern int gp106_mclk_change(struct gk20a *g, u16 val);
23
24#endif