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author | Sagar Kamble <skamble@nvidia.com> | 2021-05-04 03:25:53 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2021-05-04 17:40:56 -0400 |
commit | bb8bf1c76c7abaa4e249944d9cb290d472657e7c (patch) | |
tree | a672fdb96eeddea3ba8efa5c5a29d76df4fbd7b1 /drivers/gpu | |
parent | 0d088ad70cb43e54661163971095409c76a79f51 (diff) |
gpu: nvgpu: fix tsg unbind failure paths
nvgpu_tsg_unbind_channel_common failure handling missed
channel.clear & nvgpu_tsg_set_mmu_debug_mode calls.
Bug 200711183
Change-Id: I19fd53be55db9df725b7cf467b2673e4cd29deb5
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2521972
(cherry picked from commit 89ec2afbd4538fe5036bef7affed5871d45ec734)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2524251
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/nvgpu/common/fifo/tsg.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/common/fifo/tsg.c b/drivers/gpu/nvgpu/common/fifo/tsg.c index ebcdd2be..72ef9304 100644 --- a/drivers/gpu/nvgpu/common/fifo/tsg.c +++ b/drivers/gpu/nvgpu/common/fifo/tsg.c | |||
@@ -172,6 +172,15 @@ int gk20a_tsg_unbind_channel(struct channel_gk20a *ch, bool force) | |||
172 | /* If channel unbind fails, channel is still part of runlist */ | 172 | /* If channel unbind fails, channel is still part of runlist */ |
173 | channel_gk20a_update_runlist(ch, false); | 173 | channel_gk20a_update_runlist(ch, false); |
174 | 174 | ||
175 | while (ch->mmu_debug_mode_refcnt > 0U) { | ||
176 | err = nvgpu_tsg_set_mmu_debug_mode(ch, false); | ||
177 | if (err != 0) { | ||
178 | nvgpu_err(g, "disable mmu debug mode failed ch:%u", | ||
179 | ch->chid); | ||
180 | break; | ||
181 | } | ||
182 | } | ||
183 | |||
175 | nvgpu_rwsem_down_write(&tsg->ch_list_lock); | 184 | nvgpu_rwsem_down_write(&tsg->ch_list_lock); |
176 | nvgpu_list_del(&ch->ch_entry); | 185 | nvgpu_list_del(&ch->ch_entry); |
177 | ch->tsgid = NVGPU_INVALID_TSG_ID; | 186 | ch->tsgid = NVGPU_INVALID_TSG_ID; |