diff options
author | Konsta Holtta <kholtta@nvidia.com> | 2017-04-12 08:29:37 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-04-19 15:15:56 -0400 |
commit | afe12a49f7c61b5725113e2b9d2a5121d7913383 (patch) | |
tree | dc4505d7ae50ac96092dbe3a11c315a8d1d2eef4 /drivers/gpu | |
parent | f4e36283437ff5dfcac08205aa994c62d95e1d21 (diff) |
gpu: nvgpu: add missing busy calls for ctrl ioctls
The following ioctls:
- NVGPU_GPU_IOCTL_WAIT_FOR_PAUSE
- NVGPU_GPU_IOCTL_RESUME_FROM_PAUSE
- NVGPU_GPU_IOCTL_TRIGGER_SUSPEND
- NVGPU_GPU_IOCTL_CLEAR_SM_ERRORS
access hardware registers, so they should make sure that the gpu is
powered on first. Add gk20a_{busy,idle}() pairs for them.
Bug 1849661
Change-Id: I7deabf4a2c1c7d069a6134233f8e86df0a2722c8
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1461449
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c | 39 |
1 files changed, 36 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c b/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c index b5a79ecd..0546658d 100644 --- a/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c +++ b/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c | |||
@@ -393,16 +393,23 @@ static int nvgpu_gpu_ioctl_trigger_suspend(struct gk20a *g) | |||
393 | { | 393 | { |
394 | int err; | 394 | int err; |
395 | 395 | ||
396 | err = gk20a_busy(g); | ||
397 | if (err) | ||
398 | return err; | ||
399 | |||
396 | nvgpu_mutex_acquire(&g->dbg_sessions_lock); | 400 | nvgpu_mutex_acquire(&g->dbg_sessions_lock); |
397 | err = g->ops.gr.trigger_suspend(g); | 401 | err = g->ops.gr.trigger_suspend(g); |
398 | nvgpu_mutex_release(&g->dbg_sessions_lock); | 402 | nvgpu_mutex_release(&g->dbg_sessions_lock); |
403 | |||
404 | gk20a_idle(g); | ||
405 | |||
399 | return err; | 406 | return err; |
400 | } | 407 | } |
401 | 408 | ||
402 | static int nvgpu_gpu_ioctl_wait_for_pause(struct gk20a *g, | 409 | static int nvgpu_gpu_ioctl_wait_for_pause(struct gk20a *g, |
403 | struct nvgpu_gpu_wait_pause_args *args) | 410 | struct nvgpu_gpu_wait_pause_args *args) |
404 | { | 411 | { |
405 | int err = 0; | 412 | int err; |
406 | struct warpstate *w_state; | 413 | struct warpstate *w_state; |
407 | u32 sm_count, size; | 414 | u32 sm_count, size; |
408 | 415 | ||
@@ -412,6 +419,10 @@ static int nvgpu_gpu_ioctl_wait_for_pause(struct gk20a *g, | |||
412 | if (!w_state) | 419 | if (!w_state) |
413 | return -ENOMEM; | 420 | return -ENOMEM; |
414 | 421 | ||
422 | err = gk20a_busy(g); | ||
423 | if (err) | ||
424 | goto out_free; | ||
425 | |||
415 | nvgpu_mutex_acquire(&g->dbg_sessions_lock); | 426 | nvgpu_mutex_acquire(&g->dbg_sessions_lock); |
416 | g->ops.gr.wait_for_pause(g, w_state); | 427 | g->ops.gr.wait_for_pause(g, w_state); |
417 | 428 | ||
@@ -422,23 +433,45 @@ static int nvgpu_gpu_ioctl_wait_for_pause(struct gk20a *g, | |||
422 | } | 433 | } |
423 | 434 | ||
424 | nvgpu_mutex_release(&g->dbg_sessions_lock); | 435 | nvgpu_mutex_release(&g->dbg_sessions_lock); |
436 | |||
437 | gk20a_idle(g); | ||
438 | |||
439 | out_free: | ||
425 | nvgpu_kfree(g, w_state); | 440 | nvgpu_kfree(g, w_state); |
441 | |||
426 | return err; | 442 | return err; |
427 | } | 443 | } |
428 | 444 | ||
429 | static int nvgpu_gpu_ioctl_resume_from_pause(struct gk20a *g) | 445 | static int nvgpu_gpu_ioctl_resume_from_pause(struct gk20a *g) |
430 | { | 446 | { |
431 | int err = 0; | 447 | int err; |
448 | |||
449 | err = gk20a_busy(g); | ||
450 | if (err) | ||
451 | return err; | ||
432 | 452 | ||
433 | nvgpu_mutex_acquire(&g->dbg_sessions_lock); | 453 | nvgpu_mutex_acquire(&g->dbg_sessions_lock); |
434 | err = g->ops.gr.resume_from_pause(g); | 454 | err = g->ops.gr.resume_from_pause(g); |
435 | nvgpu_mutex_release(&g->dbg_sessions_lock); | 455 | nvgpu_mutex_release(&g->dbg_sessions_lock); |
456 | |||
457 | gk20a_idle(g); | ||
458 | |||
436 | return err; | 459 | return err; |
437 | } | 460 | } |
438 | 461 | ||
439 | static int nvgpu_gpu_ioctl_clear_sm_errors(struct gk20a *g) | 462 | static int nvgpu_gpu_ioctl_clear_sm_errors(struct gk20a *g) |
440 | { | 463 | { |
441 | return g->ops.gr.clear_sm_errors(g); | 464 | int err; |
465 | |||
466 | err = gk20a_busy(g); | ||
467 | if (err) | ||
468 | return err; | ||
469 | |||
470 | err = g->ops.gr.clear_sm_errors(g); | ||
471 | |||
472 | gk20a_idle(g); | ||
473 | |||
474 | return err; | ||
442 | } | 475 | } |
443 | 476 | ||
444 | static int nvgpu_gpu_ioctl_has_any_exception( | 477 | static int nvgpu_gpu_ioctl_has_any_exception( |