diff options
author | Alex Waterman <alexw@nvidia.com> | 2014-02-10 16:57:06 -0500 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2015-03-18 15:09:33 -0400 |
commit | ab0448821f99502f787a12b467caf61f586448a8 (patch) | |
tree | a47f9cf6f1e0228cee17253db91b4938ade01ba1 /drivers/gpu | |
parent | e00304a9d0e728aadabcbd673304b360fc9ac575 (diff) |
video: tegra: host: commonize set ZBC color entry
Move the set_zbc_color_entry() operation to the LTC common code
as this is part of the LTC.
Change-Id: Iba41e32e273d86fcf76094440c2313a75a928326
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/366174
(cherry picked from commit 569ce1f3370532f12face62664a07d2d17a96bef)
Reviewed-on: http://git-master/r/376505
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/ltc_common.c | 138 |
1 files changed, 136 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/ltc_common.c b/drivers/gpu/nvgpu/gk20a/ltc_common.c index ae828680..cd6faacf 100644 --- a/drivers/gpu/nvgpu/gk20a/ltc_common.c +++ b/drivers/gpu/nvgpu/gk20a/ltc_common.c | |||
@@ -92,6 +92,142 @@ static void gk20a_ltc_set_max_ways_evict_last(struct gk20a *g, u32 max_ways) | |||
92 | gk20a_writel(g, ltc_ltcs_ltss_tstg_set_mgmt_r(), mgmt_reg); | 92 | gk20a_writel(g, ltc_ltcs_ltss_tstg_set_mgmt_r(), mgmt_reg); |
93 | } | 93 | } |
94 | 94 | ||
95 | static int gk20a_ltc_init_comptags(struct gk20a *g, struct gr_gk20a *gr) | ||
96 | { | ||
97 | struct device *d = dev_from_gk20a(g); | ||
98 | DEFINE_DMA_ATTRS(attrs); | ||
99 | dma_addr_t iova; | ||
100 | |||
101 | /* max memory size (MB) to cover */ | ||
102 | u32 max_size = gr->max_comptag_mem; | ||
103 | /* one tag line covers 128KB */ | ||
104 | u32 max_comptag_lines = max_size << 3; | ||
105 | |||
106 | u32 hw_max_comptag_lines = | ||
107 | ltc_ltcs_ltss_cbc_ctrl3_clear_upper_bound_init_v(); | ||
108 | |||
109 | u32 cbc_param = | ||
110 | gk20a_readl(g, ltc_ltcs_ltss_cbc_param_r()); | ||
111 | u32 comptags_per_cacheline = | ||
112 | ltc_ltcs_ltss_cbc_param_comptags_per_cache_line_v(cbc_param); | ||
113 | u32 slices_per_fbp = | ||
114 | ltc_ltcs_ltss_cbc_param_slices_per_fbp_v(cbc_param); | ||
115 | u32 cacheline_size = | ||
116 | 512 << ltc_ltcs_ltss_cbc_param_cache_line_size_v(cbc_param); | ||
117 | |||
118 | u32 compbit_backing_size; | ||
119 | |||
120 | gk20a_dbg_fn(""); | ||
121 | |||
122 | if (max_comptag_lines == 0) { | ||
123 | gr->compbit_store.size = 0; | ||
124 | return 0; | ||
125 | } | ||
126 | |||
127 | if (max_comptag_lines > hw_max_comptag_lines) | ||
128 | max_comptag_lines = hw_max_comptag_lines; | ||
129 | |||
130 | /* no hybird fb */ | ||
131 | compbit_backing_size = | ||
132 | DIV_ROUND_UP(max_comptag_lines, comptags_per_cacheline) * | ||
133 | cacheline_size * slices_per_fbp * gr->num_fbps; | ||
134 | |||
135 | /* aligned to 2KB * num_fbps */ | ||
136 | compbit_backing_size += | ||
137 | gr->num_fbps << ltc_ltcs_ltss_cbc_base_alignment_shift_v(); | ||
138 | |||
139 | /* must be a multiple of 64KB */ | ||
140 | compbit_backing_size = roundup(compbit_backing_size, 64*1024); | ||
141 | |||
142 | max_comptag_lines = | ||
143 | (compbit_backing_size * comptags_per_cacheline) / | ||
144 | cacheline_size * slices_per_fbp * gr->num_fbps; | ||
145 | |||
146 | if (max_comptag_lines > hw_max_comptag_lines) | ||
147 | max_comptag_lines = hw_max_comptag_lines; | ||
148 | |||
149 | gk20a_dbg_info("compbit backing store size : %d", | ||
150 | compbit_backing_size); | ||
151 | gk20a_dbg_info("max comptag lines : %d", | ||
152 | max_comptag_lines); | ||
153 | |||
154 | dma_set_attr(DMA_ATTR_NO_KERNEL_MAPPING, &attrs); | ||
155 | gr->compbit_store.size = compbit_backing_size; | ||
156 | gr->compbit_store.pages = dma_alloc_attrs(d, gr->compbit_store.size, | ||
157 | &iova, GFP_KERNEL, &attrs); | ||
158 | if (!gr->compbit_store.pages) { | ||
159 | gk20a_err(dev_from_gk20a(g), "failed to allocate" | ||
160 | "backing store for compbit : size %d", | ||
161 | compbit_backing_size); | ||
162 | return -ENOMEM; | ||
163 | } | ||
164 | gr->compbit_store.base_iova = iova; | ||
165 | |||
166 | gk20a_allocator_init(&gr->comp_tags, "comptag", | ||
167 | 1, /* start */ | ||
168 | max_comptag_lines - 1, /* length*/ | ||
169 | 1); /* align */ | ||
170 | |||
171 | return 0; | ||
172 | } | ||
173 | |||
174 | static int gk20a_ltc_clear_comptags(struct gk20a *g, u32 min, u32 max) | ||
175 | { | ||
176 | struct gr_gk20a *gr = &g->gr; | ||
177 | u32 fbp, slice, ctrl1, val; | ||
178 | unsigned long end_jiffies = jiffies + | ||
179 | msecs_to_jiffies(gk20a_get_gr_idle_timeout(g)); | ||
180 | u32 delay = GR_IDLE_CHECK_DEFAULT; | ||
181 | u32 slices_per_fbp = | ||
182 | ltc_ltcs_ltss_cbc_param_slices_per_fbp_v( | ||
183 | gk20a_readl(g, ltc_ltcs_ltss_cbc_param_r())); | ||
184 | |||
185 | gk20a_dbg_fn(""); | ||
186 | |||
187 | if (gr->compbit_store.size == 0) | ||
188 | return 0; | ||
189 | |||
190 | gk20a_writel(g, ltc_ltcs_ltss_cbc_ctrl2_r(), | ||
191 | ltc_ltcs_ltss_cbc_ctrl2_clear_lower_bound_f(min)); | ||
192 | gk20a_writel(g, ltc_ltcs_ltss_cbc_ctrl3_r(), | ||
193 | ltc_ltcs_ltss_cbc_ctrl3_clear_upper_bound_f(max)); | ||
194 | gk20a_writel(g, ltc_ltcs_ltss_cbc_ctrl1_r(), | ||
195 | gk20a_readl(g, ltc_ltcs_ltss_cbc_ctrl1_r()) | | ||
196 | ltc_ltcs_ltss_cbc_ctrl1_clear_active_f()); | ||
197 | |||
198 | for (fbp = 0; fbp < gr->num_fbps; fbp++) { | ||
199 | for (slice = 0; slice < slices_per_fbp; slice++) { | ||
200 | |||
201 | delay = GR_IDLE_CHECK_DEFAULT; | ||
202 | |||
203 | ctrl1 = ltc_ltc0_lts0_cbc_ctrl1_r() + | ||
204 | fbp * proj_ltc_stride_v() + | ||
205 | slice * proj_lts_stride_v(); | ||
206 | |||
207 | do { | ||
208 | val = gk20a_readl(g, ctrl1); | ||
209 | if (ltc_ltcs_ltss_cbc_ctrl1_clear_v(val) != | ||
210 | ltc_ltcs_ltss_cbc_ctrl1_clear_active_v()) | ||
211 | break; | ||
212 | |||
213 | usleep_range(delay, delay * 2); | ||
214 | delay = min_t(u32, delay << 1, | ||
215 | GR_IDLE_CHECK_MAX); | ||
216 | |||
217 | } while (time_before(jiffies, end_jiffies) || | ||
218 | !tegra_platform_is_silicon()); | ||
219 | |||
220 | if (!time_before(jiffies, end_jiffies)) { | ||
221 | gk20a_err(dev_from_gk20a(g), | ||
222 | "comp tag clear timeout\n"); | ||
223 | return -EBUSY; | ||
224 | } | ||
225 | } | ||
226 | } | ||
227 | |||
228 | return 0; | ||
229 | } | ||
230 | |||
95 | /* | 231 | /* |
96 | * Sets the ZBC color for the passed index. | 232 | * Sets the ZBC color for the passed index. |
97 | */ | 233 | */ |
@@ -342,5 +478,3 @@ static void gk20a_mm_g_elpg_flush_locked(struct gk20a *g) | |||
342 | "g_elpg_flush too many retries"); | 478 | "g_elpg_flush too many retries"); |
343 | 479 | ||
344 | } | 480 | } |
345 | ======= | ||
346 | >>>>>>> 7294a959b260... video: tegra: host: comptag init and clear | ||